diff -Nrcpad gcc-13-20251120/LAST_UPDATED gcc-13-20251127/LAST_UPDATED
*** gcc-13-20251120/LAST_UPDATED	Thu Nov 20 22:34:36 2025
--- gcc-13-20251127/LAST_UPDATED	Thu Nov 27 22:32:56 2025
***************
*** 1 ****
! Obtained from git: releases/gcc-13 revision 7f95d0c834f967c1ac6162cfc9f4fffac01784f6
--- 1 ----
! Obtained from git: releases/gcc-13 revision 9a2b621ec5545cad140ac9bfa9971f680678b376
diff -Nrcpad gcc-13-20251120/MD5SUMS gcc-13-20251127/MD5SUMS
*** gcc-13-20251120/MD5SUMS	Thu Nov 20 22:34:41 2025
--- gcc-13-20251127/MD5SUMS	Thu Nov 27 22:33:13 2025
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-13-20251120.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-13-20251127.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** d32239bcb673463ab874e80d47fae504  COPYIN
*** 21,27 ****
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! 3fb09ff613ac20bdca059a900d034a56  LAST_UPDATED
  81b3330d422f3ce1ef8b720dfae35068  MAINTAINERS
  2b61ddbd876fa839639a7ca551773426  Makefile.def
  5d2d6a74f897f8158d37f5f2ec6877ce  Makefile.in
--- 21,27 ----
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! 6703009c1ea9f8e2ada46c69fe26f182  LAST_UPDATED
  81b3330d422f3ce1ef8b720dfae35068  MAINTAINERS
  2b61ddbd876fa839639a7ca551773426  Makefile.def
  5d2d6a74f897f8158d37f5f2ec6877ce  Makefile.in
*************** a22e70b3f29292d0e628450f4bb11e62  fixinc
*** 475,481 ****
  a916467b91076e631dd8edb7424769c7  gcc/COPYING.LIB
  d32239bcb673463ab874e80d47fae504  gcc/COPYING3
  6a6a8e020838b23406c81b19c1d46df6  gcc/COPYING3.LIB
! 5905bfa6661eed341e4ee682036b1a02  gcc/ChangeLog
  a3b63c675afa7a655cc2bfa8a907af79  gcc/ChangeLog-1997
  d9a88529352a010253c2e8fb1ed6023b  gcc/ChangeLog-1998
  240f08f81cb4699e8b49347db38233db  gcc/ChangeLog-1999
--- 475,481 ----
  a916467b91076e631dd8edb7424769c7  gcc/COPYING.LIB
  d32239bcb673463ab874e80d47fae504  gcc/COPYING3
  6a6a8e020838b23406c81b19c1d46df6  gcc/COPYING3.LIB
! 14c8c33f6c277b860c5e168e981b1eef  gcc/ChangeLog
  a3b63c675afa7a655cc2bfa8a907af79  gcc/ChangeLog-1997
  d9a88529352a010253c2e8fb1ed6023b  gcc/ChangeLog-1998
  240f08f81cb4699e8b49347db38233db  gcc/ChangeLog-1999
*************** fb3fadb88e1d2b3b640cfaaa5ff11780  gcc/Ch
*** 510,516 ****
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! 22979bab3e447fd14ce9dba33cf39294  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
--- 510,516 ----
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! 0153fc0572883b3629d2d9ce7978b4cb  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
*************** a66f3c594c6fc329800e3fb836fdfd26  gcc/co
*** 3428,3434 ****
  604d3b4e6182f09e4a772f53ed92d704  gcc/config/arm/arm-simd-builtin-types.def
  0e7b2ceea31abf677030625bec385ac3  gcc/config/arm/arm-tables.opt
  5a144b12347f9e5cd1b3b8c2fcf8a8a3  gcc/config/arm/arm-tune.md
! 4600e7f254fe7e45c3b912aeac984352  gcc/config/arm/arm.cc
  c14964f7e41f42d7c9bf3b5b0b556ebf  gcc/config/arm/arm.h
  4b623b84f69c0f93d1212fd10edf4ab5  gcc/config/arm/arm.md
  cf127021475a9bc9dca6dabb24611b52  gcc/config/arm/arm.opt
--- 3428,3434 ----
  604d3b4e6182f09e4a772f53ed92d704  gcc/config/arm/arm-simd-builtin-types.def
  0e7b2ceea31abf677030625bec385ac3  gcc/config/arm/arm-tables.opt
  5a144b12347f9e5cd1b3b8c2fcf8a8a3  gcc/config/arm/arm-tune.md
! 927c45a49457470411085e1f0908f8d9  gcc/config/arm/arm.cc
  c14964f7e41f42d7c9bf3b5b0b556ebf  gcc/config/arm/arm.h
  4b623b84f69c0f93d1212fd10edf4ab5  gcc/config/arm/arm.md
  cf127021475a9bc9dca6dabb24611b52  gcc/config/arm/arm.opt
*************** dc8e1ff924dd1f2699f60837b792825a  gcc/co
*** 3516,3522 ****
  99532a3b480860f7a66fd99e84508362  gcc/config/arm/t-symbian
  951be86a80be890746abaaf44836bd12  gcc/config/arm/t-vxworks
  3f0d4ea121f03e0f25da9fbf40fda7c7  gcc/config/arm/thumb1.md
! b864052b21701670ce016e2bf0220ed6  gcc/config/arm/thumb2.md
  828cfc365756bb6e28d16660a2722f18  gcc/config/arm/types.md
  8f644b0d696c8000b5b31ac50912783f  gcc/config/arm/uclinux-eabi.h
  53ad55adc5a9fd90930c0335e26244d8  gcc/config/arm/uclinux-elf.h
--- 3516,3522 ----
  99532a3b480860f7a66fd99e84508362  gcc/config/arm/t-symbian
  951be86a80be890746abaaf44836bd12  gcc/config/arm/t-vxworks
  3f0d4ea121f03e0f25da9fbf40fda7c7  gcc/config/arm/thumb1.md
! f48661530894decdbb7d71d2756c0878  gcc/config/arm/thumb2.md
  828cfc365756bb6e28d16660a2722f18  gcc/config/arm/types.md
  8f644b0d696c8000b5b31ac50912783f  gcc/config/arm/uclinux-eabi.h
  53ad55adc5a9fd90930c0335e26244d8  gcc/config/arm/uclinux-elf.h
*************** f4c79e9220e9187c3a843e0a42c1d503  gcc/co
*** 3536,3542 ****
  45d01b1a247cd92dd44c4bc361a97321  gcc/config/avr/avr-dimode.md
  708f772e2588821bfa91118474a89d0a  gcc/config/avr/avr-fixed.md
  c3ab3d8980033cd869c1c27b318115ce  gcc/config/avr/avr-log.cc
! f6b56895c4a85f8e366daa6715a3169a  gcc/config/avr/avr-mcus.def
  69b36d3d75fa8c748a6f1c843d6888f7  gcc/config/avr/avr-modes.def
  9126e9ec7dee9b9d66f6893bb9926647  gcc/config/avr/avr-passes.def
  0e3f58ff86af5534419a0e0fb1a552a1  gcc/config/avr/avr-protos.h
--- 3536,3542 ----
  45d01b1a247cd92dd44c4bc361a97321  gcc/config/avr/avr-dimode.md
  708f772e2588821bfa91118474a89d0a  gcc/config/avr/avr-fixed.md
  c3ab3d8980033cd869c1c27b318115ce  gcc/config/avr/avr-log.cc
! 82d18b02b662531290604c811b5cd303  gcc/config/avr/avr-mcus.def
  69b36d3d75fa8c748a6f1c843d6888f7  gcc/config/avr/avr-modes.def
  9126e9ec7dee9b9d66f6893bb9926647  gcc/config/avr/avr-passes.def
  0e3f58ff86af5534419a0e0fb1a552a1  gcc/config/avr/avr-protos.h
*************** b4cde95b709fc93c90bf4d6b3edc7fd0  gcc/co
*** 4030,4036 ****
  ceeba8f332c332a7db03815dd3144457  gcc/config/i386/x86-tune-sched-atom.cc
  cf77688a79e9eb5530fb5a30f8ead444  gcc/config/i386/x86-tune-sched-bd.cc
  30bef3dbd64dfc29211a442df4597f25  gcc/config/i386/x86-tune-sched-core.cc
! 45245aff4235c8461409871e7e5070af  gcc/config/i386/x86-tune-sched.cc
  f322f4891aa00eb9359d5d043e6e04d9  gcc/config/i386/x86-tune.def
  bd48650a48294465d345812ad5e1b4e8  gcc/config/i386/x86gprintrin.h
  9bbe408d1dc406ddf72aa175ea24a4ab  gcc/config/i386/x86intrin.h
--- 4030,4036 ----
  ceeba8f332c332a7db03815dd3144457  gcc/config/i386/x86-tune-sched-atom.cc
  cf77688a79e9eb5530fb5a30f8ead444  gcc/config/i386/x86-tune-sched-bd.cc
  30bef3dbd64dfc29211a442df4597f25  gcc/config/i386/x86-tune-sched-core.cc
! 2ce2f57723a06c770361888ae4adb027  gcc/config/i386/x86-tune-sched.cc
  f322f4891aa00eb9359d5d043e6e04d9  gcc/config/i386/x86-tune.def
  bd48650a48294465d345812ad5e1b4e8  gcc/config/i386/x86gprintrin.h
  9bbe408d1dc406ddf72aa175ea24a4ab  gcc/config/i386/x86intrin.h
*************** e927561ee87ffd471419ab7c04a9c03d  gcc/di
*** 5458,5464 ****
  768604617d8710f1848e11fd6d4f6713  gcc/digraph.cc
  1309ef041fe49676049fddd61225f25e  gcc/digraph.h
  ed4a41716cd834ae3e0120f4e94f21f6  gcc/doc/analyzer.texi
! c967145fe5f1c9d24eb02308eb6e0063  gcc/doc/avr-mmcu.texi
  b55159f9c9fbeadedbd6a971434bef5e  gcc/doc/bugreport.texi
  97af20afa0c976df424f847ab0e7072d  gcc/doc/cfg.texi
  8784212b864de1903df4a7574095012f  gcc/doc/collect2.texi
--- 5458,5464 ----
  768604617d8710f1848e11fd6d4f6713  gcc/digraph.cc
  1309ef041fe49676049fddd61225f25e  gcc/digraph.h
  ed4a41716cd834ae3e0120f4e94f21f6  gcc/doc/analyzer.texi
! 57f7f634d014a76f1c96e2054de2d5a1  gcc/doc/avr-mmcu.texi
  b55159f9c9fbeadedbd6a971434bef5e  gcc/doc/bugreport.texi
  97af20afa0c976df424f847ab0e7072d  gcc/doc/cfg.texi
  8784212b864de1903df4a7574095012f  gcc/doc/collect2.texi
*************** e5306c98e7af9542607cef498d9d4cab  gcc/te
*** 60422,60427 ****
--- 60422,60428 ----
  bf06244dec6dc49e0817b03e4494a90f  gcc/testsuite/gcc.target/arm/builtin_uaddll.c
  f842ae48d03fd71d6c4251ee6b88d526  gcc/testsuite/gcc.target/arm/builtin_usubl.c
  33305e972aaa5cd2660665305329c212  gcc/testsuite/gcc.target/arm/builtin_usubll.c
+ 00d46b35880659bc8001ea4047b5bb1c  gcc/testsuite/gcc.target/arm/cbz-range.c
  528a1cc7ada5bc63c0c59152d86b8557  gcc/testsuite/gcc.target/arm/cbz.c
  78f9bef0e50a143219120e7b5b4af7b9  gcc/testsuite/gcc.target/arm/cmp-1.c
  97376f46024c436de8ce633177de6e0b  gcc/testsuite/gcc.target/arm/cmp-2.c
diff -Nrcpad gcc-13-20251120/gcc/ChangeLog gcc-13-20251127/gcc/ChangeLog
*** gcc-13-20251120/gcc/ChangeLog	Thu Nov 20 22:33:21 2025
--- gcc-13-20251127/gcc/ChangeLog	Thu Nov 27 22:32:15 2025
***************
*** 1,3 ****
--- 1,11 ----
+ 2025-11-24  Jan Hubicka  <jh@suse.cz>
+ 
+ 	Backported from master:
+ 	2024-09-03  Jan Hubicka  <jh@suse.cz>
+ 
+ 	* config/i386/x86-tune-sched.cc (ix86_fuse_mov_alu_p): Fix
+ 	typo.
+ 
  2025-11-18  Richard Biener  <rguenther@suse.de>
  	    Alex Coplan  <alex.coplan@arm.com>
  
diff -Nrcpad gcc-13-20251120/gcc/DATESTAMP gcc-13-20251127/gcc/DATESTAMP
*** gcc-13-20251120/gcc/DATESTAMP	Thu Nov 20 22:33:21 2025
--- gcc-13-20251127/gcc/DATESTAMP	Thu Nov 27 22:32:15 2025
***************
*** 1 ****
! 20251120
--- 1 ----
! 20251127
diff -Nrcpad gcc-13-20251120/gcc/config/arm/arm.cc gcc-13-20251127/gcc/config/arm/arm.cc
*** gcc-13-20251120/gcc/config/arm/arm.cc	Thu Nov 20 22:33:22 2025
--- gcc-13-20251127/gcc/config/arm/arm.cc	Thu Nov 27 22:32:16 2025
*************** arm_print_condition (FILE *stream)
*** 24078,24084 ****
  
  
  /* Globally reserved letters: acln
!    Puncutation letters currently used: @_|?().!#
     Lower case letters currently used: bcdefhimpqtvwxyz
     Upper case letters currently used: ABCDEFGHIJKLMNOPQRSTUV
     Letters previously used, but now deprecated/obsolete: sWXYZ.
--- 24078,24084 ----
  
  
  /* Globally reserved letters: acln
!    Puncutation letters currently used: @_-|?().!#
     Lower case letters currently used: bcdefhimpqtvwxyz
     Upper case letters currently used: ABCDEFGHIJKLMNOPQRSTUV
     Letters previously used, but now deprecated/obsolete: sWXYZ.
*************** arm_print_operand (FILE *stream, rtx x,
*** 24113,24118 ****
--- 24113,24123 ----
      case '_':
        fputs (user_label_prefix, stream);
        return;
+     case '-':
+ #ifdef LOCAL_LABEL_PREFIX
+       fputs (LOCAL_LABEL_PREFIX, stream);
+ #endif
+       return;
  
      case '|':
        fputs (REGISTER_PREFIX, stream);
*************** arm_print_operand_punct_valid_p (unsigne
*** 24963,24971 ****
  {
    return (code == '@' || code == '|' || code == '.'
  	  || code == '(' || code == ')' || code == '#'
  	  || (TARGET_32BIT && (code == '?'))
! 	  || (TARGET_THUMB2 && (code == '!'))
! 	  || (TARGET_THUMB && (code == '_')));
  }
  
  /* Target hook for assembling integer objects.  The ARM version needs to
--- 24968,24976 ----
  {
    return (code == '@' || code == '|' || code == '.'
  	  || code == '(' || code == ')' || code == '#'
+ 	  || code == '-' || code == '_'
  	  || (TARGET_32BIT && (code == '?'))
! 	  || (TARGET_THUMB2 && (code == '!')));
  }
  
  /* Target hook for assembling integer objects.  The ARM version needs to
diff -Nrcpad gcc-13-20251120/gcc/config/arm/thumb2.md gcc-13-20251127/gcc/config/arm/thumb2.md
*** gcc-13-20251120/gcc/config/arm/thumb2.md	Thu Nov 20 22:33:22 2025
--- gcc-13-20251127/gcc/config/arm/thumb2.md	Thu Nov 27 22:32:16 2025
***************
*** 1465,1483 ****
  	      (pc)))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_THUMB2"
!   "*
!   if (get_attr_length (insn) == 2)
!     return \"cbz\\t%0, %l1\";
!   else
!     return \"cmp\\t%0, #0\;beq\\t%l1\";
!   "
    [(set (attr "length")
          (if_then_else
  	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
  	         (le (minus (match_dup 1) (pc)) (const_int 128))
  	         (not (match_test "which_alternative")))
  	    (const_int 2)
! 	    (const_int 8)))
     (set_attr "type" "branch,multiple")]
  )
  
--- 1465,1488 ----
  	      (pc)))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_THUMB2"
!   {
!     int offset = (INSN_ADDRESSES (INSN_UID (operands[1]))
! 		  - INSN_ADDRESSES (INSN_UID (insn)));
!     if (get_attr_length (insn) == 2)
!       return "cbz\t%0, %l1";
!     else if (offset >= -1048564 && offset <= 1048576)
!       return "cmp\t%0, #0\;beq\t%l1";
!     else if (which_alternative == 0)
!       return "cbnz\t%0, %-LCB%=\;b\t%l1\n%-LCB%=:";
!     return "cmp\t%0, #0\;bne\t%-LCB%=\;b\t%l1\n%-LCB%=:";
!   }
    [(set (attr "length")
          (if_then_else
  	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
  	         (le (minus (match_dup 1) (pc)) (const_int 128))
  	         (not (match_test "which_alternative")))
  	    (const_int 2)
! 	    (const_int 10)))
     (set_attr "type" "branch,multiple")]
  )
  
***************
*** 1489,1507 ****
  	      (pc)))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_THUMB2"
!   "*
!   if (get_attr_length (insn) == 2)
!     return \"cbnz\\t%0, %l1\";
!   else
!     return \"cmp\\t%0, #0\;bne\\t%l1\";
!   "
    [(set (attr "length")
          (if_then_else
  	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
  	         (le (minus (match_dup 1) (pc)) (const_int 128))
  	         (not (match_test "which_alternative")))
  	    (const_int 2)
! 	    (const_int 8)))
     (set_attr "type" "branch,multiple")]
  )
  
--- 1494,1517 ----
  	      (pc)))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_THUMB2"
!   {
!     int offset = (INSN_ADDRESSES (INSN_UID (operands[1]))
! 		  - INSN_ADDRESSES (INSN_UID (insn)));
!     if (get_attr_length (insn) == 2)
!       return "cbnz\t%0, %l1";
!     else if (offset >= -1048564 && offset <= 1048576)
!       return "cmp\t%0, #0\;bne\t%l1";
!     else if (which_alternative == 0)
!       return "cbz\t%0, %-LCB%=\;b\t%l1\n%-LCB%=:";
!     return "cmp\t%0, #0\;beq\t%-LCB%=\;b\t%l1\n%-LCB%=:";
!   }
    [(set (attr "length")
          (if_then_else
  	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
  	         (le (minus (match_dup 1) (pc)) (const_int 128))
  	         (not (match_test "which_alternative")))
  	    (const_int 2)
! 	    (const_int 10)))
     (set_attr "type" "branch,multiple")]
  )
  
diff -Nrcpad gcc-13-20251120/gcc/config/avr/avr-mcus.def gcc-13-20251127/gcc/config/avr/avr-mcus.def
*** gcc-13-20251120/gcc/config/avr/avr-mcus.def	Thu Nov 20 22:33:22 2025
--- gcc-13-20251127/gcc/config/avr/avr-mcus.def	Thu Nov 27 22:32:16 2025
*************** AVR_MCU ("avr16ea48",        ARCH_AVRXME
*** 421,426 ****
--- 421,434 ----
  AVR_MCU ("avr32ea28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA28__",   0x7000, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32ea32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA32__",   0x7000, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32ea48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA48__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr16la14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA14__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16la20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA20__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16la28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16la32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr32la14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA14__",   0x7800, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32la20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA20__",   0x7800, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32la28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA28__",   0x7800, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32la32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA32__",   0x7800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32sd20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32SD20__",   0x7000, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32sd28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32SD28__",   0x7000, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32sd32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32SD32__",   0x7000, 0x0, 0x8000, 0x8000)
diff -Nrcpad gcc-13-20251120/gcc/config/i386/x86-tune-sched.cc gcc-13-20251127/gcc/config/i386/x86-tune-sched.cc
*** gcc-13-20251120/gcc/config/i386/x86-tune-sched.cc	Thu Nov 20 22:33:23 2025
--- gcc-13-20251127/gcc/config/i386/x86-tune-sched.cc	Thu Nov 27 22:32:16 2025
*************** ix86_fuse_mov_alu_p (rtx_insn *mov, rtx_
*** 584,590 ****
    /* One of operands should be register.  */
    if (op1 && (!REG_P (op0) || REGNO (op0) != REGNO (reg)))
      std::swap (op0, op1);
!   if (!REG_P (op0) || REGNO (op1) != REGNO (reg))
      return false;
    if (op1
        && !REG_P (op1)
--- 584,590 ----
    /* One of operands should be register.  */
    if (op1 && (!REG_P (op0) || REGNO (op0) != REGNO (reg)))
      std::swap (op0, op1);
!   if (!REG_P (op0) || REGNO (op0) != REGNO (reg))
      return false;
    if (op1
        && !REG_P (op1)
diff -Nrcpad gcc-13-20251120/gcc/doc/avr-mmcu.texi gcc-13-20251127/gcc/doc/avr-mmcu.texi
*** gcc-13-20251120/gcc/doc/avr-mmcu.texi	Thu Nov 20 22:33:23 2025
--- gcc-13-20251127/gcc/doc/avr-mmcu.texi	Thu Nov 27 22:32:16 2025
***************
*** 54,60 ****
  
  @item avrxmega3
  ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space.
! @*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto}, @code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826}, @code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624}, @code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}, @code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32}, @code{avr16du14}, @code{avr16du20}, @code{avr16du28}, @code{avr16du32}, @code{avr16ea28}, @code{avr16ea32}, @code{avr16ea48}, @code{avr16eb14}, @code{avr16eb20}, @code{avr16eb28}, @code{avr16eb32}, @code{avr32da28}, @code{avr32da28s}, @code{avr32da32}, @code{avr32da32s}, @code{avr32da48}, @code{avr32da48s}, @code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14}, @code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}, @code{avr32du14}, @code{avr32du20}, @code{avr32du28}, @code{avr32du32}, @code{avr32ea28}, @code{avr32ea32}, @code{avr32ea48}, @code{avr32eb14}, @code{avr32eb20}, @code{avr32eb28}, @code{avr32eb32}, @code{avr32sd20}, @code{avr32sd28}, @code{avr32sd32}.
  
  @item avrxmega4
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory.
--- 54,60 ----
  
  @item avrxmega3
  ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space.
! @*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto}, @code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826}, @code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624}, @code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}, @code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32}, @code{avr16du14}, @code{avr16du20}, @code{avr16du28}, @code{avr16du32}, @code{avr16ea28}, @code{avr16ea32}, @code{avr16ea48}, @code{avr16eb14}, @code{avr16eb20}, @code{avr16eb28}, @code{avr16eb32}, @code{avr16la14}, @code{avr16la20}, @code{avr16la28}, @code{avr16la32}, @code{avr32da28}, @code{avr32da28s}, @code{avr32da32}, @code{avr32da32s}, @code{avr32da48}, @code{avr32da48s}, @code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14}, @code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}, @code{avr32du14}, @code{avr32du20}, @code{avr32du28}, @code{avr32du32}, @code{avr32ea28}, @code{avr32ea32}, @code{avr32ea48}, @code{avr32eb14}, @code{avr32eb20}, @code{avr32eb28}, @code{avr32eb32}, @code{avr32la14}, @code{avr32la20}, @code{avr32la28}, @code{avr32la32}, @code{avr32sd20}, @code{avr32sd28}, @code{avr32sd32}.
  
  @item avrxmega4
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory.
diff -Nrcpad gcc-13-20251120/gcc/testsuite/gcc.target/arm/cbz-range.c gcc-13-20251127/gcc/testsuite/gcc.target/arm/cbz-range.c
*** gcc-13-20251120/gcc/testsuite/gcc.target/arm/cbz-range.c	Thu Jan  1 00:00:00 1970
--- gcc-13-20251127/gcc/testsuite/gcc.target/arm/cbz-range.c	Thu Nov 27 22:32:37 2025
***************
*** 0 ****
--- 1,114 ----
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_arch_v7a_ok } */
+ /* { dg-options "-O -mthumb" } */
+ /* { dg-add-options arm_arch_v7a } */
+ 
+ #define f "movw r0, #0;movw r0, #0;movw r0, #0;"
+ #define f2 f f
+ #define f4 f2 f2
+ #define f8 f4 f4
+ #define f16 f8 f8
+ #define f32 f16 f16
+ #define f64 f32 f32
+ #define f128 f64 f64
+ #define f256 f128 f128
+ #define f512 f256 f256
+ #define f1024 f512 f512
+ #define f2048 f1024 f1024
+ #define f4096 f2048 f2048
+ #define f8192 f4096 f4096
+ #define f16384 f8192 f8192
+ #define f32768 f16384 f16384
+ #define f65536 f32768 f32768
+ #define f131072 f65536 f65536
+ int a;
+ 
+ int cbz1(int g)
+ {
+   if (g)
+     asm(f8);
+   return a;
+ }
+ 
+ int cbz2(int g)
+ {
+   asm ("": "+h"(g));
+   if (g)
+     asm(f8);
+   return a;
+ }
+ 
+ int cbz3(int g)
+ {
+   if (g)
+     asm(f16);
+   return a;
+ }
+ 
+ int cbz4(int g)
+ {
+   asm ("": "+h"(g));
+   if (g)
+     asm(f16);
+   return a;
+ }
+ 
+ int cbz5(int g)
+ {
+   if (g)
+     asm(f131072);
+   return a;
+ }
+ 
+ int cbz6(int g)
+ {
+   asm ("": "+h"(g));
+   if (g)
+     asm(f131072);
+   return a;
+ }
+ 
+ int cbnz1(int g)
+ {
+   if (!g)
+     asm(f8);
+   return a;
+ }
+ 
+ int cbnz2(int g)
+ {
+   asm ("": "+h"(g));
+   if (!g)
+     asm(f8);
+   return a;
+ }
+ 
+ int cbnz3(int g)
+ {
+   if (!g)
+     asm(f16);
+   return a;
+ }
+ 
+ int cbnz4(int g)
+ {
+   asm ("": "+h"(g));
+   if (!g)
+     asm(f16);
+   return a;
+ }
+ 
+ int cbnz5(int g)
+ {
+   if (!g)
+     asm(f131072);
+   return a;
+ }
+ 
+ int cbnz6(int g)
+ {
+   asm ("": "+h"(g));
+   if (!g)
+     asm(f131072);
+   return a;
+ }
