diff -Nrcpad gcc-14-20251121/LAST_UPDATED gcc-14-20251128/LAST_UPDATED
*** gcc-14-20251121/LAST_UPDATED	Fri Nov 21 22:33:00 2025
--- gcc-14-20251128/LAST_UPDATED	Fri Nov 28 22:32:18 2025
***************
*** 1 ****
! Obtained from git: releases/gcc-14 revision 6725c41516964cc5fcce6578f35f145c0caf2edc
--- 1 ----
! Obtained from git: releases/gcc-14 revision db138aff1247feb9b755443c80d226fb601ebe49
diff -Nrcpad gcc-14-20251121/MD5SUMS gcc-14-20251128/MD5SUMS
*** gcc-14-20251121/MD5SUMS	Fri Nov 21 22:33:05 2025
--- gcc-14-20251128/MD5SUMS	Fri Nov 28 22:32:23 2025
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-14-20251121.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-14-20251128.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** fc9280b02bc68e4fb1ef8d51ccc25061  Change
*** 23,29 ****
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! c9e52528af5481336bee3d9352d74450  LAST_UPDATED
  1671040823f8eb8436a06fdd18065e02  MAINTAINERS
  304c3887135aefa27c21292ec585b0a3  Makefile.def
  8dd93fbf2e32bcbd2faba10e3b8ba2b0  Makefile.in
--- 23,29 ----
  fd4ecdf5d672efe2b0e409aca9cf9446  ChangeLog.jit
  09538b708302f1735f6fa05b622ecf5e  ChangeLog.tree-ssa
  24ab760126489e69436a43185dc3d202  INSTALL/README
! 3cc95d5935930182b3687972f412696f  LAST_UPDATED
  1671040823f8eb8436a06fdd18065e02  MAINTAINERS
  304c3887135aefa27c21292ec585b0a3  Makefile.def
  8dd93fbf2e32bcbd2faba10e3b8ba2b0  Makefile.in
*************** bc7394806417778d77541ba1ec0e4a70  gcc/BA
*** 505,511 ****
  a916467b91076e631dd8edb7424769c7  gcc/COPYING.LIB
  d32239bcb673463ab874e80d47fae504  gcc/COPYING3
  6a6a8e020838b23406c81b19c1d46df6  gcc/COPYING3.LIB
! 451bf795b4fca62fc0d0f53b98d20dc6  gcc/ChangeLog
  a3b63c675afa7a655cc2bfa8a907af79  gcc/ChangeLog-1997
  d9a88529352a010253c2e8fb1ed6023b  gcc/ChangeLog-1998
  240f08f81cb4699e8b49347db38233db  gcc/ChangeLog-1999
--- 505,511 ----
  a916467b91076e631dd8edb7424769c7  gcc/COPYING.LIB
  d32239bcb673463ab874e80d47fae504  gcc/COPYING3
  6a6a8e020838b23406c81b19c1d46df6  gcc/COPYING3.LIB
! 7b5ed6376d99cf2b83ed855290443c90  gcc/ChangeLog
  a3b63c675afa7a655cc2bfa8a907af79  gcc/ChangeLog-1997
  d9a88529352a010253c2e8fb1ed6023b  gcc/ChangeLog-1998
  240f08f81cb4699e8b49347db38233db  gcc/ChangeLog-1999
*************** fb3fadb88e1d2b3b640cfaaa5ff11780  gcc/Ch
*** 541,547 ****
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! b9969bb2845fe8fa9aa55515a6f7a417  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
--- 541,547 ----
  3eb07e0b2e542409bf73d359f7f65609  gcc/ChangeLog.ptr
  e13638e26743ba41e6011b76cc00d9a9  gcc/ChangeLog.tree-ssa
  739ab47f6425bcea1d05e4fc0542de54  gcc/ChangeLog.tuples
! cfb29dd6502187510c0f93521e6e2ad0  gcc/DATESTAMP
  d41d8cd98f00b204e9800998ecf8427e  gcc/DEV-PHASE
  eb92e1ff5e982ca07e173e0eb286d243  gcc/FSFChangeLog
  30e1e33411566388b3164558482dc5e6  gcc/FSFChangeLog.10
*************** a32e244dd629c43a93ec8aadecdbeb14  gcc/co
*** 3540,3546 ****
  1795b7bf4992d29ce0f407ca9b90a7c3  gcc/config/arm/arm-tables.opt
  f805d118929dd79f6bd4dc75c77c968b  gcc/config/arm/arm-tables.opt.urls
  f68c4ef34df906d99e11d3cda55c8375  gcc/config/arm/arm-tune.md
! a64401ed507cafc98f8734bf8b3b9d7c  gcc/config/arm/arm.cc
  d627c9b9062533642a559523336390dc  gcc/config/arm/arm.h
  cacbb60deff2d37bf8d70ad3f494353e  gcc/config/arm/arm.md
  aafba6eef2fa39161c820beb71e74b41  gcc/config/arm/arm.opt
--- 3540,3546 ----
  1795b7bf4992d29ce0f407ca9b90a7c3  gcc/config/arm/arm-tables.opt
  f805d118929dd79f6bd4dc75c77c968b  gcc/config/arm/arm-tables.opt.urls
  f68c4ef34df906d99e11d3cda55c8375  gcc/config/arm/arm-tune.md
! 718f4f1564d9199b9553b77b6f25bbe4  gcc/config/arm/arm.cc
  d627c9b9062533642a559523336390dc  gcc/config/arm/arm.h
  cacbb60deff2d37bf8d70ad3f494353e  gcc/config/arm/arm.md
  aafba6eef2fa39161c820beb71e74b41  gcc/config/arm/arm.opt
*************** dc8e1ff924dd1f2699f60837b792825a  gcc/co
*** 3629,3635 ****
  8c0b4a60653a17f203a5cfb1a8fc002a  gcc/config/arm/t-symbian
  39be57a549825d2444946fe5f693a90e  gcc/config/arm/t-vxworks
  87896a997e36e53ebdce8c63842d9282  gcc/config/arm/thumb1.md
! d365e30d51e84eee3d4c690431b36a5b  gcc/config/arm/thumb2.md
  04f108386512544ce1d6596ad6e66db1  gcc/config/arm/types.md
  734d555ff2653ad7065e13ddce683abf  gcc/config/arm/uclinux-eabi.h
  62ee64e5a550f39e265007bb0bbcdd7c  gcc/config/arm/uclinux-elf.h
--- 3629,3635 ----
  8c0b4a60653a17f203a5cfb1a8fc002a  gcc/config/arm/t-symbian
  39be57a549825d2444946fe5f693a90e  gcc/config/arm/t-vxworks
  87896a997e36e53ebdce8c63842d9282  gcc/config/arm/thumb1.md
! f962d4dc02fe6670fc9ae9ee9d71d55b  gcc/config/arm/thumb2.md
  04f108386512544ce1d6596ad6e66db1  gcc/config/arm/types.md
  734d555ff2653ad7065e13ddce683abf  gcc/config/arm/uclinux-eabi.h
  62ee64e5a550f39e265007bb0bbcdd7c  gcc/config/arm/uclinux-elf.h
*************** bfe56ce9bd6fa014dfb8ec10b0e220e7  gcc/co
*** 3650,3656 ****
  aacc6ecb9694d2f6283dbdfd61c9d0d7  gcc/config/avr/avr-dimode.md
  7ae67bca77c9ea131be5692c358dda69  gcc/config/avr/avr-fixed.md
  5ca3add3bb846b864908fa520718a481  gcc/config/avr/avr-log.cc
! fc7c9708ae7297f2efa19b23ab9e8574  gcc/config/avr/avr-mcus.def
  c57f11c8377690ba9023949f07b9355d  gcc/config/avr/avr-modes.def
  e463aeaf15d36b313935a1486e19fe50  gcc/config/avr/avr-passes.def
  b812676480e10c55ca64c09cae522a6a  gcc/config/avr/avr-protos.h
--- 3650,3656 ----
  aacc6ecb9694d2f6283dbdfd61c9d0d7  gcc/config/avr/avr-dimode.md
  7ae67bca77c9ea131be5692c358dda69  gcc/config/avr/avr-fixed.md
  5ca3add3bb846b864908fa520718a481  gcc/config/avr/avr-log.cc
! 26ce65013036461cc14f6947f2825a4a  gcc/config/avr/avr-mcus.def
  c57f11c8377690ba9023949f07b9355d  gcc/config/avr/avr-modes.def
  e463aeaf15d36b313935a1486e19fe50  gcc/config/avr/avr-passes.def
  b812676480e10c55ca64c09cae522a6a  gcc/config/avr/avr-protos.h
*************** aa1c9493107eefcfd7a64479fccc57e8  gcc/di
*** 5754,5760 ****
  1d5406c2c00778685af4d54cedf49ae6  gcc/digraph.cc
  84e9d01f2dbadb091f992b9902508cb6  gcc/digraph.h
  a84ff6fc2f7744beef98a11d4d3c1c6c  gcc/doc/analyzer.texi
! be63162c20e7e3b9e70cd7668f557eea  gcc/doc/avr-mmcu.texi
  b44c0e4fd6840dc6fd667f8f678ef28e  gcc/doc/bugreport.texi
  40403afec90bef8912a33c829ef123d4  gcc/doc/cfg.texi
  7c0efad1ccaaaafbfb1dd4b2c3fecaa5  gcc/doc/collect2.texi
--- 5754,5760 ----
  1d5406c2c00778685af4d54cedf49ae6  gcc/digraph.cc
  84e9d01f2dbadb091f992b9902508cb6  gcc/digraph.h
  a84ff6fc2f7744beef98a11d4d3c1c6c  gcc/doc/analyzer.texi
! 8a085b8bf37c53e2d8b0866a196d9000  gcc/doc/avr-mmcu.texi
  b44c0e4fd6840dc6fd667f8f678ef28e  gcc/doc/bugreport.texi
  40403afec90bef8912a33c829ef123d4  gcc/doc/cfg.texi
  7c0efad1ccaaaafbfb1dd4b2c3fecaa5  gcc/doc/collect2.texi
*************** e9c4136d3b6d2c8a5db4605cca8d8ac9  gcc/gi
*** 6063,6069 ****
  2c9bf44778a0d4078822e0867f454d35  gcc/gimple-harden-conditionals.cc
  c7112787b043c022d8874ce63d5b7a10  gcc/gimple-harden-control-flow.cc
  7b9c652a539854b936cc26f338cbb75d  gcc/gimple-if-to-switch.cc
! 43f8b8bf6a49590155c84b07b89f0c6f  gcc/gimple-isel.cc
  a81f7f0172ce4eb3ca285e0cc9ddbd68  gcc/gimple-iterator.cc
  1a7fa33c9fca25ddfbd2d1424ee5a53a  gcc/gimple-iterator.h
  15643e1e01d585f6452ec246a61a2053  gcc/gimple-laddress.cc
--- 6063,6069 ----
  2c9bf44778a0d4078822e0867f454d35  gcc/gimple-harden-conditionals.cc
  c7112787b043c022d8874ce63d5b7a10  gcc/gimple-harden-control-flow.cc
  7b9c652a539854b936cc26f338cbb75d  gcc/gimple-if-to-switch.cc
! 224b3669ba4bbfa6c9493f47603df324  gcc/gimple-isel.cc
  a81f7f0172ce4eb3ca285e0cc9ddbd68  gcc/gimple-iterator.cc
  1a7fa33c9fca25ddfbd2d1424ee5a53a  gcc/gimple-iterator.h
  15643e1e01d585f6452ec246a61a2053  gcc/gimple-laddress.cc
*************** e8a9eb01b9451a357155e7152df1c669  gcc/ta
*** 8061,8067 ****
  a05663c52c607143c607d3ecf1391979  gcc/targhooks.cc
  51d240e574a3f9ecec346d64a04ac634  gcc/targhooks.h
  f39fcaa8197187283ccfed40107b426d  gcc/testsuite/.gitattributes
! 7581a7ff538108d0faf5aa9fa31cd0d4  gcc/testsuite/ChangeLog
  862f04afbd87da2cc6bc432c3f28430f  gcc/testsuite/ChangeLog-1993-2007
  029a5d8dacd25eb5d4711452ac448e5b  gcc/testsuite/ChangeLog-2008
  13ac28c41d51b66b4ec40dba6bd50f39  gcc/testsuite/ChangeLog-2009
--- 8061,8067 ----
  a05663c52c607143c607d3ecf1391979  gcc/targhooks.cc
  51d240e574a3f9ecec346d64a04ac634  gcc/targhooks.h
  f39fcaa8197187283ccfed40107b426d  gcc/testsuite/.gitattributes
! 3070003739dfb0788483a91f75a4e412  gcc/testsuite/ChangeLog
  862f04afbd87da2cc6bc432c3f28430f  gcc/testsuite/ChangeLog-1993-2007
  029a5d8dacd25eb5d4711452ac448e5b  gcc/testsuite/ChangeLog-2008
  13ac28c41d51b66b4ec40dba6bd50f39  gcc/testsuite/ChangeLog-2009
*************** a3d075dd1b96232581aa40c9e02294e1  gcc/te
*** 46981,46986 ****
--- 46981,46988 ----
  9444444b4f048eadd4b6a2d7592f5fca  gcc/testsuite/gcc.dg/pr120480.c
  4a9d9632d82cf6c4f4f4acbad8ab018d  gcc/testsuite/gcc.dg/pr120638.c
  7032b52dc2dd1e6cab514293c2d0b276  gcc/testsuite/gcc.dg/pr121322.c
+ 3675df2622072bf0e5cccbf94e93a50f  gcc/testsuite/gcc.dg/pr122126_vextr.c
+ b975ebfa27ac446e553bacbb75421590  gcc/testsuite/gcc.dg/pr122126_vset.c
  bc5ddfbbc46f4e0cce1629d1b58d3090  gcc/testsuite/gcc.dg/pr12603.c
  72a2fca76cb69617ae36bab93c7ec0d7  gcc/testsuite/gcc.dg/pr12625-1.c
  6f0ef61e5a12db5f11da839b2988c5e1  gcc/testsuite/gcc.dg/pr13519-1.c
*************** e5306c98e7af9542607cef498d9d4cab  gcc/te
*** 64934,64939 ****
--- 64936,64942 ----
  bf06244dec6dc49e0817b03e4494a90f  gcc/testsuite/gcc.target/arm/builtin_uaddll.c
  f842ae48d03fd71d6c4251ee6b88d526  gcc/testsuite/gcc.target/arm/builtin_usubl.c
  33305e972aaa5cd2660665305329c212  gcc/testsuite/gcc.target/arm/builtin_usubll.c
+ 00d46b35880659bc8001ea4047b5bb1c  gcc/testsuite/gcc.target/arm/cbz-range.c
  528a1cc7ada5bc63c0c59152d86b8557  gcc/testsuite/gcc.target/arm/cbz.c
  78f9bef0e50a143219120e7b5b4af7b9  gcc/testsuite/gcc.target/arm/cmp-1.c
  97376f46024c436de8ce633177de6e0b  gcc/testsuite/gcc.target/arm/cmp-2.c
diff -Nrcpad gcc-14-20251121/gcc/ChangeLog gcc-14-20251128/gcc/ChangeLog
*** gcc-14-20251121/gcc/ChangeLog	Fri Nov 21 22:32:18 2025
--- gcc-14-20251128/gcc/ChangeLog	Fri Nov 28 22:32:05 2025
***************
*** 1,3 ****
--- 1,26 ----
+ 2025-11-27  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	Backported from master:
+ 	2025-11-27  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	* config/avr/avr-mcus.def (AVR_MCUS): Add avr16la14, avr16la20,
+ 	avr16la28, avr16la32, avr32la14, avr32la20, avr32la28, avr32la32.
+ 	* doc/avr-mmcu.texi: Rebuild.
+ 
+ 2025-11-27  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	Backported from master:
+ 	2025-11-26  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/122867
+ 	* config/arm/arm.cc (arm_print_operand): Use %- to
+ 	emit LOCAL_LABEL_PREFIX.
+ 	(arm_print_operand_punct_valid_p): Allow %- for punct
+ 	and make %_ valid for all compilation variants.
+ 	* config/arm/thumb2.md (*thumb2_cbz): Handle very
+ 	large branch ranges that exceed the limit of b<cond>.
+ 	(*thumb2_cbnz): Likewise.
+ 
  2025-11-20  Xi Ruoyao  <xry111@xry111.site>
  
  	Backported from master:
diff -Nrcpad gcc-14-20251121/gcc/DATESTAMP gcc-14-20251128/gcc/DATESTAMP
*** gcc-14-20251121/gcc/DATESTAMP	Fri Nov 21 22:32:18 2025
--- gcc-14-20251128/gcc/DATESTAMP	Fri Nov 28 22:32:06 2025
***************
*** 1 ****
! 20251121
--- 1 ----
! 20251128
diff -Nrcpad gcc-14-20251121/gcc/config/arm/arm.cc gcc-14-20251128/gcc/config/arm/arm.cc
*** gcc-14-20251121/gcc/config/arm/arm.cc	Fri Nov 21 22:32:19 2025
--- gcc-14-20251128/gcc/config/arm/arm.cc	Fri Nov 28 22:32:06 2025
*************** arm_print_condition (FILE *stream)
*** 24153,24159 ****
  
  
  /* Globally reserved letters: acln
!    Puncutation letters currently used: @_|?().!#
     Lower case letters currently used: bcdefhimpqtvwxyz
     Upper case letters currently used: ABCDEFGHIJKLMNOPQRSTUV
     Letters previously used, but now deprecated/obsolete: sWXYZ.
--- 24153,24159 ----
  
  
  /* Globally reserved letters: acln
!    Puncutation letters currently used: @_-|?().!#
     Lower case letters currently used: bcdefhimpqtvwxyz
     Upper case letters currently used: ABCDEFGHIJKLMNOPQRSTUV
     Letters previously used, but now deprecated/obsolete: sWXYZ.
*************** arm_print_operand (FILE *stream, rtx x,
*** 24188,24193 ****
--- 24188,24198 ----
      case '_':
        fputs (user_label_prefix, stream);
        return;
+     case '-':
+ #ifdef LOCAL_LABEL_PREFIX
+       fputs (LOCAL_LABEL_PREFIX, stream);
+ #endif
+       return;
  
      case '|':
        fputs (REGISTER_PREFIX, stream);
*************** arm_print_operand_punct_valid_p (unsigne
*** 25038,25046 ****
  {
    return (code == '@' || code == '|' || code == '.'
  	  || code == '(' || code == ')' || code == '#'
  	  || (TARGET_32BIT && (code == '?'))
! 	  || (TARGET_THUMB2 && (code == '!'))
! 	  || (TARGET_THUMB && (code == '_')));
  }
  
  /* Target hook for assembling integer objects.  The ARM version needs to
--- 25043,25051 ----
  {
    return (code == '@' || code == '|' || code == '.'
  	  || code == '(' || code == ')' || code == '#'
+ 	  || code == '-' || code == '_'
  	  || (TARGET_32BIT && (code == '?'))
! 	  || (TARGET_THUMB2 && (code == '!')));
  }
  
  /* Target hook for assembling integer objects.  The ARM version needs to
diff -Nrcpad gcc-14-20251121/gcc/config/arm/thumb2.md gcc-14-20251128/gcc/config/arm/thumb2.md
*** gcc-14-20251121/gcc/config/arm/thumb2.md	Fri Nov 21 22:32:19 2025
--- gcc-14-20251128/gcc/config/arm/thumb2.md	Fri Nov 28 22:32:06 2025
***************
*** 1465,1483 ****
  	      (pc)))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_THUMB2"
!   "*
!   if (get_attr_length (insn) == 2)
!     return \"cbz\\t%0, %l1\";
!   else
!     return \"cmp\\t%0, #0\;beq\\t%l1\";
!   "
    [(set (attr "length")
          (if_then_else
  	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
  	         (le (minus (match_dup 1) (pc)) (const_int 128))
  	         (not (match_test "which_alternative")))
  	    (const_int 2)
! 	    (const_int 8)))
     (set_attr "type" "branch,multiple")]
  )
  
--- 1465,1488 ----
  	      (pc)))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_THUMB2"
!   {
!     int offset = (INSN_ADDRESSES (INSN_UID (operands[1]))
! 		  - INSN_ADDRESSES (INSN_UID (insn)));
!     if (get_attr_length (insn) == 2)
!       return "cbz\t%0, %l1";
!     else if (offset >= -1048564 && offset <= 1048576)
!       return "cmp\t%0, #0\;beq\t%l1";
!     else if (which_alternative == 0)
!       return "cbnz\t%0, %-LCB%=\;b\t%l1\n%-LCB%=:";
!     return "cmp\t%0, #0\;bne\t%-LCB%=\;b\t%l1\n%-LCB%=:";
!   }
    [(set (attr "length")
          (if_then_else
  	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
  	         (le (minus (match_dup 1) (pc)) (const_int 128))
  	         (not (match_test "which_alternative")))
  	    (const_int 2)
! 	    (const_int 10)))
     (set_attr "type" "branch,multiple")]
  )
  
***************
*** 1489,1507 ****
  	      (pc)))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_THUMB2"
!   "*
!   if (get_attr_length (insn) == 2)
!     return \"cbnz\\t%0, %l1\";
!   else
!     return \"cmp\\t%0, #0\;bne\\t%l1\";
!   "
    [(set (attr "length")
          (if_then_else
  	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
  	         (le (minus (match_dup 1) (pc)) (const_int 128))
  	         (not (match_test "which_alternative")))
  	    (const_int 2)
! 	    (const_int 8)))
     (set_attr "type" "branch,multiple")]
  )
  
--- 1494,1517 ----
  	      (pc)))
     (clobber (reg:CC CC_REGNUM))]
    "TARGET_THUMB2"
!   {
!     int offset = (INSN_ADDRESSES (INSN_UID (operands[1]))
! 		  - INSN_ADDRESSES (INSN_UID (insn)));
!     if (get_attr_length (insn) == 2)
!       return "cbnz\t%0, %l1";
!     else if (offset >= -1048564 && offset <= 1048576)
!       return "cmp\t%0, #0\;bne\t%l1";
!     else if (which_alternative == 0)
!       return "cbz\t%0, %-LCB%=\;b\t%l1\n%-LCB%=:";
!     return "cmp\t%0, #0\;beq\t%-LCB%=\;b\t%l1\n%-LCB%=:";
!   }
    [(set (attr "length")
          (if_then_else
  	    (and (ge (minus (match_dup 1) (pc)) (const_int 2))
  	         (le (minus (match_dup 1) (pc)) (const_int 128))
  	         (not (match_test "which_alternative")))
  	    (const_int 2)
! 	    (const_int 10)))
     (set_attr "type" "branch,multiple")]
  )
  
diff -Nrcpad gcc-14-20251121/gcc/config/avr/avr-mcus.def gcc-14-20251128/gcc/config/avr/avr-mcus.def
*** gcc-14-20251121/gcc/config/avr/avr-mcus.def	Fri Nov 21 22:32:19 2025
--- gcc-14-20251128/gcc/config/avr/avr-mcus.def	Fri Nov 28 22:32:06 2025
*************** AVR_MCU ("avr16ea48",        ARCH_AVRXME
*** 421,426 ****
--- 421,434 ----
  AVR_MCU ("avr32ea28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA28__",   0x7000, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32ea32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA32__",   0x7000, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32ea48",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32EA48__",   0x7000, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr16la14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA14__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16la20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA20__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16la28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA28__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr16la32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR16LA32__",   0x7800, 0x0, 0x4000, 0x8000)
+ AVR_MCU ("avr32la14",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA14__",   0x7800, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32la20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA20__",   0x7800, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32la28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA28__",   0x7800, 0x0, 0x8000, 0x8000)
+ AVR_MCU ("avr32la32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32LA32__",   0x7800, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32sd20",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32SD20__",   0x7000, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32sd28",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32SD28__",   0x7000, 0x0, 0x8000, 0x8000)
  AVR_MCU ("avr32sd32",        ARCH_AVRXMEGA3, AVR_ISA_NONE,  "__AVR_AVR32SD32__",   0x7000, 0x0, 0x8000, 0x8000)
diff -Nrcpad gcc-14-20251121/gcc/doc/avr-mmcu.texi gcc-14-20251128/gcc/doc/avr-mmcu.texi
*** gcc-14-20251121/gcc/doc/avr-mmcu.texi	Fri Nov 21 22:32:20 2025
--- gcc-14-20251128/gcc/doc/avr-mmcu.texi	Fri Nov 28 22:32:07 2025
***************
*** 54,60 ****
  
  @item @anchor{avrxmega3}avrxmega3
  ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space.
! @*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto}, @code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826}, @code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624}, @code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}, @code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32}, @code{avr16du14}, @code{avr16du20}, @code{avr16du28}, @code{avr16du32}, @code{avr16ea28}, @code{avr16ea32}, @code{avr16ea48}, @code{avr16eb14}, @code{avr16eb20}, @code{avr16eb28}, @code{avr16eb32}, @code{avr32da28}, @code{avr32da28s}, @code{avr32da32}, @code{avr32da32s}, @code{avr32da48}, @code{avr32da48s}, @code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14}, @code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}, @code{avr32du14}, @code{avr32du20}, @code{avr32du28}, @code{avr32du32}, @code{avr32ea28}, @code{avr32ea32}, @code{avr32ea48}, @code{avr32eb14}, @code{avr32eb20}, @code{avr32eb28}, @code{avr32eb32}, @code{avr32sd20}, @code{avr32sd28}, @code{avr32sd32}.
  
  @item @anchor{avrxmega4}avrxmega4
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory.
--- 54,60 ----
  
  @item @anchor{avrxmega3}avrxmega3
  ``XMEGA'' devices with up to 64@tie{}KiB of combined program memory and RAM, and with program memory visible in the RAM address space.
! @*@var{mcu}@tie{}= @code{attiny202}, @code{attiny204}, @code{attiny212}, @code{attiny214}, @code{attiny402}, @code{attiny404}, @code{attiny406}, @code{attiny412}, @code{attiny414}, @code{attiny416}, @code{attiny416auto}, @code{attiny417}, @code{attiny424}, @code{attiny426}, @code{attiny427}, @code{attiny804}, @code{attiny806}, @code{attiny807}, @code{attiny814}, @code{attiny816}, @code{attiny817}, @code{attiny824}, @code{attiny826}, @code{attiny827}, @code{attiny1604}, @code{attiny1606}, @code{attiny1607}, @code{attiny1614}, @code{attiny1616}, @code{attiny1617}, @code{attiny1624}, @code{attiny1626}, @code{attiny1627}, @code{attiny3214}, @code{attiny3216}, @code{attiny3217}, @code{attiny3224}, @code{attiny3226}, @code{attiny3227}, @code{atmega808}, @code{atmega809}, @code{atmega1608}, @code{atmega1609}, @code{atmega3208}, @code{atmega3209}, @code{atmega4808}, @code{atmega4809}, @code{avr16dd14}, @code{avr16dd20}, @code{avr16dd28}, @code{avr16dd32}, @code{avr16du14}, @code{avr16du20}, @code{avr16du28}, @code{avr16du32}, @code{avr16ea28}, @code{avr16ea32}, @code{avr16ea48}, @code{avr16eb14}, @code{avr16eb20}, @code{avr16eb28}, @code{avr16eb32}, @code{avr16la14}, @code{avr16la20}, @code{avr16la28}, @code{avr16la32}, @code{avr32da28}, @code{avr32da28s}, @code{avr32da32}, @code{avr32da32s}, @code{avr32da48}, @code{avr32da48s}, @code{avr32db28}, @code{avr32db32}, @code{avr32db48}, @code{avr32dd14}, @code{avr32dd20}, @code{avr32dd28}, @code{avr32dd32}, @code{avr32du14}, @code{avr32du20}, @code{avr32du28}, @code{avr32du32}, @code{avr32ea28}, @code{avr32ea32}, @code{avr32ea48}, @code{avr32eb14}, @code{avr32eb20}, @code{avr32eb28}, @code{avr32eb32}, @code{avr32la14}, @code{avr32la20}, @code{avr32la28}, @code{avr32la32}, @code{avr32sd20}, @code{avr32sd28}, @code{avr32sd32}.
  
  @item @anchor{avrxmega4}avrxmega4
  ``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of program memory.
diff -Nrcpad gcc-14-20251121/gcc/gimple-isel.cc gcc-14-20251128/gcc/gimple-isel.cc
*** gcc-14-20251121/gcc/gimple-isel.cc	Fri Nov 21 22:32:20 2025
--- gcc-14-20251128/gcc/gimple-isel.cc	Fri Nov 28 22:32:07 2025
*************** gimple_expand_vec_set_extract_expr (stru
*** 101,106 ****
--- 101,116 ----
        tree pos = TREE_OPERAND (ref, 1);
  
        tree view_op0 = TREE_OPERAND (op0, 0);
+ 
+       tree idx = TREE_OPERAND (ref, 1);
+       // if index is a constant, then check the bounds
+       poly_uint64 idx_poly;
+       if (poly_int_tree_p (idx, &idx_poly))
+ 	{
+ 	  poly_uint64 nelts = TYPE_VECTOR_SUBPARTS (TREE_TYPE (view_op0));
+ 	  if (known_gt (idx_poly, nelts))
+ 	    return false;
+ 	}
        machine_mode outermode = TYPE_MODE (TREE_TYPE (view_op0));
        machine_mode extract_mode = TYPE_MODE (TREE_TYPE (ref));
  
diff -Nrcpad gcc-14-20251121/gcc/testsuite/ChangeLog gcc-14-20251128/gcc/testsuite/ChangeLog
*** gcc-14-20251121/gcc/testsuite/ChangeLog	Fri Nov 21 22:32:21 2025
--- gcc-14-20251128/gcc/testsuite/ChangeLog	Fri Nov 28 22:32:08 2025
***************
*** 1,3 ****
--- 1,11 ----
+ 2025-11-27  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	Backported from master:
+ 	2025-11-26  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/122867
+ 	* gcc.target/arm/cbz-range.c: New test.
+ 
  2025-11-20  Xi Ruoyao  <xry111@xry111.site>
  
  	Backported from master:
diff -Nrcpad gcc-14-20251121/gcc/testsuite/gcc.dg/pr122126_vextr.c gcc-14-20251128/gcc/testsuite/gcc.dg/pr122126_vextr.c
*** gcc-14-20251121/gcc/testsuite/gcc.dg/pr122126_vextr.c	Thu Jan  1 00:00:00 1970
--- gcc-14-20251128/gcc/testsuite/gcc.dg/pr122126_vextr.c	Fri Nov 28 22:32:10 2025
***************
*** 0 ****
--- 1,9 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ /* { dg-additional-options "-mavx2" { target avx2 } } */
+ 
+ #define vect16 __attribute__((vector_size(16)))
+ void ub_set() {
+   volatile vect16 unsigned BS_VAR_0;
+   unsigned a = BS_VAR_0[12];
+ }
diff -Nrcpad gcc-14-20251121/gcc/testsuite/gcc.dg/pr122126_vset.c gcc-14-20251128/gcc/testsuite/gcc.dg/pr122126_vset.c
*** gcc-14-20251121/gcc/testsuite/gcc.dg/pr122126_vset.c	Thu Jan  1 00:00:00 1970
--- gcc-14-20251128/gcc/testsuite/gcc.dg/pr122126_vset.c	Fri Nov 28 22:32:10 2025
***************
*** 0 ****
--- 1,9 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2" } */
+ /* { dg-additional-options "-mavx2" { target avx2 } } */
+ 
+ #define vect16 __attribute__((vector_size(16)))
+ void ub_set() {
+   volatile vect16 unsigned BS_VAR_0;
+   BS_VAR_0[12] = 4;
+ }
diff -Nrcpad gcc-14-20251121/gcc/testsuite/gcc.target/arm/cbz-range.c gcc-14-20251128/gcc/testsuite/gcc.target/arm/cbz-range.c
*** gcc-14-20251121/gcc/testsuite/gcc.target/arm/cbz-range.c	Thu Jan  1 00:00:00 1970
--- gcc-14-20251128/gcc/testsuite/gcc.target/arm/cbz-range.c	Fri Nov 28 22:32:11 2025
***************
*** 0 ****
--- 1,114 ----
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_arch_v7a_ok } */
+ /* { dg-options "-O -mthumb" } */
+ /* { dg-add-options arm_arch_v7a } */
+ 
+ #define f "movw r0, #0;movw r0, #0;movw r0, #0;"
+ #define f2 f f
+ #define f4 f2 f2
+ #define f8 f4 f4
+ #define f16 f8 f8
+ #define f32 f16 f16
+ #define f64 f32 f32
+ #define f128 f64 f64
+ #define f256 f128 f128
+ #define f512 f256 f256
+ #define f1024 f512 f512
+ #define f2048 f1024 f1024
+ #define f4096 f2048 f2048
+ #define f8192 f4096 f4096
+ #define f16384 f8192 f8192
+ #define f32768 f16384 f16384
+ #define f65536 f32768 f32768
+ #define f131072 f65536 f65536
+ int a;
+ 
+ int cbz1(int g)
+ {
+   if (g)
+     asm(f8);
+   return a;
+ }
+ 
+ int cbz2(int g)
+ {
+   asm ("": "+h"(g));
+   if (g)
+     asm(f8);
+   return a;
+ }
+ 
+ int cbz3(int g)
+ {
+   if (g)
+     asm(f16);
+   return a;
+ }
+ 
+ int cbz4(int g)
+ {
+   asm ("": "+h"(g));
+   if (g)
+     asm(f16);
+   return a;
+ }
+ 
+ int cbz5(int g)
+ {
+   if (g)
+     asm(f131072);
+   return a;
+ }
+ 
+ int cbz6(int g)
+ {
+   asm ("": "+h"(g));
+   if (g)
+     asm(f131072);
+   return a;
+ }
+ 
+ int cbnz1(int g)
+ {
+   if (!g)
+     asm(f8);
+   return a;
+ }
+ 
+ int cbnz2(int g)
+ {
+   asm ("": "+h"(g));
+   if (!g)
+     asm(f8);
+   return a;
+ }
+ 
+ int cbnz3(int g)
+ {
+   if (!g)
+     asm(f16);
+   return a;
+ }
+ 
+ int cbnz4(int g)
+ {
+   asm ("": "+h"(g));
+   if (!g)
+     asm(f16);
+   return a;
+ }
+ 
+ int cbnz5(int g)
+ {
+   if (!g)
+     asm(f131072);
+   return a;
+ }
+ 
+ int cbnz6(int g)
+ {
+   asm ("": "+h"(g));
+   if (!g)
+     asm(f131072);
+   return a;
+ }
