diff -Nrcpad gcc-16-20250831/ChangeLog gcc-16-20250907/ChangeLog
*** gcc-16-20250831/ChangeLog	Sun Aug 31 22:32:10 2025
--- gcc-16-20250907/ChangeLog	Sun Sep  7 22:32:52 2025
***************
*** 1,3 ****
--- 1,11 ----
+ 2025-09-04  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+ 
+ 	* MAINTAINERS (Reviewers): Add myself for the aarch64 port.
+ 
+ 2025-09-03  Alice Carlotti  <alice.carlotti@arm.com>
+ 
+ 	* MAINTAINERS: Add myself as an aarch64 port reviewer.
+ 
  2025-08-28  Yuao Ma  <c8ef@outlook.com>
  
  	* MAINTAINERS: add myself to write after approval
diff -Nrcpad gcc-16-20250831/LAST_UPDATED gcc-16-20250907/LAST_UPDATED
*** gcc-16-20250831/LAST_UPDATED	Sun Aug 31 22:34:38 2025
--- gcc-16-20250907/LAST_UPDATED	Sun Sep  7 22:35:26 2025
***************
*** 1 ****
! Obtained from git: master revision d21f10259f64723f8deae3bccc15128075de4851
--- 1 ----
! Obtained from git: master revision 7e1143abd32cd40d24479d4c536b610ea9aad2db
diff -Nrcpad gcc-16-20250831/MAINTAINERS gcc-16-20250907/MAINTAINERS
*** gcc-16-20250831/MAINTAINERS	Sun Aug 31 22:32:10 2025
--- gcc-16-20250907/MAINTAINERS	Sun Sep  7 22:32:52 2025
*************** check in changes outside of the parts of
*** 274,281 ****
--- 274,283 ----
  
                          Reviewers
  
+ aarch64 port            Alice Carlotti          <alice.carlotti@arm.com>
  aarch64 port            Alex Coplan             <alex.coplan@arm.com>
  aarch64 port            Andrew Pinski           <andrew.pinski@oss.qualcomm.com>
+ aarch64 port            Wilco Dijkstra          <wilco.dijkstra@arm.com>
  arm port (MVE)          Christophe Lyon         <christophe.lyon@arm.com>
  callgraph               Martin Jambor           <mjambor@suse.cz>
  C front end             Marek Polacek           <polacek@redhat.com>
*************** Jerry DeLisle                   jvdelisl
*** 446,452 ****
  DJ Delorie                      dj              <dj@delorie.com>
  Chris Demetriou                 cgd             <cgd@google.com>
  Sameera Deshpande               sameerad        <sameera.deshpande@linaro.org>
! Wilco Dijkstra                  wilco           <wdijkstr@arm.com>
  Dimitar Dimitrov                dimitar         <dimitar@dinux.eu>
  Benoit Dupont de Dinechin       bd3             <benoit.dupont-de-dinechin@st.com>
  Lehua Ding                      -               <lehua.ding@rivai.ai>
--- 448,454 ----
  DJ Delorie                      dj              <dj@delorie.com>
  Chris Demetriou                 cgd             <cgd@google.com>
  Sameera Deshpande               sameerad        <sameera.deshpande@linaro.org>
! Wilco Dijkstra                  wilco           <wilco.dijkstra@arm.com>
  Dimitar Dimitrov                dimitar         <dimitar@dinux.eu>
  Benoit Dupont de Dinechin       bd3             <benoit.dupont-de-dinechin@st.com>
  Lehua Ding                      -               <lehua.ding@rivai.ai>
diff -Nrcpad gcc-16-20250831/MD5SUMS gcc-16-20250907/MD5SUMS
*** gcc-16-20250831/MD5SUMS	Sun Aug 31 22:34:42 2025
--- gcc-16-20250907/MD5SUMS	Sun Sep  7 22:35:46 2025
***************
*** 1,5 ****
  # This file contains the MD5 checksums of the files in the
! # gcc-16-20250831.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
--- 1,5 ----
  # This file contains the MD5 checksums of the files in the
! # gcc-16-20250907.tar.xz tarball.
  #
  # Besides verifying that all files in the tarball were correctly expanded,
  # it also can be used to determine if any files have changed since the
*************** ac5a8807f431d3dab46a7425b96379e4  .gitig
*** 21,32 ****
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--- 21,32 ----
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*************** a22e70b3f29292d0e628450f4bb11e62  fixinc
*** 516,522 ****
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--- 516,522 ----
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*************** fb3fadb88e1d2b3b640cfaaa5ff11780  gcc/Ch
*** 553,565 ****
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--- 553,565 ----
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*************** c77616ec7ed7ec81357de9544f955910  gcc/at
*** 3168,3174 ****
  6e6a84b213adacaae73a6cb01cc52027  gcc/attribs.h
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! c93dbe4a6db404ba92eae5773bf14bd5  gcc/auto-profile.cc
  750f46d563af89307c9b19bbb4a2dd18  gcc/auto-profile.h
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--- 3168,3174 ----
  6e6a84b213adacaae73a6cb01cc52027  gcc/attribs.h
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! f0e5638a5f27d0f41657e67c4144b747  gcc/auto-profile.cc
  750f46d563af89307c9b19bbb4a2dd18  gcc/auto-profile.h
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  b187aaef50f37afeeee1f8239d5aa033  gcc/avoid-store-forwarding.h
*************** fe292df4b7f3e3ef7c0b8305084b6844  gcc/bi
*** 3182,3189 ****
  7cd04e6f25d02f9f2cecc8ce50e73e76  gcc/btfout.cc
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! 9519cf786b112194737e7d0c3534a854  gcc/builtins.cc
! 4928906d86168cbc863e309bdb3ec391  gcc/builtins.def
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--- 3182,3189 ----
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  644ae78fbe2e513e06637aa080774d55  gcc/builtin-attrs.def
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! 9a19defef3c48e371d4ffc9f79b15414  gcc/builtins.cc
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*************** a977ddda313933a15767f0f354618de3  gcc/c-
*** 3228,3249 ****
  ac5daa4f7d7788a3f68dde7fe7a25316  gcc/c-family/known-headers.h
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! d83123fca1cdf41c40f626f1f27d5a87  gcc/c/c-decl.cc
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! 2e95b53860451e6031015227d6f4161c  gcc/c/c-parser.cc
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--- 3228,3249 ----
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! d1945edf86f67458bb923b9c7f24a1a4  gcc/c/c-parser.cc
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*************** e8aea35c3537127601ec95f65a09591c  gcc/cg
*** 3279,3285 ****
  b87eab2b04054f0d3cd20768be99c655  gcc/cgraphclones.cc
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! 67adc54335a81da60ac71b6ee4d748da  gcc/cobol/ChangeLog
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--- 3279,3285 ----
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*************** bdd6fbf13776c7983a16ac857615424c  gcc/co
*** 3298,3304 ****
  14b121f37018fb2571c4e1ac8f69d0a1  gcc/cobol/gcobol.1
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! 66947cdcffdd9499146fa2de12e9847c  gcc/cobol/genapi.cc
  fefbd6d69c93a7c38a117cba57a9958f  gcc/cobol/genapi.h
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  e9232e498b04c68faa18eb31fabd8177  gcc/cobol/gengen.h
--- 3298,3304 ----
  14b121f37018fb2571c4e1ac8f69d0a1  gcc/cobol/gcobol.1
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! cc9b8a39041bc864dea1be5aa86cf4fb  gcc/cobol/genapi.cc
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*************** d5f8cc9842e0f1f1648dc07251b7e682  gcc/co
*** 3322,3329 ****
  197fd99a62b2440c1460f4ffbf664806  gcc/cobol/show_parse.h
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! 052460c869c0142c299da80a312a5001  gcc/cobol/symbols.cc
! 7fe837511da66531d20c3897e34bfa13  gcc/cobol/symbols.h
  de4928630bb37aa4064841c89cdf22a2  gcc/cobol/symfind.cc
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  434f4899280e27d0717b2e56d5bf12f2  gcc/cobol/udf/stored-char-length.cbl
--- 3322,3329 ----
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! 8de0297b67697a24af57d4eaaea7c8a2  gcc/cobol/symbols.h
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*************** f55010fab8b9aabea82c3ac50d031028  gcc/co
*** 3339,3345 ****
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! e1a6051ad30c4f6457175481260cbad8  gcc/common.opt
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--- 3339,3345 ----
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*************** f842f1b8595f3ac795ba92c2b07085e6  gcc/co
*** 3385,3391 ****
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! 19fe6326e447c39f27b03c010a94dadb  gcc/common/config/riscv/riscv-common.cc
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--- 3385,3391 ----
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*************** b5a916bb9dd788754ac9e4ad7174ee74  gcc/co
*** 3400,3406 ****
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--- 3400,3406 ----
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*************** a349e9ba39f96f10f6c9f5e13bb8b661  gcc/co
*** 3439,3445 ****
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--- 3439,3445 ----
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*************** e2d80b89552da0c6b4cb6bede3b2e573  gcc/co
*** 3457,3469 ****
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--- 3457,3469 ----
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*************** f7165d62ef852e1929a8fc9a85c01ab2  gcc/co
*** 3490,3496 ****
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--- 3490,3496 ----
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*************** e432241ef743dc9fad65a3e982e51711  gcc/co
*** 3702,3708 ****
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--- 3702,3708 ----
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*************** d37f092206fc4c0379cee5e5fc01b654  gcc/co
*** 3753,3761 ****
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--- 3753,3761 ----
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*************** fc41e4ebf77dd1f54ddeec4e60428d5e  gcc/co
*** 4223,4229 ****
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--- 4223,4229 ----
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*************** de4e89bc042c6bc7eb093bda5d33a266  gcc/co
*** 4241,4247 ****
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--- 4241,4247 ----
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*************** c02c28dcba5af34ad86e26f316044b17  gcc/co
*** 4873,4898 ****
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--- 4873,4905 ----
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*************** bffa0caedd7144aff55c80a16431d1a1  gcc/co
*** 4900,4925 ****
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  173996678a5bf2b1b40e30fe260109b4  gcc/config/riscv/riscv-d.cc
  790bd2a5355776ab5ebf4c7814489760  gcc/config/riscv/riscv-d.h
  9848282285cd3a3e21f6181f220f6ba9  gcc/config/riscv/riscv-ext-corev.def
  e5ee9a298220a6317f6fd463f229fc22  gcc/config/riscv/riscv-ext-mips.def
  a8a293d3f8f01367abc68e7556a51898  gcc/config/riscv/riscv-ext-sifive.def
  85fb34f0d0de09dc83b4df6f525d78f9  gcc/config/riscv/riscv-ext-thead.def
  5551f756c3aae6dce60511f7f52efa5c  gcc/config/riscv/riscv-ext-ventana.def
! 7cdd94b1055d8a23c33054988d58c836  gcc/config/riscv/riscv-ext.def
! 0e25a2dcc5e7e15e7adaa4ff7988f60a  gcc/config/riscv/riscv-ext.opt
  8463b74f5d66e1a7f0d58a7ae087d8ad  gcc/config/riscv/riscv-ext.opt.urls
  1b0b6b632f747d9387ef25821e8673b4  gcc/config/riscv/riscv-feature-bits.h
! b467d35485b39b25863e918609a322d0  gcc/config/riscv/riscv-ftypes.def
  b1bc6d82a24b7b0e658a43956a37419c  gcc/config/riscv/riscv-modes.def
! 7631415b148bf332623531ebb3e0262b  gcc/config/riscv/riscv-opts.h
  2c59654f5f7fe2689efd370c0441b6bd  gcc/config/riscv/riscv-passes.def
  a74e7f8c5cb9995dff8a8d77c7bbd183  gcc/config/riscv/riscv-protos.h
  446f0f39c6f980e246ea56f1233e9271  gcc/config/riscv/riscv-scalar-crypto.def
--- 4907,4933 ----
  80e8994ee9e6abf380e68aca6443d157  gcc/config/riscv/peephole.md
  a3d3fa9142d4e2ed34ead146941c574a  gcc/config/riscv/pic.md
  674baa66306b2b08e1b80995759f5381  gcc/config/riscv/pipeline-checker
! a822bb3caeba5677859211738b47e9a7  gcc/config/riscv/predicates.md
! fcde47e773f1cfb9f582a606e2890c72  gcc/config/riscv/riscv-avlprop.cc
! e54a2d33c6fb9bb0381889dad6fa71d8  gcc/config/riscv/riscv-builtins.cc
! 019bb963b8ddc896e82e3ba7622236d2  gcc/config/riscv/riscv-c.cc
  3b7012a7d47b9aaf163e890d3e29013e  gcc/config/riscv/riscv-cmo.def
! fe12c74b3dcd4c8bd1c38b5c00a31c15  gcc/config/riscv/riscv-cores.def
  173996678a5bf2b1b40e30fe260109b4  gcc/config/riscv/riscv-d.cc
  790bd2a5355776ab5ebf4c7814489760  gcc/config/riscv/riscv-d.h
+ 5d018c4d2b91ca8e5745a3eb3b3b17cd  gcc/config/riscv/riscv-ext-andes.def
  9848282285cd3a3e21f6181f220f6ba9  gcc/config/riscv/riscv-ext-corev.def
  e5ee9a298220a6317f6fd463f229fc22  gcc/config/riscv/riscv-ext-mips.def
  a8a293d3f8f01367abc68e7556a51898  gcc/config/riscv/riscv-ext-sifive.def
  85fb34f0d0de09dc83b4df6f525d78f9  gcc/config/riscv/riscv-ext-thead.def
  5551f756c3aae6dce60511f7f52efa5c  gcc/config/riscv/riscv-ext-ventana.def
! af32382cb388ca699443730dd6483d32  gcc/config/riscv/riscv-ext.def
! 4181183566f53fe40ffcac4770a2e206  gcc/config/riscv/riscv-ext.opt
  8463b74f5d66e1a7f0d58a7ae087d8ad  gcc/config/riscv/riscv-ext.opt.urls
  1b0b6b632f747d9387ef25821e8673b4  gcc/config/riscv/riscv-feature-bits.h
! cf70b07b239c5bc3091fdab32e4d5d09  gcc/config/riscv/riscv-ftypes.def
  b1bc6d82a24b7b0e658a43956a37419c  gcc/config/riscv/riscv-modes.def
! 9638ea683767d52ade2e23fff486b0a7  gcc/config/riscv/riscv-opts.h
  2c59654f5f7fe2689efd370c0441b6bd  gcc/config/riscv/riscv-passes.def
  a74e7f8c5cb9995dff8a8d77c7bbd183  gcc/config/riscv/riscv-protos.h
  446f0f39c6f980e246ea56f1233e9271  gcc/config/riscv/riscv-scalar-crypto.def
*************** da4e034d23a8f2754b1dfce0122f286e  gcc/co
*** 4929,4955 ****
  f565a42da3474d73faf1ea727e2d7dcb  gcc/config/riscv/riscv-string.cc
  3b52301e3425e6de33a2436af4de6bd8  gcc/config/riscv/riscv-subset.h
  4421697a26c0e7f7b9eac1623c99387c  gcc/config/riscv/riscv-target-attr.cc
! b82412b7e23ac9f3afbd2ed1e5d8999c  gcc/config/riscv/riscv-v.cc
  0d419e9df116fed7ce6e0ae15131417e  gcc/config/riscv/riscv-v.h
  c5f3161dedd668dfb126ffb191cfb236  gcc/config/riscv/riscv-vect-permconst.cc
  1d781df8fdb7dc0f6e332b3fe767ad85  gcc/config/riscv/riscv-vector-builtins-bases.cc
  689f453a4cdf7fa3e64a7f4bfba8f7dd  gcc/config/riscv/riscv-vector-builtins-bases.h
  bdc5f6caf56fd0411faf705e9c32ccd4  gcc/config/riscv/riscv-vector-builtins-functions.def
! 1a84bfaa3f89d99edacd5d2eb1444186  gcc/config/riscv/riscv-vector-builtins-shapes.cc
  7e178dc137007d4ca1aaaaf29940c12f  gcc/config/riscv/riscv-vector-builtins-shapes.h
! 83165bddb05b2721bc426bd1fe3ec4c0  gcc/config/riscv/riscv-vector-builtins-types.def
! ff674aa0b74174665ea5acf67b875d64  gcc/config/riscv/riscv-vector-builtins.cc
! 74c291180c302842c646af24c77d184c  gcc/config/riscv/riscv-vector-builtins.def
! ed801cb8cef5db332d83dd226bad1510  gcc/config/riscv/riscv-vector-builtins.h
  68ce0161d927f393940028692de76ef3  gcc/config/riscv/riscv-vector-costs.cc
  2a441fb15ed4d774924fe163f29ccf7a  gcc/config/riscv/riscv-vector-costs.h
  f51037a9e437f8e9ce7215b2da5ad4e2  gcc/config/riscv/riscv-vector-switch.def
  5a1dc434073ed565843a91456f836a9a  gcc/config/riscv/riscv-vsetvl.cc
  d120ed6eb2847b636271b3a1ef82ecbf  gcc/config/riscv/riscv-vsetvl.def
  7082a18dbfc574d47bf71f4d50dd30f9  gcc/config/riscv/riscv-zicfilp.cc
! 95690b6fd5c55dd1058d48f1b53468a2  gcc/config/riscv/riscv.cc
  0766a701a8c90815575fae86f92cc4a6  gcc/config/riscv/riscv.h
! 2915aa6b6dcdddc293d88e517f76e069  gcc/config/riscv/riscv.md
  fec1c87bba727131a45d4ec4a9ae5490  gcc/config/riscv/riscv.opt
  d1d34490d8b53ec20d70ed9e2e56e3ab  gcc/config/riscv/riscv.opt.urls
  374e3c204946cff8c4be2bcad6641830  gcc/config/riscv/riscv_bitmanip.h
--- 4937,4963 ----
  f565a42da3474d73faf1ea727e2d7dcb  gcc/config/riscv/riscv-string.cc
  3b52301e3425e6de33a2436af4de6bd8  gcc/config/riscv/riscv-subset.h
  4421697a26c0e7f7b9eac1623c99387c  gcc/config/riscv/riscv-target-attr.cc
! 6afac23d74b05a588acb01dd168ff4c1  gcc/config/riscv/riscv-v.cc
  0d419e9df116fed7ce6e0ae15131417e  gcc/config/riscv/riscv-v.h
  c5f3161dedd668dfb126ffb191cfb236  gcc/config/riscv/riscv-vect-permconst.cc
  1d781df8fdb7dc0f6e332b3fe767ad85  gcc/config/riscv/riscv-vector-builtins-bases.cc
  689f453a4cdf7fa3e64a7f4bfba8f7dd  gcc/config/riscv/riscv-vector-builtins-bases.h
  bdc5f6caf56fd0411faf705e9c32ccd4  gcc/config/riscv/riscv-vector-builtins-functions.def
! 278d45dd3b6250781b7481f0bb02266b  gcc/config/riscv/riscv-vector-builtins-shapes.cc
  7e178dc137007d4ca1aaaaf29940c12f  gcc/config/riscv/riscv-vector-builtins-shapes.h
! dba94786c1a18e3f5fbcca2b5c0af496  gcc/config/riscv/riscv-vector-builtins-types.def
! 7a3a10292f2295839a8e05cc8ea6dc49  gcc/config/riscv/riscv-vector-builtins.cc
! 9cbc8a65b5045746afeedeb7b0404c5c  gcc/config/riscv/riscv-vector-builtins.def
! 08fa98f25292b0aaeb6566f437f6f30a  gcc/config/riscv/riscv-vector-builtins.h
  68ce0161d927f393940028692de76ef3  gcc/config/riscv/riscv-vector-costs.cc
  2a441fb15ed4d774924fe163f29ccf7a  gcc/config/riscv/riscv-vector-costs.h
  f51037a9e437f8e9ce7215b2da5ad4e2  gcc/config/riscv/riscv-vector-switch.def
  5a1dc434073ed565843a91456f836a9a  gcc/config/riscv/riscv-vsetvl.cc
  d120ed6eb2847b636271b3a1ef82ecbf  gcc/config/riscv/riscv-vsetvl.def
  7082a18dbfc574d47bf71f4d50dd30f9  gcc/config/riscv/riscv-zicfilp.cc
! cbfc9b4eaa81798c447a6b8ecf9c9891  gcc/config/riscv/riscv.cc
  0766a701a8c90815575fae86f92cc4a6  gcc/config/riscv/riscv.h
! 464164f3b242382443bb440b81635224  gcc/config/riscv/riscv.md
  fec1c87bba727131a45d4ec4a9ae5490  gcc/config/riscv/riscv.opt
  d1d34490d8b53ec20d70ed9e2e56e3ab  gcc/config/riscv/riscv.opt.urls
  374e3c204946cff8c4be2bcad6641830  gcc/config/riscv/riscv_bitmanip.h
*************** e83086f984717f1099ceeba6ce6bfb23  gcc/co
*** 4968,4978 ****
  b5fb046770f7e60fc485d6092c296c38  gcc/config/riscv/sifive_vector.h
  faca69fa18f3f779cd3ee4d6a53e6193  gcc/config/riscv/sync-rvwmo.md
  4dff560d8961c6dd9b4dd18c668c629e  gcc/config/riscv/sync-ztso.md
! 79c2e2a906fc7699d48fe1cf55b72824  gcc/config/riscv/sync.md
  1c27821991689abdaa7a908a0cc8dfa4  gcc/config/riscv/t-elf-multilib
  381cb38e167feed84dad697fce89cabd  gcc/config/riscv/t-linux
  1ed181a166b1d0e206c4a4e0024cce2a  gcc/config/riscv/t-linux-multilib
! fb7b7bda26caa0dfdb585dec0505356c  gcc/config/riscv/t-riscv
  fe202105dd9e81b9ce8fdcc11d52c294  gcc/config/riscv/t-rtems
  97a182737ed075d29be4ab1e848de420  gcc/config/riscv/t-withmultilib
  0478f4e79601d91fb8ad8f210b304a7b  gcc/config/riscv/t-withmultilib-generator
--- 4976,4986 ----
  b5fb046770f7e60fc485d6092c296c38  gcc/config/riscv/sifive_vector.h
  faca69fa18f3f779cd3ee4d6a53e6193  gcc/config/riscv/sync-rvwmo.md
  4dff560d8961c6dd9b4dd18c668c629e  gcc/config/riscv/sync-ztso.md
! 0dd22330918f123bfb57cc6ea818dc61  gcc/config/riscv/sync.md
  1c27821991689abdaa7a908a0cc8dfa4  gcc/config/riscv/t-elf-multilib
  381cb38e167feed84dad697fce89cabd  gcc/config/riscv/t-linux
  1ed181a166b1d0e206c4a4e0024cce2a  gcc/config/riscv/t-linux-multilib
! 9aed248d54c931acb1e16f8db1edcd15  gcc/config/riscv/t-riscv
  fe202105dd9e81b9ce8fdcc11d52c294  gcc/config/riscv/t-rtems
  97a182737ed075d29be4ab1e848de420  gcc/config/riscv/t-withmultilib
  0478f4e79601d91fb8ad8f210b304a7b  gcc/config/riscv/t-withmultilib-generator
*************** fe202105dd9e81b9ce8fdcc11d52c294  gcc/co
*** 4981,4990 ****
  bcf728ad2379630774fd5bb529d4ee86  gcc/config/riscv/thead-vector.md
  48f9dcd9a5cd1980bd2db7697cdb717a  gcc/config/riscv/thead.cc
  fd8e9517de64ab23821ea1284ea6d7f6  gcc/config/riscv/thead.md
  b5e46305db1116cc1758b504ea37fe74  gcc/config/riscv/vector-bfloat16.md
  88f7597398d0c8b8b87baba5fd207996  gcc/config/riscv/vector-crypto.md
! ebed0032394077f4410660bcb8b59f15  gcc/config/riscv/vector-iterators.md
! 568a5bde8501a652239fa59f0e05a378  gcc/config/riscv/vector.md
  18d213c106fe52eebc74017d5ff892ce  gcc/config/riscv/xiangshan.md
  0f64aaa114ab62a1a46f7ac422d6a129  gcc/config/riscv/zc.md
  36cba2444ae9c8f107fee34492bd0ed6  gcc/config/riscv/zicond.md
--- 4989,4999 ----
  bcf728ad2379630774fd5bb529d4ee86  gcc/config/riscv/thead-vector.md
  48f9dcd9a5cd1980bd2db7697cdb717a  gcc/config/riscv/thead.cc
  fd8e9517de64ab23821ea1284ea6d7f6  gcc/config/riscv/thead.md
+ ed52e14731efd55e945dc45b7f087999  gcc/config/riscv/tt-ascalon-d8.md
  b5e46305db1116cc1758b504ea37fe74  gcc/config/riscv/vector-bfloat16.md
  88f7597398d0c8b8b87baba5fd207996  gcc/config/riscv/vector-crypto.md
! adcd359890ba21e0ab9c4ac4cf8251b8  gcc/config/riscv/vector-iterators.md
! 58c492f6b7fc2989a57d0e90315a6297  gcc/config/riscv/vector.md
  18d213c106fe52eebc74017d5ff892ce  gcc/config/riscv/xiangshan.md
  0f64aaa114ab62a1a46f7ac422d6a129  gcc/config/riscv/zc.md
  36cba2444ae9c8f107fee34492bd0ed6  gcc/config/riscv/zicond.md
*************** e668a66435fb2f99a1efecd42e6e892e  gcc/co
*** 5179,5185 ****
  ebf2af54f6028784eea745f950992c31  gcc/config/rx/rx-modes.def
  7588eedadbbd5ed60f24dbb89e11a412  gcc/config/rx/rx-opts.h
  3ef320fc856a179ec483fa45562d0f4e  gcc/config/rx/rx-protos.h
! f5639a8ef8ac0b4ad0f0f8641ce6dda9  gcc/config/rx/rx.cc
  52f8f701493a3c37b5967c172aa5b1d4  gcc/config/rx/rx.h
  6cbeff9d3b8aea4288a7a2298b737824  gcc/config/rx/rx.md
  9bcec54f3194a77effb13d53edaacd37  gcc/config/rx/rx.opt
--- 5188,5194 ----
  ebf2af54f6028784eea745f950992c31  gcc/config/rx/rx-modes.def
  7588eedadbbd5ed60f24dbb89e11a412  gcc/config/rx/rx-opts.h
  3ef320fc856a179ec483fa45562d0f4e  gcc/config/rx/rx-protos.h
! f0092bc375651ec8ba3eb85c48a3d915  gcc/config/rx/rx.cc
  52f8f701493a3c37b5967c172aa5b1d4  gcc/config/rx/rx.h
  6cbeff9d3b8aea4288a7a2298b737824  gcc/config/rx/rx.md
  9bcec54f3194a77effb13d53edaacd37  gcc/config/rx/rx.opt
*************** ef292bd063751273e93912005054621c  gcc/co
*** 5468,5474 ****
  784e78d129e667eb51b57cd3bb4cf498  gcc/config/xtensa/elf.opt
  f140d72c4f00aa6f39295fedb6f6fc92  gcc/config/xtensa/elf.opt.urls
  7d826e1325729fc54de80be38daf7484  gcc/config/xtensa/linux.h
! dc6b3110ed80f72aaaeb0c195a8a79cd  gcc/config/xtensa/predicates.md
  f3a2992c8e85b13e50b261e26924d83f  gcc/config/xtensa/t-xtensa
  4cf53f30f4e09026e45f314036f2449e  gcc/config/xtensa/uclinux.h
  4d05c7a063b0b89e0e6f4cf516e0da92  gcc/config/xtensa/uclinux.opt
--- 5477,5483 ----
  784e78d129e667eb51b57cd3bb4cf498  gcc/config/xtensa/elf.opt
  f140d72c4f00aa6f39295fedb6f6fc92  gcc/config/xtensa/elf.opt.urls
  7d826e1325729fc54de80be38daf7484  gcc/config/xtensa/linux.h
! c59e844e244f19076b6710a8de4faf05  gcc/config/xtensa/predicates.md
  f3a2992c8e85b13e50b261e26924d83f  gcc/config/xtensa/t-xtensa
  4cf53f30f4e09026e45f314036f2449e  gcc/config/xtensa/uclinux.h
  4d05c7a063b0b89e0e6f4cf516e0da92  gcc/config/xtensa/uclinux.opt
*************** c7be35a23fd70ac184dd9072319304c7  gcc/co
*** 5478,5488 ****
  e20fad8bff9c459aaef3ea80a54e1973  gcc/config/xtensa/xtensa-protos.h
  92950369828e7e9323c0543cd126af05  gcc/config/xtensa/xtensa.cc
  f378c965e5e289a389bbf48d20867d48  gcc/config/xtensa/xtensa.h
! 660a7be5da430bbb578b4366be66b7aa  gcc/config/xtensa/xtensa.md
  f0452ea712955ce21c9c149136850780  gcc/config/xtensa/xtensa.opt
  db57d7603312357e8c0cfb21c32353d1  gcc/config/xtensa/xtensa.opt.urls
! 6660846ea4502d09af4ef087d5400881  gcc/configure
! 80e2db79d0b50d84b8d24717e059fc6a  gcc/configure.ac
  ec3aa966ca3fe9c6f84d4378160541b6  gcc/context.cc
  d1bde52b8dee0c0c5506d7e320b1bb61  gcc/context.h
  a9c3cddee4e237141062720b72fe38cd  gcc/convert.cc
--- 5487,5497 ----
  e20fad8bff9c459aaef3ea80a54e1973  gcc/config/xtensa/xtensa-protos.h
  92950369828e7e9323c0543cd126af05  gcc/config/xtensa/xtensa.cc
  f378c965e5e289a389bbf48d20867d48  gcc/config/xtensa/xtensa.h
! 1cde9c01b4d75d9d8e8eccd725a9e44f  gcc/config/xtensa/xtensa.md
  f0452ea712955ce21c9c149136850780  gcc/config/xtensa/xtensa.opt
  db57d7603312357e8c0cfb21c32353d1  gcc/config/xtensa/xtensa.opt.urls
! 5d95f96bc00d429cd8cd4979937f693e  gcc/configure
! 705965eab8da0ca5e96e940836622000  gcc/configure.ac
  ec3aa966ca3fe9c6f84d4378160541b6  gcc/context.cc
  d1bde52b8dee0c0c5506d7e320b1bb61  gcc/context.h
  a9c3cddee4e237141062720b72fe38cd  gcc/convert.cc
*************** fa062fdcbed6412a676fa477d87ba334  gcc/co
*** 5492,5498 ****
  5d31df44fc0a5b17beb74ce0ff38e214  gcc/coroutine-passes.cc
  02796caeaa2f14f72dc3c9c23cc97dfc  gcc/coverage.cc
  722fb5fda78e55c5af5da72cad78751f  gcc/coverage.h
! 318f7097ac13f094b11c84bcf38163c1  gcc/cp/ChangeLog
  70c059f2b75a2fc1bb95a526b21b8cd7  gcc/cp/ChangeLog-1993
  7cbd106e10a0ba7c052bee3fe20671c2  gcc/cp/ChangeLog-1994
  3b1e3ed23ad4363f75e6fd2fbb583dee  gcc/cp/ChangeLog-1995
--- 5501,5507 ----
  5d31df44fc0a5b17beb74ce0ff38e214  gcc/coroutine-passes.cc
  02796caeaa2f14f72dc3c9c23cc97dfc  gcc/coverage.cc
  722fb5fda78e55c5af5da72cad78751f  gcc/coverage.h
! 15462c409ef2b85c74d4b8184400e3ee  gcc/cp/ChangeLog
  70c059f2b75a2fc1bb95a526b21b8cd7  gcc/cp/ChangeLog-1993
  7cbd106e10a0ba7c052bee3fe20671c2  gcc/cp/ChangeLog-1994
  3b1e3ed23ad4363f75e6fd2fbb583dee  gcc/cp/ChangeLog-1995
*************** fce8de27014c109814b3f69be6a5d4f6  gcc/cp
*** 5533,5560 ****
  68fc21d4889b1c70ccf89747b98b1fb4  gcc/cp/cfns.h
  0414c494620e2ace88b96b92413b56d0  gcc/cp/class.cc
  ee3fb2cc9b9557d3895f527353160bd4  gcc/cp/config-lang.in
! 8dc9372afc0092a39484ab78eb81a94f  gcc/cp/constexpr.cc
  7cf0106de3accd773b289c02049d31ca  gcc/cp/constraint.cc
! 613233facbf4b0f1cff770ed6c49c666  gcc/cp/contracts.cc
! 1f1cd3a021a2cd25741e252145ee8282  gcc/cp/contracts.h
! ebc33bcbb6e9f1bbaba630368e255575  gcc/cp/coroutines.cc
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! ca9268e2b73d4fac8c3c4e9d9d4b7227  gcc/cp/cp-tree.h
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! b5d9940b3021d0650a705141bdee0739  gcc/cp/decl.cc
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! f7b49cc43c94798c1322b400f10ee9d8  gcc/cp/decl2.cc
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  3b0c8688648a0e18bad29a56b158fc3a  gcc/cp/error.cc
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--- 5542,5569 ----
  68fc21d4889b1c70ccf89747b98b1fb4  gcc/cp/cfns.h
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! 402d770bd9d5bfaaed8772abe0787b1b  gcc/cp/constexpr.cc
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! b4452de3b42a36f42cdd92b905d201b6  gcc/cp/contracts.cc
! 1e70d5eb4e7210b177ea2f5fa77983b8  gcc/cp/contracts.h
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! 40c7df9b12b867dadb90784e8011b4a6  gcc/cp/cp-tree.h
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! 58bfdeb2e0c7b8dd6e87f47294c3b0fe  gcc/cp/decl.cc
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*************** e6309750e7888003d3c19108d433c340  gcc/cp
*** 5567,5589 ****
  ac5d78393361c1bcb930119a896a14ca  gcc/cp/lang-specs.h
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! f63b47ebd40e23c329468a17809c3925  gcc/cp/mangle.cc
  5efd09b0532a0b524e859d61c942156d  gcc/cp/mapper-client.cc
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! ebeee9458a6197720ea96b508075e84e  gcc/cp/module.cc
! 2f071c2f91c007a8d171d0b7eb7294f6  gcc/cp/name-lookup.cc
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  ee1ddf1e1b9554bb1a10109ce8c6dee5  gcc/cp/rtti.cc
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  067caebca8597843f76a13fd5126a2df  gcc/cp/tree.cc
--- 5576,5598 ----
  ac5d78393361c1bcb930119a896a14ca  gcc/cp/lang-specs.h
  b1fd7f71ea0372fd8228b79f373b9e51  gcc/cp/lex.cc
  aaf76a9b03fd0532d2904aef004fd66a  gcc/cp/logic.cc
! 29a766046df79e5751f079947e1f29b4  gcc/cp/mangle.cc
  5efd09b0532a0b524e859d61c942156d  gcc/cp/mapper-client.cc
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  0456b59fb105d3d30371131d063a685a  gcc/cp/method.cc
! 839c4d3f54f33d04c4615ebfa83e3bde  gcc/cp/module.cc
! 47491bc02d947c5466e7f4bc4387e3bf  gcc/cp/name-lookup.cc
  5a9aeceb329cf9c3d8c374b77f39f2b4  gcc/cp/name-lookup.h
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! 4e247010b8aa821446c1f2f62b45424d  gcc/cp/parser.cc
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*************** f37a4f98bbb2210fd8e8fe68925aab73  gcc/dd
*** 5867,5872 ****
--- 5876,5882 ----
  a4c54450630ab4406b2e21b4baa912e2  gcc/debug.cc
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  93f1c614df7d70911bff7bfcfb94d36f  gcc/defaults.h
+ f79acc1ebba982b0dd5408fc74a241d5  gcc/dep-fusion.cc
  5942b7e5a9008e79df837738f0150e56  gcc/df-core.cc
  b9d078b88658c87d713e175705b687be  gcc/df-problems.cc
  151d675229ec23b6da3f2cc6ee3d7367  gcc/df-scan.cc
*************** e5801529f87f5812381a450d52efaebf  gcc/di
*** 5909,5915 ****
  9c9f1df85c4ab3a3e0b7d60a87966af2  gcc/diagnostics/lazy-paths.cc
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  6f69e590053bf3418aca58e6ff240d75  gcc/diagnostics/logging.cc
! 02b5e4060cc9e8fc0b76b1939e26e1d8  gcc/diagnostics/logging.h
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  ed9e23a6a190e966a47730d652613dd2  gcc/diagnostics/macro-unwinding.cc
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--- 5919,5925 ----
  9c9f1df85c4ab3a3e0b7d60a87966af2  gcc/diagnostics/lazy-paths.cc
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! 81ed01992a2ef4d39eafb623f51b4abf  gcc/diagnostics/logging.h
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  ed9e23a6a190e966a47730d652613dd2  gcc/diagnostics/macro-unwinding.cc
  1a1b13e68ed47b8eb0342caa0caee17b  gcc/diagnostics/macro-unwinding.h
*************** acdfc663791e4321372e79932070d05d  gcc/do
*** 5961,5967 ****
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--- 5971,5977 ----
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*************** a28615d9873d98f0d5f4ef8dd3e4c39d  gcc/do
*** 5969,5975 ****
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! cc49c44389e2d6e1bc60b761b5602112  gcc/doc/generic.texi
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--- 5979,5985 ----
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! 028bc676c3b94f5ed5a5b167643ac62b  gcc/doc/generic.texi
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*************** ee4c7654f733cefcb73d4fd24f3e1b82  gcc/do
*** 5983,5991 ****
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--- 5993,6001 ----
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*************** a1f65f3aec3cc5d5b6505fb976d4c216  gcc/do
*** 6023,6037 ****
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! 4348f38c3f6cad1a3ac23828a6375ad1  gcc/doc/md.texi
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! bdb96c18785d30a60425d3610b81c04c  gcc/doc/riscv-ext.texi
  0a6fbec97bcd3900463038637bba7886  gcc/doc/riscv-mcpu.texi
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--- 6033,6047 ----
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! 8aaabbc2a7d4ffe3a894e7e20a6c06a5  gcc/doc/md.texi
  8836b7001f069e8dead6a4643108258b  gcc/doc/objc.texi
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! a44260feebffd50db9ea51aed431d69c  gcc/doc/riscv-ext.texi
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*************** c2aaa943f52a93ac601eb2571747ce3f  gcc/do
*** 6058,6064 ****
  e481c806d0083684aec2b18cd821d0c6  gcc/dwarf2asm.cc
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! 0a3eda9dab4d6f189c8f1075bd4b269a  gcc/dwarf2codeview.cc
  186b01005d892edba3b03fc17bd0dc8f  gcc/dwarf2codeview.h
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  1d0191caafac1774f50a47175d915ea0  gcc/dwarf2ctf.h
--- 6068,6074 ----
  e481c806d0083684aec2b18cd821d0c6  gcc/dwarf2asm.cc
  e518c37d94908385da07142b92ea8cdb  gcc/dwarf2asm.h
  7efb4f91e749cd2ecf8f4c740fdb13b0  gcc/dwarf2cfi.cc
! b21182651156de7779948fe8ca2c4160  gcc/dwarf2codeview.cc
  186b01005d892edba3b03fc17bd0dc8f  gcc/dwarf2codeview.h
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  1d0191caafac1774f50a47175d915ea0  gcc/dwarf2ctf.h
*************** a4b4da266f5ffee8465a80d9ffa6c460  gcc/fl
*** 6095,6104 ****
  e8c5838138a5e07e5716964a8284e9a1  gcc/flags.h
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! 6dd1484a5224f1070c3b6065080cb93d  gcc/fold-const.cc
  f23dec03425a07611492fa2c061cd7d2  gcc/fold-const.h
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! f955d3ce9c54802046b86180e24e1532  gcc/fortran/ChangeLog
  083c53fadafdcf3be46713838a51e36c  gcc/fortran/ChangeLog-2002
  2a4ca18d211fb2603139354fd16398ed  gcc/fortran/ChangeLog-2003
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--- 6105,6114 ----
  e8c5838138a5e07e5716964a8284e9a1  gcc/flags.h
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! ab65c11488de8f259592eef4bca9338b  gcc/fold-const.cc
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! 4d79f1c1c6005915d39914166104789d  gcc/fortran/ChangeLog
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*************** aed3aedb6378a970055dff9e11eedc2d  gcc/fo
*** 6139,6155 ****
  b7e224f665bb5044ce35ed09435bd4fb  gcc/fortran/cpp.h
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! 90fb05648549b99a6f93f4aca073b377  gcc/fortran/gfortran.h
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  e4fe6ce0303cd182ebd328bdb0ae5743  gcc/fortran/interface.cc
--- 6149,6165 ----
  b7e224f665bb5044ce35ed09435bd4fb  gcc/fortran/cpp.h
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! 60a34207d9b14a1d9da6ac642b26b809  gcc/fortran/decl.cc
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! 4e2b190489d6c866572528da54250bd2  gcc/fortran/expr.cc
  4951d066b4086c9dc1486fd5e2dbe2c2  gcc/fortran/f95-lang.cc
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  a39f360f255f1ef6dfd91ccefef63e05  gcc/fortran/gfc-diagnostic.def
  bd08c55098f00394b9922e6163c27b92  gcc/fortran/gfc-internals.texi
! f01fb3931f9fe2be249b6112c46293a2  gcc/fortran/gfortran.h
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  af66ab40a5434219772b76ad10035e45  gcc/fortran/gfortranspec.cc
  e4fe6ce0303cd182ebd328bdb0ae5743  gcc/fortran/interface.cc
*************** df87a47795cf1aceec24416d89f4dc6e  gcc/fo
*** 6177,6183 ****
  44ee980cc04645c25872621b20fc36fa  gcc/fortran/parse.cc
  c1b40e866a8bbe611aa65278fe2508d3  gcc/fortran/parse.h
  6af7a69df20b6ed8fae3858a2eb7f976  gcc/fortran/primary.cc
! ddea90d98e60c6eacfbfa24c8326c4a4  gcc/fortran/resolve.cc
  8dc2391850ee95634781b6e296a096f6  gcc/fortran/scanner.cc
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  71190056d6f36d3d43d4b6ed27f23032  gcc/fortran/simplify.cc
--- 6187,6193 ----
  44ee980cc04645c25872621b20fc36fa  gcc/fortran/parse.cc
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! 1e41e333dba3d1cb7ee3812d0abefd53  gcc/fortran/resolve.cc
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  71190056d6f36d3d43d4b6ed27f23032  gcc/fortran/simplify.cc
*************** dfe1e1950e068389ed73663e9a11ad88  gcc/fo
*** 6191,6198 ****
  d555f911945a83db335013815934e941  gcc/fortran/trans-const.cc
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! 759fe6eedf9883abd689cd15ba82e8db  gcc/fortran/trans-expr.cc
! ddb6285a5b8bbedf10437e704ef1a2c1  gcc/fortran/trans-intrinsic.cc
  4a091b0b546257101e406582ece724f7  gcc/fortran/trans-io.cc
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  ef3436c60285865c7e4a611b65ebca7d  gcc/fortran/trans-stmt.cc
--- 6201,6208 ----
  d555f911945a83db335013815934e941  gcc/fortran/trans-const.cc
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! ae3ea5952282bf3e74ddafb1655deaa7  gcc/fortran/trans-expr.cc
! 3e27ef789bc1b3481029ba71ec30d943  gcc/fortran/trans-intrinsic.cc
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*************** cac72ec7acd3c0b9265d75c09766a847  gcc/gc
*** 6222,6228 ****
  74b8852724cd126309c2e814288bcaa4  gcc/gcc-urlifier.cc
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! 813dc4e991c18d6b6e5cbab8dd456520  gcc/gcc.cc
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--- 6232,6238 ----
  74b8852724cd126309c2e814288bcaa4  gcc/gcc-urlifier.cc
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! 26cc6da991c9bac02d87123f3a983e73  gcc/gcc.cc
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*************** a0c225f8a1deb41873e5984a058b0f45  gcc/gi
*** 6303,6309 ****
  9d283d6d05cc10c386454e9c6a25e22a  gcc/gimple-loop-versioning.cc
  de516dc4a59882c258bf01584c25b2de  gcc/gimple-low.cc
  a507a70e7f4b0dd99e594d15a5a9a89b  gcc/gimple-low.h
! 7616263dd6d6db18b7fa76bdc532890c  gcc/gimple-lower-bitint.cc
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  144911a83796283e587e0c84378e118d  gcc/gimple-match-head.cc
--- 6313,6319 ----
  9d283d6d05cc10c386454e9c6a25e22a  gcc/gimple-loop-versioning.cc
  de516dc4a59882c258bf01584c25b2de  gcc/gimple-low.cc
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! 93be6de2dfbd003a72732c89a297fc8f  gcc/gimple-lower-bitint.cc
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  144911a83796283e587e0c84378e118d  gcc/gimple-match-head.cc
*************** fef6f27045737cc29ebf2dbbd22dda02  gcc/ip
*** 6512,6518 ****
  005f3683b94c9cf2ef95442dcaaa8771  gcc/ipa-icf.cc
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! 51ec3d63fa09b5656ef5c9d21ceb26c9  gcc/ipa-inline-transform.cc
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--- 6522,6528 ----
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! e54b675ad60e4f46eb3ffffe84bf02ef  gcc/ipa-inline-transform.cc
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*************** d33136e7edecd120aa035f0e1ad240b0  gcc/ip
*** 6526,6532 ****
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! fa8b12710ac89ee0802b55aec4fe4cda  gcc/ipa-profile.cc
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--- 6536,6542 ----
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! 62c7e947bcc30f9c3e539b08bba712d5  gcc/ipa-profile.cc
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*************** d4930f12a999a28238b013539b631f2f  gcc/ip
*** 6543,6549 ****
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! b31fd788662b22cb8047b65a9502b4fa  gcc/ira-color.cc
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--- 6553,6559 ----
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! f1cdf777c45e6f0680cdad6e0c02c31a  gcc/ira-color.cc
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*************** a1718f4e4de96a072fce29c3cef4017a  gcc/op
*** 7749,7755 ****
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! 4e3c77b6001e2e7044652824b6551d11  gcc/optabs.def
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--- 7759,7765 ----
  933d872e7e60ed7a16f387f74cf5dcd7  gcc/optabs-tree.cc
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! 08bf648f9dab3d3eecfab9a21adc35a6  gcc/optabs.def
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*************** bdacbcb932eb0c2db8707e3727f574dd  gcc/op
*** 7764,7781 ****
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! 7755f94f41ee95ae76c88651559ebc6e  gcc/params.opt
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! e77429f92e3fbd7f4cc2d7b21d878441  gcc/passes.def
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--- 7774,7791 ----
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! 15a83f72c04f69d4dc3fa2974b465517  gcc/opts.cc
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! e292a0505627a3aad000d7932f50bcff  gcc/params.opt
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! 878f2d0101bfecf12ea867d08b703340  gcc/passes.def
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*************** a5461dd81ec55dc6f56817a1f356f345  gcc/pr
*** 7829,7835 ****
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! c7ec57b92f248e2ae077376c61321dda  gcc/profile-count.h
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  cd641a4dec9a0a4cf7cf888cfa37e386  gcc/profile.h
  be6c71b25f10a45cfc8d05a37affe9ed  gcc/pta-andersen.cc
--- 7839,7845 ----
  b049f30300658003f485bb43bf69c2cc  gcc/print-tree.cc
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! 68d5148a556d8d408b4d7155a9f8c27b  gcc/profile-count.h
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  be6c71b25f10a45cfc8d05a37affe9ed  gcc/pta-andersen.cc
*************** cc2f2f430f74c1a27d90af76f5ba9968  gcc/re
*** 7876,7883 ****
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! 2d7ea25e47ea43ae963ec5a280cb9bc1  gcc/rtl-ssa/accesses.cc
! a90674c678ee02bf4f447c3ff6764580  gcc/rtl-ssa/accesses.h
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--- 7886,7893 ----
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! 8d34f941970ff3800472e16ef016043a  gcc/rtl-ssa/accesses.cc
! f4c47cc8bd1ce4a6bd77e081554fe825  gcc/rtl-ssa/accesses.h
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*************** b1497a03867668af210c32280876fdd7  gcc/sy
*** 8503,8509 ****
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! aa8ec7ba8b879815fc0c10a186ef4e46  gcc/testsuite/ChangeLog
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--- 8513,8519 ----
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*************** b9007290e56f8c058df6fc2174bc755b  gcc/te
*** 22628,22633 ****
--- 22638,22645 ----
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*************** ecc4cdff1fc19f2bbddbccb4517d4d32  gcc/te
*** 32108,32119 ****
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*************** a016afd83ff8628a76ca1feb679ba84c  gcc/te
*** 32369,32378 ****
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--- 32392,32399 ----
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*************** cacc2b46a47db294c8b68d4d9a2920ea  gcc/te
*** 32554,32559 ****
--- 32575,32581 ----
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*************** ad9ef329572dab16f2d3d5613538cd3f  gcc/te
*** 32980,32989 ****
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--- 33002,33016 ----
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*************** ad9259e6bdf3bdde202871cc62bd27bb  gcc/te
*** 35561,35566 ****
--- 35588,35594 ----
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*************** e9afa7cf1ac751d2df40286607549ef0  gcc/te
*** 37506,37511 ****
--- 37534,37541 ----
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*************** cbba22e9568932c7e9798b4143e8babf  gcc/te
*** 38567,38573 ****
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--- 38597,38603 ----
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*************** b7574f2c87be7256484ba89a7bb8ec06  gcc/te
*** 38756,38761 ****
--- 38786,38792 ----
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*************** c9198836844a7336e686dd975a80fbbd  gcc/te
*** 43147,43153 ****
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--- 43178,43184 ----
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*************** a2c6a368bc2b14728093f3e15b60bca2  gcc/te
*** 46624,46630 ****
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--- 46655,46661 ----
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*************** d5b51664c6ca431aadc9eb21024bcb22  gcc/te
*** 46767,46776 ****
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--- 46798,46807 ----
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*************** e370903640e76bf4ef407aafe0286689  gcc/te
*** 49243,49256 ****
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*************** d68bbbb751c339c43ba063269cc07d20  gcc/te
*** 51090,51095 ****
--- 51121,51127 ----
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*************** f3a876eb6a0816f6085df8f93e7edd6d  gcc/te
*** 52393,52399 ****
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*** 56010,56015 ****
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*** 57764,57769 ****
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*** 59775,59781 ****
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*************** ba534422ad0a79e177e4df595590f346  gcc/te
*** 61405,61410 ****
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*************** cb85a2159e6429ded025be9506d3d3ec  gcc/te
*** 61416,61423 ****
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*** 62723,62728 ****
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*************** c1d1b89464c021a62101f69087a9fc75  gcc/te
*** 63041,63053 ****
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*** 63735,63740 ****
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*** 64533,64538 ****
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*** 65848,65853 ****
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*** 68481,68486 ****
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*** 73432,73437 ****
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*** 75196,75201 ****
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*************** a2d62181a57faca3679c1d04633f0100  gcc/te
*** 79209,79214 ****
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*** 85652,85661 ****
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*** 86790,86795 ****
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*************** c05d22a930ef3f74451ec3e9d4db1b74  gcc/te
*** 88886,88897 ****
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*************** eac1daf20200582d78f7b10b7024f1e1  gcc/te
*** 94438,94451 ****
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*************** aeea4287f00bf622bcedbf5a392818f6  gcc/te
*** 94663,94669 ****
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--- 94722,94728 ----
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*************** b7abe95f9b02106e7160a5bdf3bd9683  gcc/te
*** 94861,94866 ****
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*************** b656a9e0d73427727bb0cc6df44334ab  gcc/te
*** 95203,95208 ****
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*************** fc3ba1bab139687a4821b5159329f0f5  gcc/te
*** 95708,95714 ****
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*************** e7ca8fe6239410f9affbff1106fd2d15  gcc/te
*** 96465,96470 ****
--- 96533,96542 ----
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*************** edb9b4181b2b408a2f578125f885f62d  gcc/te
*** 97524,97529 ****
--- 97596,97602 ----
  9a640025c4ac25d1729c6af8dfb308b4  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-4.c
  054d70d79d99c0a2790741e08d57fad2  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-run.c
  ecef52e7fa94de8caeee7a3c4f7a9569  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-zvfh-run.c
+ 0a608435305a7109a92972e2826c6c9f  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/J
  a79dd8e0f15921de3bc7a97a50902d67  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-1.c
  a46e2469358be5cd090ef9c30487d38f  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/abs-2.c
  cd375212683d2e89715f19dd60b794dc  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/and-1.c
*************** ca5f40ae383d5a40b39d9d039bbede0c  gcc/te
*** 97699,97707 ****
  9a353e32cb9d5cf6c7af5e87b0dfc56b  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-2.c
  ff57240ac36b402917240469534083e1  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-3.c
  0972ed15b2e9133996a7f4a98b2f015e  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c
! 8407bfe3aec7265bf4cbb4231b339a48  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c
  c80c0e73d4a722ffbd131b5923b0fd4f  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c
! d5b4cb0e9c27371faf4d923898285946  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c
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  953f23db04f3533860c00f11b5138a22  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c
  be514ccc458cbe3e2cdc1127f6590023  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c
--- 97772,97780 ----
  9a353e32cb9d5cf6c7af5e87b0dfc56b  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-div-2.c
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  0972ed15b2e9133996a7f4a98b2f015e  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-1.c
! bb3bcc1b12f652c860e7955831f6c563  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c
  c80c0e73d4a722ffbd131b5923b0fd4f  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-3.c
! 4ceef42667da1480466286cff1cb87e0  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c
  66d599d0f18818b6ce81fc69d7dd339d  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-5.c
  953f23db04f3533860c00f11b5138a22  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-1.c
  be514ccc458cbe3e2cdc1127f6590023  gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-min-2.c
*************** f95d4e0ecca41e722099be6b52b3efe7  gcc/te
*** 97961,97978 ****
  35044d6a949091b4c23addf451f035ed  gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-rv64.c
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  2d052315288cbb1a315add9fb76abbc3  gcc/testsuite/gcc.target/riscv/rvv/autovec/vreinterpet-fixed.c
! da8f31fffd4f54a96ec19cdbd8b66870  gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c
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! e006905c5d3cad5d09a3471c900021c0  gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c
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! 474f8620abf41db2702b87315d783e6a  gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c
  7e7251e89ffba617c929fc3b295c5f4b  gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-5-f16.c
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--- 98034,98051 ----
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! 0e0e858a2a43c9e704ea606c11408a81  gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c
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*************** aa37ab3915741409f060642377966969  gcc/te
*** 97985,97992 ****
  9b99b0478d4169cdc726bdccb4290fe8  gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-8-f16.c
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--- 98058,98065 ----
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*************** db6c9fd046686fdd17cc7ffc5fbfe33a  gcc/te
*** 97998,98003 ****
--- 98071,98079 ----
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*************** c8ea40c4b9abb00be5f9636824cb84e2  gcc/te
*** 98033,98062 ****
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--- 98109,98138 ----
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*************** a668be35e3b0365efdcb1644b843f8f7  gcc/te
*** 98105,98112 ****
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--- 98181,98188 ----
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*************** c8491bcba1b39370cea742eeded61ee8  gcc/te
*** 98156,98161 ****
--- 98232,98245 ----
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*************** d38cc5eacf38ee8c46ddfc6741e55f49  gcc/te
*** 98204,98209 ****
--- 98288,98301 ----
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*************** c408b1a7f84e4b815e85476963221ae9  gcc/te
*** 99213,99219 ****
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--- 99305,99311 ----
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*************** b3330bdc7e59d45053b22dc4e53f3689  gcc/te
*** 99675,99680 ****
--- 99767,99804 ----
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*************** eba52e984a37427da6fa1233257ff6a9  gcc/te
*** 100505,100510 ****
--- 100629,100653 ----
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*************** b783b3106f46216a8103473a59dd8ea9  gcc/te
*** 100595,100601 ****
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--- 100738,100744 ----
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*************** dc6f8b5f80e721870422c74d7b5d0cb2  gcc/te
*** 100617,100622 ****
--- 100760,100766 ----
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*************** cf53aab8a3ab2532dd55b65c25e2cda5  gcc/te
*** 101087,101094 ****
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--- 101231,101238 ----
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! 040f6acdce8703e588d2d87d37de0206  gcc/testsuite/gcc.target/s390/spaceship-fp-1.c
! 4cf06bafe20f34bd32bdf1d213a42344  gcc/testsuite/gcc.target/s390/spaceship-fp-2.c
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*************** af2c862644ef563e9b11a9acd3d9f20f  gcc/te
*** 112776,112789 ****
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--- 112920,112933 ----
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*************** bf9b6323f7816780db5e9b60fb1b8dee  gcc/te
*** 112801,112806 ****
--- 112945,112953 ----
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*************** b3aa92652c768e489db71c4bdec58492  gcc/te
*** 113808,113814 ****
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--- 113955,113961 ----
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*************** ad625f0340741a09e4be8d42e070139e  gcc/te
*** 114808,114813 ****
--- 114955,114961 ----
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*************** cec1ec6b2f905bb78b1700c94091bc21  gcc/te
*** 115212,115217 ****
--- 115360,115366 ----
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*************** eb1595e729e2eaac81c7ffe330d8f24e  gcc/te
*** 122820,122826 ****
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! 9cfc14075a717e8ff0a0162b709685cb  gcc/testsuite/lib/target-supports.exp
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--- 122969,122975 ----
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*************** b4a6da1471f279353aaca4956c18cdea  gcc/tr
*** 125390,125396 ****
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! 3ad4a16598cfec5e5ddbe9bd9e97f39d  gcc/tree-cfg.cc
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--- 125539,125545 ----
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! b135434b624e2ec76b8241f0a7c8ada7  gcc/tree-cfg.cc
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*************** ecbe7be63385b38e3cb9eca4ac949cbc  gcc/tr
*** 125407,125413 ****
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! 5b2959d3865102e60e008c1ba95fa361  gcc/tree-eh.cc
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--- 125556,125562 ----
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*************** de65dfb7d298f3e879ec71e5e2e95913  gcc/tr
*** 125432,125438 ****
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--- 125581,125587 ----
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! 1acfa496a76fe80f07144ff7d1534462  gcc/tree-pass.h
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*************** ebea01b285bb347999736a8da2d7eb94  gcc/tr
*** 125440,125446 ****
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--- 125589,125595 ----
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*************** c724c8becbea9eec0f806e3335942c32  gcc/tr
*** 125449,125455 ****
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--- 125598,125604 ----
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*************** adfc498b0c97a8123c02d418757df496  gcc/tr
*** 125460,125466 ****
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--- 125609,125615 ----
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*************** b95e9f0aa9d4eb7a66303c94ffbdcbb5  gcc/tr
*** 125482,125500 ****
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--- 125631,125649 ----
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*** 125521,125538 ****
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*** 127958,127964 ****
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*** 127967,127978 ****
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*** 127991,127997 ****
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! 2d44ad936e0296b0496b56b9fd500290  libstdc++-v3/include/std/type_traits
  237682577d22ec3f9f5046abf0acd8e7  libstdc++-v3/include/std/typeindex
  520c52362f53e18f20838693cfd131bf  libstdc++-v3/include/std/unordered_map
  c82be32edefaa23cc1228b092d319315  libstdc++-v3/include/std/unordered_set
*************** b60f1331eaf500ccce917653c90c02d1  libstd
*** 141156,141162 ****
  2c05bcb0a318121f8deb29df215a1a76  libstdc++-v3/libsupc++/bad_cast.cc
  ed96195b097b5c5644e754342e3159bc  libstdc++-v3/libsupc++/bad_typeid.cc
  d54dac42098e24364e0e8249016c78b8  libstdc++-v3/libsupc++/class_type_info.cc
! c8845d9286975193cce98dc179126171  libstdc++-v3/libsupc++/compare
  ee57ed7a57d178fce16de2ec28a8340c  libstdc++-v3/libsupc++/cxxabi.h
  563de5baf2c41e9759583af359bb650e  libstdc++-v3/libsupc++/cxxabi_forced.h
  8aae4a67a18f5276de7831d7a44b7b2f  libstdc++-v3/libsupc++/cxxabi_init_exception.h
--- 141306,141312 ----
  2c05bcb0a318121f8deb29df215a1a76  libstdc++-v3/libsupc++/bad_cast.cc
  ed96195b097b5c5644e754342e3159bc  libstdc++-v3/libsupc++/bad_typeid.cc
  d54dac42098e24364e0e8249016c78b8  libstdc++-v3/libsupc++/class_type_info.cc
! 81a5ece911a6ba43b04d709cc7186005  libstdc++-v3/libsupc++/compare
  ee57ed7a57d178fce16de2ec28a8340c  libstdc++-v3/libsupc++/cxxabi.h
  563de5baf2c41e9759583af359bb650e  libstdc++-v3/libsupc++/cxxabi_forced.h
  8aae4a67a18f5276de7831d7a44b7b2f  libstdc++-v3/libsupc++/cxxabi_init_exception.h
*************** e66e202fb59625eb933c316b0bf9ee34  libstd
*** 141367,141373 ****
  1365c94f6279f312448afb4f276ee66f  libstdc++-v3/src/c++20/Makefile.am
  458fbfef5680c2db982e68e970f868e5  libstdc++-v3/src/c++20/Makefile.in
  44b19f393472c9494f63f59cbe9fe25f  libstdc++-v3/src/c++20/atomic.cc
! 3cceb517827358deb4fcc4cf6e2be4a1  libstdc++-v3/src/c++20/clock.cc
  94b3ab191e8fe566a951ac2b4f081c40  libstdc++-v3/src/c++20/format.cc
  939eb3ac7ce3c32a8b2aac493f053893  libstdc++-v3/src/c++20/sstream-inst.cc
  e9e89f4578e59d252e4caaf0b63d6dfb  libstdc++-v3/src/c++20/tzdata.zi
--- 141517,141523 ----
  1365c94f6279f312448afb4f276ee66f  libstdc++-v3/src/c++20/Makefile.am
  458fbfef5680c2db982e68e970f868e5  libstdc++-v3/src/c++20/Makefile.in
  44b19f393472c9494f63f59cbe9fe25f  libstdc++-v3/src/c++20/atomic.cc
! ac664105ccfd50a2a092e98df11864a3  libstdc++-v3/src/c++20/clock.cc
  94b3ab191e8fe566a951ac2b4f081c40  libstdc++-v3/src/c++20/format.cc
  939eb3ac7ce3c32a8b2aac493f053893  libstdc++-v3/src/c++20/sstream-inst.cc
  e9e89f4578e59d252e4caaf0b63d6dfb  libstdc++-v3/src/c++20/tzdata.zi
*************** b6846002a3a56bb10b1621e1792c246a  libstd
*** 142007,142012 ****
--- 142157,142163 ----
  2fe263333a538ddd2a8cd7953725ff52  libstdc++-v3/testsuite/20_util/expected/lwg3877.cc
  72b0fd75fcf0b218f79d93c61319bb5d  libstdc++-v3/testsuite/20_util/expected/lwg3886.cc
  8717f284befd8d0ee8fe1e50dcc6a7a7  libstdc++-v3/testsuite/20_util/expected/lwg3938.cc
+ 97aac511f36cb21427676e071c189c5a  libstdc++-v3/testsuite/20_util/expected/lwg4222.cc
  4824cecd15088232e3348b8bad95b2ce  libstdc++-v3/testsuite/20_util/expected/monadic.cc
  4bfafe03465669c57c9cf2717bc9b00e  libstdc++-v3/testsuite/20_util/expected/observers.cc
  8854ae6d49bfd2df3b2f3a9095f61fc4  libstdc++-v3/testsuite/20_util/expected/requirements.cc
*************** cf0e17bbd866d9cd26def3c1b550256c  libstd
*** 142087,142098 ****
  927fc7212da895d9c6ec8127e5916b36  libstdc++-v3/testsuite/20_util/function/requirements/explicit_instantiation.cc
  301115b4ac6059939af6a41b978b489a  libstdc++-v3/testsuite/20_util/function/target_no_rtti.cc
  8f5e17f706249e407588401c4f4da0c4  libstdc++-v3/testsuite/20_util/function_objects/83607.cc
! caf4405cb3d402b4c9f1c447afe23d51  libstdc++-v3/testsuite/20_util/function_objects/bind_back/1.cc
! e170250183cc1990447e11e192a53084  libstdc++-v3/testsuite/20_util/function_objects/bind_back/111327.cc
  2f63cd2255fde6cd4f014efb1ad34b27  libstdc++-v3/testsuite/20_util/function_objects/bind_back/116038.cc
! 9129577d16a42975472da4f7c0391362  libstdc++-v3/testsuite/20_util/function_objects/bind_front/1.cc
  b7e1e25aa8f6fddecd578ce1c23b63e2  libstdc++-v3/testsuite/20_util/function_objects/bind_front/107784.cc
! 3e03cf7e2ce86f073d20e140c3e581be  libstdc++-v3/testsuite/20_util/function_objects/bind_front/111327.cc
  586c9c5a05cff6578318e5d46789f1c9  libstdc++-v3/testsuite/20_util/function_objects/bind_front/116038.cc
  1a693160b90575d90d17b98c05d54334  libstdc++-v3/testsuite/20_util/function_objects/bind_front/2.cc
  ca6516aefe54fd40ebaa1dafa0a11255  libstdc++-v3/testsuite/20_util/function_objects/bind_front/97101.cc
--- 142238,142249 ----
  927fc7212da895d9c6ec8127e5916b36  libstdc++-v3/testsuite/20_util/function/requirements/explicit_instantiation.cc
  301115b4ac6059939af6a41b978b489a  libstdc++-v3/testsuite/20_util/function/target_no_rtti.cc
  8f5e17f706249e407588401c4f4da0c4  libstdc++-v3/testsuite/20_util/function_objects/83607.cc
! 2730a0bf441e209b7b0283acc7a1e230  libstdc++-v3/testsuite/20_util/function_objects/bind_back/1.cc
! a170197e1c15888e69e8f42454c4eb22  libstdc++-v3/testsuite/20_util/function_objects/bind_back/111327.cc
  2f63cd2255fde6cd4f014efb1ad34b27  libstdc++-v3/testsuite/20_util/function_objects/bind_back/116038.cc
! f2aceb62a85b385da954091149e35356  libstdc++-v3/testsuite/20_util/function_objects/bind_front/1.cc
  b7e1e25aa8f6fddecd578ce1c23b63e2  libstdc++-v3/testsuite/20_util/function_objects/bind_front/107784.cc
! 8db3b98751c1e7c5aa70b7392e0f66ac  libstdc++-v3/testsuite/20_util/function_objects/bind_front/111327.cc
  586c9c5a05cff6578318e5d46789f1c9  libstdc++-v3/testsuite/20_util/function_objects/bind_front/116038.cc
  1a693160b90575d90d17b98c05d54334  libstdc++-v3/testsuite/20_util/function_objects/bind_front/2.cc
  ca6516aefe54fd40ebaa1dafa0a11255  libstdc++-v3/testsuite/20_util/function_objects/bind_front/97101.cc
*************** c27224cc73720e56bd8e333f40d4c8b6  libstd
*** 142653,142665 ****
  b6ec6940575a0e07d16235c054dfd511  libstdc++-v3/testsuite/20_util/pair/astuple/constexpr_get_by_type.cc
  f2f2b91309730f195c55679493733944  libstdc++-v3/testsuite/20_util/pair/astuple/get-2.cc
  ec6b64ce59fd0cdc4da2c87413aca483  libstdc++-v3/testsuite/20_util/pair/astuple/get.cc
! c091b1a30d02efa1a5c4242c9a095b10  libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type.cc
  3fda333c62a545fe2651bddf9f002ece  libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type_neg.cc
  564f7d68dbe4fd3956684aa724ffa91e  libstdc++-v3/testsuite/20_util/pair/astuple/get_neg.cc
  2d9ee0ff43279e9bf93015d92d067695  libstdc++-v3/testsuite/20_util/pair/comparison_operators/constexpr.cc
  d9787fa4df26e7d94fdf4b2e072b1cf2  libstdc++-v3/testsuite/20_util/pair/comparison_operators/constexpr_c++20.cc
  1554d14710a3f9fa155dc38437c6c3ae  libstdc++-v3/testsuite/20_util/pair/comparison_operators/constrained.cc
  04fed045318edda260e590d9ad1630a6  libstdc++-v3/testsuite/20_util/pair/comparison_operators/lwg3865.cc
  94af77da42e85818ea59aed3c5fef8db  libstdc++-v3/testsuite/20_util/pair/cons/92878_92947.cc
  c5964cf74c99c86ce570bfdb15835bb8  libstdc++-v3/testsuite/20_util/pair/cons/99957.cc
  8627f9e27d2f45fb1bcbc23d24e6eaaf  libstdc++-v3/testsuite/20_util/pair/cons/constexpr.cc
--- 142804,142817 ----
  b6ec6940575a0e07d16235c054dfd511  libstdc++-v3/testsuite/20_util/pair/astuple/constexpr_get_by_type.cc
  f2f2b91309730f195c55679493733944  libstdc++-v3/testsuite/20_util/pair/astuple/get-2.cc
  ec6b64ce59fd0cdc4da2c87413aca483  libstdc++-v3/testsuite/20_util/pair/astuple/get.cc
! 7b695dd84077ebc9ded8b6f97ea9c376  libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type.cc
  3fda333c62a545fe2651bddf9f002ece  libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type_neg.cc
  564f7d68dbe4fd3956684aa724ffa91e  libstdc++-v3/testsuite/20_util/pair/astuple/get_neg.cc
  2d9ee0ff43279e9bf93015d92d067695  libstdc++-v3/testsuite/20_util/pair/comparison_operators/constexpr.cc
  d9787fa4df26e7d94fdf4b2e072b1cf2  libstdc++-v3/testsuite/20_util/pair/comparison_operators/constexpr_c++20.cc
  1554d14710a3f9fa155dc38437c6c3ae  libstdc++-v3/testsuite/20_util/pair/comparison_operators/constrained.cc
  04fed045318edda260e590d9ad1630a6  libstdc++-v3/testsuite/20_util/pair/comparison_operators/lwg3865.cc
+ de22916c6d33b4376c80895f09fe7345  libstdc++-v3/testsuite/20_util/pair/cons/110853.cc
  94af77da42e85818ea59aed3c5fef8db  libstdc++-v3/testsuite/20_util/pair/cons/92878_92947.cc
  c5964cf74c99c86ce570bfdb15835bb8  libstdc++-v3/testsuite/20_util/pair/cons/99957.cc
  8627f9e27d2f45fb1bcbc23d24e6eaaf  libstdc++-v3/testsuite/20_util/pair/cons/constexpr.cc
*************** d6f43aa2aa28ccf6f02960749550aac6  libstd
*** 150702,150708 ****
  3f44f7941efe01ca6d9866ad6a152776  libstdc++-v3/testsuite/std/ranges/adaptors/elements.cc
  40e31845569daf0829a17a44a8ee56a0  libstdc++-v3/testsuite/std/ranges/adaptors/enumerate/1.cc
  98b483f4295fbf685f4fe582088c3473  libstdc++-v3/testsuite/std/ranges/adaptors/filter.cc
! 6ce4d9d01be4defd04026414dbac0d5b  libstdc++-v3/testsuite/std/ranges/adaptors/join.cc
  326917eee6123d6a19d60b706ad52413  libstdc++-v3/testsuite/std/ranges/adaptors/join_with/1.cc
  284143a02c085fd30e15e55c66cfde20  libstdc++-v3/testsuite/std/ranges/adaptors/lazy_split.cc
  54271889e88b8f08f76cff98d9dfb68b  libstdc++-v3/testsuite/std/ranges/adaptors/lazy_split_neg.cc
--- 150854,150860 ----
  3f44f7941efe01ca6d9866ad6a152776  libstdc++-v3/testsuite/std/ranges/adaptors/elements.cc
  40e31845569daf0829a17a44a8ee56a0  libstdc++-v3/testsuite/std/ranges/adaptors/enumerate/1.cc
  98b483f4295fbf685f4fe582088c3473  libstdc++-v3/testsuite/std/ranges/adaptors/filter.cc
! 75a0550e4d32a500ba6398d86d64fc4f  libstdc++-v3/testsuite/std/ranges/adaptors/join.cc
  326917eee6123d6a19d60b706ad52413  libstdc++-v3/testsuite/std/ranges/adaptors/join_with/1.cc
  284143a02c085fd30e15e55c66cfde20  libstdc++-v3/testsuite/std/ranges/adaptors/lazy_split.cc
  54271889e88b8f08f76cff98d9dfb68b  libstdc++-v3/testsuite/std/ranges/adaptors/lazy_split_neg.cc
*************** dee72a6a60e99528b0d17bf3ff9a1e15  ltopti
*** 151687,151693 ****
  bc2f6032c98896249eadb56177c7d357  ltsugar.m4
  c30cd33c496505f13d9fbdb6970c7c33  ltversion.m4
  293853a13b7e218e3a4342cf85fbbf25  lt~obsolete.m4
! 0366c21dc9120eedf7fadfaeff2ddc9d  maintainer-scripts/ChangeLog
  33c7bc2d2c55956dfac85a05d8a80eff  maintainer-scripts/README
  507e832af5f2d63b8a78eef217c807a7  maintainer-scripts/branch_changer.py
  c819510f0d438149c1518bda7b165ac4  maintainer-scripts/bugzilla-close-candidate.py
--- 151839,151845 ----
  bc2f6032c98896249eadb56177c7d357  ltsugar.m4
  c30cd33c496505f13d9fbdb6970c7c33  ltversion.m4
  293853a13b7e218e3a4342cf85fbbf25  lt~obsolete.m4
! 1a15123b41df67846d98a83aeb63f7e0  maintainer-scripts/ChangeLog
  33c7bc2d2c55956dfac85a05d8a80eff  maintainer-scripts/README
  507e832af5f2d63b8a78eef217c807a7  maintainer-scripts/branch_changer.py
  c819510f0d438149c1518bda7b165ac4  maintainer-scripts/bugzilla-close-candidate.py
*************** c67f943b672b0dc1c628ebb0e2df97a3  mainta
*** 151698,151704 ****
  1fcc4f18e9f9043eaea6c3c990d96d9b  maintainer-scripts/setup.cfg
  1012437849cecda6e54b3948f279ae93  maintainer-scripts/update_version_git
  fe5245ec8ea53aaa51ffafbaef989713  maintainer-scripts/update_web_docs_git
! 89960da3ee98bea76c62bf0bf235d1f9  maintainer-scripts/update_web_docs_libstdcxx_git
  5f2a276ee7b8decec541391229d03591  missing
  fbe2467afef81c41c166173adeb0ee20  mkdep
  82b7b70a9845ee61a01f20b29dd2df2c  mkinstalldirs
--- 151850,151856 ----
  1fcc4f18e9f9043eaea6c3c990d96d9b  maintainer-scripts/setup.cfg
  1012437849cecda6e54b3948f279ae93  maintainer-scripts/update_version_git
  fe5245ec8ea53aaa51ffafbaef989713  maintainer-scripts/update_web_docs_git
! f96ea8872725419d57ba3089658c607e  maintainer-scripts/update_web_docs_libstdcxx_git
  5f2a276ee7b8decec541391229d03591  missing
  fbe2467afef81c41c166173adeb0ee20  mkdep
  82b7b70a9845ee61a01f20b29dd2df2c  mkinstalldirs
diff -Nrcpad gcc-16-20250831/gcc/ChangeLog gcc-16-20250907/gcc/ChangeLog
*** gcc-16-20250831/gcc/ChangeLog	Sun Aug 31 22:32:10 2025
--- gcc-16-20250907/gcc/ChangeLog	Sun Sep  7 22:32:52 2025
***************
*** 1,3 ****
--- 1,748 ----
+ 2025-09-06  Sam James  <sam@gentoo.org>
+ 
+ 	* doc/generic.texi (TYPE_CANONICAL): Don't mention long-removed
+ 	--param verify-canonical-types.
+ 
+ 2025-09-06  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR rtl-optimization/121835
+ 	* dep-fusion.cc (pass_dep_fusion::execute): Return early if
+ 	macro_fusion_pair_p is null.
+ 
+ 2025-09-06  Artemiy Volkov  <artemiyv@acm.org>
+ 
+ 	* Makefile.in (OBJS): Add dep-fusion.o.
+ 	* common.opt (fdep-fusion): Add option.
+ 	* dep-fusion.cc: New pass.
+ 	* doc/invoke.texi: Document it.
+ 	* opts.cc (default_options_table): Enable it at -O2+ and -Os.
+ 	* passes.def: Insert two instances of dep_fusion.
+ 	* tree-pass.h (make_pass_dep_fusion): Declare new function.
+ 
+ 2025-09-06  Sam James  <sam@gentoo.org>
+ 
+ 	* doc/invoke.texi (x86 Options): Fix '-momit-leaf-frame-pointer' typo.
+ 
+ 2025-09-06  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	* tree-ssa-forwprop.cc (simplify_builtin_call): Factor out
+ 	the memcpy followed by a memset optimization to ...
+ 	(simplify_builtin_memcpy_memset): Here. New function.
+ 
+ 2025-09-06  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	* tree-ssa-forwprop.cc (simplify_builtin_call): Factor out the memchr
+ 	optimization to ...
+ 	(simplify_builtin_memchr): Here. New function.
+ 
+ 2025-09-06  Simon Martin  <simon@nasilyan.com>
+ 
+ 	* ipa-inline-transform.cc: Define INCLUDE_ALGORITHM.
+ 
+ 2025-09-06  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	PR target/69374
+ 	* doc/install.texi (Prerequisites): Properly capitalize
+ 	GNU Binutils.
+ 	(Configuration): Ditto.
+ 	(Building): Ditto.
+ 	(Specific): Ditto.
+ 
+ 2025-09-06  Sam James  <sam@gentoo.org>
+ 
+ 	* doc/invoke.texi: Say 'whole-program' consistently where
+ 	appropriate.
+ 
+ 2025-09-06  Sam James  <sam@gentoo.org>
+ 
+ 	* doc/invoke.texi: Capitalize 'GNU Binutils' consistently.
+ 
+ 2025-09-06  Sam James  <sam@gentoo.org>
+ 
+ 	PR ipa/116410
+ 	* doc/invoke.texi (Link Options): Update -flinker-output= text
+ 	to reflect GNU Binutils changes. Fix grammar.
+ 
+ 2025-09-06  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* config/riscv/andes-vector-builtins-bases.cc
+ 	(nds_nibbleload): New class.
+ 	* config/riscv/andes-vector-builtins-bases.h (nds_vln8): New def.
+ 	(nds_vlnu8): Ditto.
+ 	* config/riscv/andes-vector-builtins-functions.def (nds_vln8): Ditto.
+ 	(nds_vlnu8): Ditto.
+ 	* config/riscv/andes-vector.md (@pred_intload_mov<su><mode>): New pattern.
+ 	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_Q_OPS): New def.
+ 	(DEF_RVV_QU_OPS): Ditto.
+ 	* config/riscv/riscv-vector-builtins.cc
+ 	(q_v_void_const_ptr_ops): New operand information.
+ 	(qu_v_void_const_ptr_ops): Ditto.
+ 	* config/riscv/riscv-vector-builtins.def (void_const_ptr): New def.
+ 	* config/riscv/riscv-vector-builtins.h (enum required_ext): Ditto.
+ 	(required_ext_to_isa_name): Add case XANDESVSINTLOAD_EXT.
+ 	(required_extensions_specified): Ditto.
+ 	* config/riscv/vector-iterators.md (NDS_QVI): New iterator.
+ 
+ 2025-09-06  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* common/config/riscv/riscv-common.cc:
+ 	Turn on VECTOR_ELEN_BF_16 for XAndesvbfhcvt.
+ 	* config.gcc: Add extra_objs andes-vector-builtins-bases.o
+ 	and extra_headers andes_vector.h.
+ 	* config/riscv/riscv-vector-builtins-shapes.cc
+ 	(BASE_NAME_MAX_LEN): Increase size to 20.
+ 	* config/riscv/riscv-vector-builtins.cc
+ 	(f32_to_bf16_nf_w_ops): New operand information.
+ 	(f32_to_bf16_nf_w_ops): New operand information.
+ 	(DEF_RVV_FUNCTION): New def.
+ 	* config/riscv/riscv-vector-builtins.def (bf16): Ditto.
+ 	* config/riscv/riscv-vector-builtins.h (enum required_ext): Ditto.
+ 	(required_ext_to_isa_name): Add case XANDESVBFHCVT_EXT.
+ 	(required_extensions_specified): Ditto.
+ 	* config/riscv/t-riscv: Add andes-vector-builtins-functions.def,
+ 	andes-vector-builtins-bases.h and andes-vector-builtins-bases.o.
+ 	* config/riscv/vector-iterators.md (NDS_VWEXTBF): New iterator.
+ 	(NDS_V_DOUBLE_TRUNC_BF): New attr.
+ 	* config/riscv/andes-vector-builtins-bases.cc: New file.
+ 	* config/riscv/andes-vector-builtins-bases.h: New file.
+ 	* config/riscv/andes-vector-builtins-functions.def: New file.
+ 	* config/riscv/andes_vector.h: New file.
+ 	* config/riscv/andes-vector.md: New file.
+ 	* config/riscv/vector.md: Include andes_vector.md.
+ 
+ 2025-09-06  Anton Blanchard  <antonb@tenstorrent.com>
+ 
+ 	* config/riscv/riscv-cores.def (RISCV_TUNE): Update.
+ 	* config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
+ 	Add tt_ascalon_d8.
+ 	* config/riscv/riscv.md: Update tune attribute and include
+ 	tt-ascalon-d8.md.
+ 	* config/riscv/tt-ascalon-d8.md: New file.
+ 
+ 2025-09-06  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/108466
+ 	* tree-ssa-phiopt.cc (factor_out_conditional_operation): Give better
+ 	locations to the new phi args and the new statement.
+ 
+ 2025-09-05  Andre Vehreschild  <vehre@gcc.gnu.org>
+ 
+ 	PR middle-end/121806
+ 	* gcc.cc (for_each_path): Initialize return value.
+ 
+ 2025-09-05  Robin Dapp  <rdapp@ventanamicro.com>
+ 
+ 	PR target/121510
+ 	* config/riscv/riscv.cc (riscv_legitimize_move): Check if we can
+ 	vec_extract.
+ 
+ 2025-09-05  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	PR rtl-optimization/121757
+ 	* rtl-ssa/accesses.h (clobber_group::lookup_clobber): New member
+ 	function.
+ 	* rtl-ssa/accesses.cc (clobber_group::lookup_clobber): Likewise.
+ 	(clobber_group::prev_clobber, clobber_group::next_clobber)
+ 	(function_info::add_clobber): Use it.
+ 
+ 2025-09-05  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR target/121794
+ 	* config/avr/avr.cc (avr_out_compare): Only use zero_reg
+ 	when there is no other sequence of the same length.
+ 	(avr_out_plus_ext): Same.
+ 	(avr_out_plus_1): Same.
+ 
+ 2025-09-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Do not
+ 	cost zero remaining scalar stmts.
+ 	(vectorizable_slp_permutation): Do not cost zero actual
+ 	permutations.
+ 	* tree-vect-stmts.cc (vectorizable_load): Likewise.
+ 
+ 2025-09-05  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121802
+ 	* tree-vectorizer.h (vect_setup_realignment): Add vectype
+ 	argument.
+ 	* tree-vect-data-refs.cc (vect_setup_realignment): Replace
+ 	local vectype with argument.
+ 	* tree-vect-stmts.cc (vectorizable_load): Adjust.
+ 
+ 2025-09-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* J: Remove.
+ 
+ 2025-09-05  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	* config/aarch64/iterators.md (sve_di_suf): New mode attribute.
+ 	* config/aarch64/aarch64-sve.md (<optab><mode>3 SVE_INT_BINARY_MULTI):
+ 	Rename to...
+ 	(<optab><mode>3<sve_di_suf>): ... This.  Use SVE_I_SIMD_DI mode
+ 	iterator.
+ 	* config/aarch64/aarch64-simd.md (<su><maxmin>v2di3): Use the above
+ 	for TARGET_SVE.
+ 
+ 2025-09-04  Pan Li  <pan2.li@intel.com>
+ 
+ 	* config/riscv/autovec-opt.md (*vmacc_vx_<mode>): Rename to
+ 	handle both the macc and madd.
+ 	(*mul_plus_vx_<mode>): Add madd pattern.
+ 	* config/riscv/vector.md (@pred_mul_plus_vx_<mode>): Rename to
+ 	handle both the macc and madd.
+ 	(*pred_macc_<mode>_scalar_undef): Remove.
+ 	(*pred_nmsac_<mode>_scalar_undef): Remove.
+ 	(*pred_mul_plus_vx<mode>_undef): Add new pattern to handle
+ 	both the vmacc and vmadd.
+ 	(@pred_mul_plus_vx<mode>): Ditto.
+ 
+ 2025-09-04  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* auto-profile.cc (afdo_annotate_cfg): Apply zero_bbs after early
+ 	exit for missing profile; fix formating
+ 
+ 2025-09-04  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-inline-transform.cc (inline_call): If function with
+ 	AFDO profile is inlined into function with
+ 	GUESSED_GLOBAL0_AFDO or GUESSED_GLOBAL0_ADJUSTED, scale
+ 	caller to AFDO profile.
+ 	* profile-count.h (profile_count::apply_scale): If num is AFDO
+ 	and den is not GUESSED, make result AFDO rather then GUESSED.
+ 
+ 2025-09-04  Wilco Dijkstra  <wilco.dijkstra@arm.com>
+ 
+ 	* builtins.cc (interclass_mathfn_icode): Add support for isnan
+ 	optab.
+ 	(expand_builtin): Add BUILT_IN_ISNAN to expand isnan optab.
+ 	(fold_builtin_interclass_mathfn): Expand BUILT_IN_ISNAN only after
+ 	checking for a valid optab.
+ 	(fold_builtin_classify): Move generic BUILT_IN_ISNAN expansion
+ 	to fold_builtin_interclass_mathfn.
+ 	(fold_builtin_1): For BUILT_IN_ISNAN first try fold_builtin_classify,
+ 	then fold_builtin_interclass_mathfn.
+ 	* optabs.def: Add isnan optab.
+ 	* doc/md.texi: Document isnan.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.cc (vect_create_epilog_for_reduction):
+ 	Remove unnecessary code around double reductions.
+ 
+ 2025-09-04  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/121775
+ 	* config/arm/neon.md (vec_set<mode>_internal, all variants):
+ 	validate the immediate operand that indicates the lane to
+ 	modify.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.cc (vectorizable_reduction): Eliminate
+ 	nested_cycle in favor of double_reduc and set that where
+ 	it makes most sense.  Remove never taken paths and always
+ 	true conditions.
+ 
+ 2025-09-04  Robin Dapp  <rdapp@ventanamicro.com>
+ 
+ 	PR target/121742
+ 	PR target/121780
+ 	PR target/121781
+ 	* config/riscv/riscv-v.cc (expand_vec_perm): Swap target and
+ 	tmp_target.
+ 
+ 2025-09-04  Robin Dapp  <rdapp@ventanamicro.com>
+ 
+ 	* tree-vect-loop-manip.cc (vect_gen_prolog_loop_niters):
+ 	Change prolog bound to poly_int64.
+ 	(vect_gen_scalar_loop_niters): Ditto.
+ 	(vect_do_peeling): Use poly estimate for frequency scaling.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121768
+ 	* tree-vect-loop.cc (vect_inner_phi_in_double_reduction_p): Remove.
+ 	(vect_analyze_scalar_cycles_1): Analyze inner loops of
+ 	double reductions immediately and only mark fully recognized
+ 	double reductions.  Skip already analyzed inner loops.
+ 	(vect_is_simple_reduction): Change double_reduc from a flag
+ 	to an output of the inner loop PHI and to whether we are
+ 	processing an inner loop of a double reduction.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121685
+ 	* tree-eh.cc (ref_outside_object_p): Split out from ...
+ 	(tree_could_trap_p): ... here.  Assume the this pointer
+ 	of a method refers to an object of at least size of its
+ 	base type.
+ 
+ 2025-09-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/107051
+ 	* tree-ssa-forwprop.cc (optimize_agr_copyprop_1): Allow for
+ 	memory sharing the same base if they known not to overlap over
+ 	the size.
+ 
+ 2025-09-04  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	PR target/110812
+ 	* config/riscv/riscv-c.cc (pragma_intrinsic_flags): Remove struct.
+ 	(riscv_pragma_intrinsic_flags_pollute): Remove function.
+ 	(riscv_pragma_intrinsic_flags_restore): Remove function.
+ 	(riscv_pragma_intrinsic): Simplify to only call handle_pragma_vector.
+ 	* config/riscv/riscv-vector-builtins.cc (pragma_intrinsic_flags):
+ 	Move struct definition here from riscv-c.cc.
+ 	(riscv_pragma_intrinsic_flags_pollute): Move and adapt from
+ 	riscv-c.cc, add zvfbfmin, zvfhmin and vector_elen_bf_16 support.
+ 	(riscv_pragma_intrinsic_flags_restore): Move from riscv-c.cc.
+ 	(rvv_switcher::rvv_switcher): Add pollute_flags parameter to
+ 	control flag manipulation.
+ 	(rvv_switcher::~rvv_switcher): Restore flags conditionally.
+ 	(register_builtin_types): Use rvv_switcher without polluting flags.
+ 	(get_required_extensions): Remove function.
+ 	(check_required_extensions): Simplify to only check type validity.
+ 	(function_instance::function_returns_void_p): Move implementation
+ 	from header.
+ 	(function_builder::add_function): Register placeholder for LTO.
+ 	(init_builtins): Simplify and handle LTO case.
+ 	(reinit_builtins): Remove function.
+ 	(handle_pragma_vector): Remove extension checking.
+ 	* config/riscv/riscv-vector-builtins.h
+ 	(function_instance::function_returns_void_p): Add declaration.
+ 	(function_call_info::function_returns_void_p): Remove inline
+ 	implementation.
+ 
+ 2025-09-04  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	* common/config/riscv/riscv-common.cc (riscv_ext_is_subset): Fix
+ 	inverted logic in extension subset check.
+ 
+ 2025-09-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR target/117599
+ 	* gimple-lower-bitint.cc (bitint_large_huge::limb_access): Move
+ 	build_qualified_type calls into the if/else if/else bodies, for
+ 	the last one set ltype to m_limb_type first, drop limb_type_a
+ 	and use ltype instead.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/61247
+ 	* tree-scalar-evolution.cc (simplify_peeled_chrec):
+ 	Handle the case of a converted peeled chrec.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121740
+ 	* tree-ssa-sccvn.cc (vn_reference_lookup_3): Allow skipping
+ 	may-defs from CTORs.  Do not skip may-defs with storage-order
+ 	issues or (partial) must-defs.
+ 
+ 2025-09-03  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* config/riscv/andes.def: Add nds_fcvt_s_bf16 and nds_fcvt_bf16_s.
+ 	* config/riscv/riscv.md (truncsfbf2): Add TARGET_XANDESBFHCVT support.
+ 	(extendbfsf2): Ditto.
+ 	* config/riscv/riscv-builtins.cc: New AVAIL andesbfhcvt.
+ 	Add new define RISCV_ATYPE_BF and RISCV_ATYPE_SF.
+ 	* config/riscv/riscv-ftypes.def: New DEF_RISCV_FTYPE.
+ 
+ 2025-09-03  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* config/riscv/constraints.md (Ou07): New constraint.
+ 	(ads_Bext): New constraint.
+ 	* config/riscv/iterators.md (ANYLE32): New iterator.
+ 	(sizen): New iterator.
+ 	(sh_limit): New iterator.
+ 	(sh_bit): New iterator.
+ 	(cs): New iterator.
+ 	* config/riscv/predicates.md (ads_branch_bbcs_operand): New predicate.
+ 	(ads_branch_bimm_operand): New predicate.
+ 	(ads_imm_extract_operand): New predicate.
+ 	(ads_extract_size_imm_si): New predicate.
+ 	(ads_extract_size_imm_di): New predicate.
+ 	(const_int5_operand): New predicate.
+ 	* config/riscv/riscv-builtins.cc:
+ 	Add new AVAIL andesperf32 and andesperf64.
+ 	Add new define RISCV_ATYPE_DI.
+ 	* config/riscv/riscv-ftypes.def: New DEF_RISCV_FTYPE.
+ 	* config/riscv/riscv.cc
+ 	(riscv_extend_cost): Cost for pattern 'bfo'.
+ 	(riscv_rtx_costs): Cost for XAndesperf extension.
+ 	* config/riscv/riscv.md: Add support for XAndesperf to patterns
+ 	zero_extendsidi2_internal, zero_extendhi2, extendsidi2_internal,
+ 	extend<SHORT:mode><SUPERQI:mode>2, <any_extract:optab><GPR:mode>3
+ 	and branch_on_bit.
+ 	* config/riscv/vector-iterators.md
+ 	(sz): Add sign_extract and zero_extract.
+ 	* config/riscv/andes.def: New file for vender Andes.
+ 	* config/riscv/andes.md: New file for vender Andes.
+ 
+ 2025-09-03  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* config/riscv/riscv-ext.def: Include riscv-ext-andes.def.
+ 	* config/riscv/riscv-ext.opt (riscv_xandes_subext): New variable.
+ 	(XANDESPERF) : New mask.
+ 	(XANDESBFHCVT): Ditto.
+ 	(XANDESVBFHCVT): Ditto.
+ 	(XANDESVSINTLOAD): Ditto.
+ 	(XANDESVPACKFPH): Ditto.
+ 	(XANDESVDOT): Ditto.
+ 	* config/riscv/t-riscv: Add riscv-ext-andes.def.
+ 	* doc/riscv-ext.texi: Regenerated.
+ 	* config/riscv/riscv-ext-andes.def: New file.
+ 
+ 2025-09-03  Paul-Antoine Arras  <parras@baylibre.com>
+ 
+ 	* config/riscv/autovec-opt.md (*vfmax_vf_<mode>): Rename into...
+ 	(*vf<optab>_vf_<mode>): New pattern to combine vec_duplicate +
+ 	vf{min,max}.vv into vf{max,min}.vf.
+ 	* J: New file.
+ 
+ 2025-09-03  Austin Law  <austinklaw@gmail.com>
+ 
+ 	PR target/121213
+ 	* config/riscv/sync.md (amo_atomic_exchange_extended<mode>):
+ 	Separate insn with sign extension for 64 bit targets.
+ 
+ 2025-09-03  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* ipa-profile.cc (ipa_profile): Dump profile_info.
+ 
+ 2025-09-03  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* opts.cc (enable_fdo_optimizations): Do not auto-enabele loop
+ 	optimizations with AutoFDO.
+ 
+ 2025-09-03  Jan Hubicka  <hubicka@ucw.cz>
+ 
+ 	* params.opt (-param=lto-partitions=): INcrease default value from 128 to 512.
+ 
+ 2025-09-03  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR target/121749
+ 	* config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn_n<mode>):
+ 	Use aarch64_simd_shift_imm_offset_<vn_mode> instead of
+ 	aarch64_simd_shift_imm_offset_<ve_mode> predicate.
+ 	(aarch64_<shrn_op>shrn_n<mode> VQN define_expand): Likewise.
+ 	(*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
+ 	(aarch64_<shrn_op>rshrn_n<mode>): Likewise.
+ 	(aarch64_<shrn_op>rshrn_n<mode> VQN define_expand): Likewise.
+ 	(aarch64_sqshrun_n<mode>_insn): Likewise.
+ 	(aarch64_sqshrun_n<mode>): Likewise.
+ 	(aarch64_sqshrun_n<mode> VQN define_expand): Likewise.
+ 	(aarch64_sqrshrun_n<mode>_insn): Likewise.
+ 	(aarch64_sqrshrun_n<mode>): Likewise.
+ 	(aarch64_sqrshrun_n<mode>): Likewise.
+ 	* config/aarch64/iterators.md (vn_mode): Handle DI, SI, HI modes.
+ 
+ 2025-09-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121756
+ 	* tree-ssa-sink.cc (select_best_block): Avoid irreducible
+ 	regions in otherwise same loop depth.
+ 	(statement_sink_location): When sinking a VDEF, never place
+ 	that into an irreducible region.
+ 
+ 2025-09-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-patterns.cc (vect_recog_cond_expr_convert_pattern):
+ 	Do not set any vector types.
+ 
+ 2025-09-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121767
+ 	* tree-vect-patterns.cc (vect_recog_mod_var_pattern): Disable
+ 	for reductions.
+ 
+ 2025-09-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121758
+ 	* tree-vect-patterns.cc (vect_mark_pattern_stmts): Try
+ 	harder to find a reduction continuation.
+ 
+ 2025-09-03  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/121355
+ 	* fold-const.cc (split_address_to_core_and_offset): Handle an MEM_REF after the call
+ 	to get_inner_reference.
+ 
+ 2025-09-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	* tree-ssa-ccp.cc (optimize_memcmp_eq): New function.
+ 	(pass_fold_builtins::execute): Call optimize_memcmp_eq
+ 	for memcmp.
+ 	* tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcmp): Remove.
+ 	(strlen_pass::check_and_optimize_call): Don't call handle_builtin_memcmp.
+ 
+ 2025-09-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	* tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcmp): Create
+ 	unaligned types if the alignment of the pointers is less
+ 	than the alignment of the new type.
+ 
+ 2025-09-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	* tree-ssa-forwprop.cc (simplify_builtin_memcmp): Create
+ 	unaligned types if the alignment of the pointers is less
+ 	than the alignment of the new type.
+ 
+ 2025-09-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121753
+ 	* tree-vect-patterns.cc (vect_synth_mult_by_constant): Properly
+ 	bail when synth_shift_p and an alg_shift use.  Handle other
+ 	problematic cases.
+ 
+ 2025-09-02  Robin Dapp  <rdapp@ventanamicro.com>
+ 
+ 	* config/riscv/riscv-v.cc (is_vlmax_len_p): Properly handle VLS
+ 	modes.
+ 	(imm_avl_p): Fix VLS length check.
+ 	(expand_strided_load): Use is_vlmax_len_p.
+ 	(expand_strided_store): Ditto.
+ 	* config/riscv/riscv-avlprop.cc (pass_avlprop::execute):
+ 	Use GET_MODE_NUNITS / NF as avl.
+ 
+ 2025-09-02  Robin Dapp  <rdapp@ventanamicro.com>
+ 
+ 	PR target/121742
+ 	* config/riscv/riscv-v.cc (expand_vec_perm): Use temporary if
+ 	op1 and target overlap.
+ 
+ 2025-09-02  Andrew Stubbs  <ams@baylibre.com>
+ 
+ 	* doc/options.texi: Document NoOffload.
+ 
+ 2025-09-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-stmts.cc (vect_transform_stmt): Clear
+ 	STMT_VINFO_VECTYPE for all stmts.
+ 	(vect_analyze_stmt): Likewise.  But restore at the end again.
+ 
+ 2025-09-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121754
+ 	* tree-vectorizer.h (vect_reduc_type): Simplify to not ICE
+ 	on nested cycles.
+ 
+ 2025-09-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-data-refs.cc (bump_vector_ptr): Remove the
+ 	STMT_VINFO_VECTYPE use, bump is always specified.
+ 
+ 2025-09-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (vect_check_gather_scatter): Add
+ 	vectype parameter.
+ 	* tree-vect-data-refs.cc (vect_check_gather_scatter): Get
+ 	vectype as parameter.
+ 	(vect_analyze_data_refs): Adjust.
+ 	* tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Likewise.
+ 	* tree-vect-slp.cc (vect_get_and_check_slp_defs): Get vectype
+ 	as parameter, pass down.
+ 	(vect_build_slp_tree_2): Adjust.
+ 	* tree-vect-stmts.cc (vect_mark_stmts_to_be_vectorized): Likewise.
+ 	(vect_use_strided_gather_scatters_p): Likewise.
+ 
+ 2025-09-02  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* doc/extend.texi (Common Variable Attributes): Put counted_by
+ 	in alphabetical order.
+ 
+ 2025-09-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/121663
+ 	* tree-cfg.cc (assign_discriminator): Change map argument type
+ 	from hash_map with int_hash <int64_t, -1, -2> to one with
+ 	int_hash <unsigned, -1U, -2U>.  Cast LOCATION_LINE to unsigned.
+ 	Return early for (unsigned) LOCATION_LINE above -3U.
+ 	(assign_discriminators): Change map type from hash_map with
+ 	int_hash <int64_t, -1, -2> to one with int_hash <unsigned, -1U, -2U>.
+ 
+ 2025-09-02  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	* config/riscv/gen-riscv-ext-opt.cc (version_t): Remove unused
+ 	struct.
+ 	(print_ext_doc_entry): Remove unused function.
+ 
+ 2025-09-01  Jonathan Grant  <jg@jguk.org>
+ 
+ 	* doc/install.texi (Configuration): Fix spelling of "support"
+ 	and "floating-point arithmetic".
+ 
+ 2025-09-01  Mark Harmstone  <mark@harmstone.com>
+ 
+ 	* dwarf2codeview.cc (get_type_num_array_type): Don't try to
+ 	encode non-C-style arrays.
+ 
+ 2025-09-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* builtins.def: Implement C2Y N3577 - Rename s/uimaxabs/umaxabs/.
+ 	(BUILT_IN_UIMAXABS): Rename to ...
+ 	(BUILT_IN_UMAXABS): ... this.  Change second argument to "umaxabs".
+ 	* builtins.cc (fold_builtin_1): Use BUILT_IN_UMAXABS rather than
+ 	BUILT_IN_UIMAXABS.
+ 
+ 2025-09-01  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/invoke.texi (Optimize Options): Update the perfwiki web
+ 	address.
+ 
+ 2025-09-01  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* diagnostics/logging.h (log_param_location_t): Cast
+ 	location_t value to fmt_size_t.
+ 
+ 2025-09-01  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* configure: Regenerate.
+ 	* configure.ac: Do not claim cfi instruction support even
+ 	if the assembler has it.
+ 
+ 2025-09-01  Yoshinori Sato  <yoshinori.sato@nifty.com>
+ 
+ 	PR target/89828
+ 	* config/rx/rx.cc (add_pop_cfi_notes): Release the frame pointer if it is
+ 	used.
+ 	(rx_expand_prologue): Redesigned stack pointer and frame pointer update
+ 	process.
+ 
+ 2025-09-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121744
+ 	* tree-vect-patterns.cc (vect_recog_vector_vector_shift_pattern):
+ 	Allow constant left operand.
+ 
+ 2025-09-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.cc (vect_create_epilog_for_reduction):
+ 	Use SLP_TREE_REDUC_IDX for following the SLP graph and
+ 	for identifying whether we use the 'else' in a COND.
+ 	(vectorizable_lane_reducing): Simplify check of whether
+ 	we are in a reduction.
+ 	(vectorizable_reduction): Add sanity checking around
+ 	SLP_TREE_REDUC_IDX and use it where it looks appropriate.
+ 	(vect_transform_reduction): Use SLP_TREE_REDUC_IDX.
+ 	* tree-vect-stmts.cc (vectorizable_call): Likewise.
+ 	(vectorizable_operation): Likewise.
+ 	(vectorizable_condition): Likewise.
+ 
+ 2025-09-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.cc (vectorizable_live_operation): Check
+ 	vect_is_reduction on the SLP node rather than
+ 	STMT_VINFO_REDUC_DEF on the stmt.
+ 	(vectorizable_reduction): Do not set STMT_VINFO_REDUC_DEF
+ 	on live stmts.
+ 
+ 2025-09-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vectorizer.h (vect_reduc_info): New.
+ 	(create_info_for_reduction): Likewise.
+ 	(VECT_REDUC_INFO_TYPE): Likewise.
+ 	(VECT_REDUC_INFO_CODE): Likewise.
+ 	(VECT_REDUC_INFO_FN): Likewise.
+ 	(VECT_REDUC_INFO_SCALAR_RESULTS): Likewise.
+ 	(VECT_REDUC_INFO_INITIAL_VALUES): Likewise.
+ 	(VECT_REDUC_INFO_REUSED_ACCUMULATOR): Likewise.
+ 	(VECT_REDUC_INFO_INDUC_COND_INITIAL_VAL): Likewise.
+ 	(VECT_REDUC_INFO_EPILOGUE_ADJUSTMENT): Likewise.
+ 	(VECT_REDUC_INFO_FORCE_SINGLE_CYCLE): Likewise.
+ 	(VECT_REDUC_INFO_RESULT_POS): Likewise.
+ 	(VECT_REDUC_INFO_VECTYPE): Likewise.
+ 	(STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL): Remove.
+ 	(STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT): Likewise.
+ 	(STMT_VINFO_FORCE_SINGLE_CYCLE): Likewise.
+ 	(STMT_VINFO_REDUC_FN): Likewise.
+ 	(STMT_VINFO_REDUC_VECTYPE): Likewise.
+ 	(vect_reusable_accumulator::reduc_info): Adjust.
+ 	(vect_reduc_type): Adjust.
+ 	(_slp_tree::cycle_info): New member.
+ 	(SLP_TREE_REDUC_IDX): Likewise.
+ 	(vect_reduc_info_s): Move/copy data from ...
+ 	(_stmt_vec_info): ... here.
+ 	(_loop_vec_info::redcu_infos): New member.
+ 	(info_for_reduction): Adjust to take SLP node.
+ 	(vect_reduc_type): Adjust.
+ 	(vect_is_reduction): Add overload for SLP node.
+ 	* tree-vectorizer.cc (vec_info::new_stmt_vec_info):
+ 	Do not initialize removed members.
+ 	(vec_info::free_stmt_vec_info): Do not release them.
+ 	* tree-vect-stmts.cc (vectorizable_condition): Adjust.
+ 	* tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
+ 	cycle info.
+ 	(vect_build_slp_tree_2): Compute SLP reduc_idx and store
+ 	it.  Create, populate and propagate reduction info.
+ 	(vect_print_slp_tree): Print cycle info.
+ 	(vect_analyze_slp_reduc_chain): Set cycle info on the
+ 	manual added conversion node.
+ 	(vect_optimize_slp_pass::start_choosing_layouts): Adjust.
+ 	* tree-vect-loop.cc (_loop_vec_info::~_loop_vec_info):
+ 	Release reduction infos.
+ 	(info_for_reduction): Get the reduction info from
+ 	the vector in the loop_vinfo.
+ 	(vect_create_epilog_for_reduction): Adjust.
+ 	(vectorizable_reduction): Likewise.
+ 	(vect_transform_reduction): Likewise.
+ 	(vect_transform_cycle_phi): Likewise, deal with nested
+ 	cycles not part of a double reduction have no reduction info.
+ 	* config/aarch64/aarch64.cc (aarch64_force_single_cycle):
+ 	Use VECT_REDUC_INFO_FORCE_SINGLE_CYCLE, get SLP node and use
+ 	that.
+ 	(aarch64_vector_costs::count_ops): Adjust.
+ 
+ 2025-09-01  Tobias Burnus  <tburnus@baylibre.com>
+ 
+ 	PR target/121392
+ 	* doc/install.texi (amdgcn): Mention Newlib commit
+ 	that fixes another SIMD issue.
+ 
+ 2025-09-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	* tree-vect-loop.cc (vect_is_simple_iv_evolution): Get
+ 	stmt_info and store into STMT_VINFO_LOOP_PHI_EVOLUTION_BASE_UNCHANGED
+ 	and STMT_VINFO_LOOP_PHI_EVOLUTION_PART here.  Drop unused
+ 	output parameters.
+ 	(vect_is_nonlinear_iv_evolution): Likewise.
+ 	(vect_analyze_scalar_cycles_1): Remove redundant setting
+ 	of STMT_VINFO_LOOP_PHI_EVOLUTION_BASE_UNCHANGED and
+ 	STMT_VINFO_LOOP_PHI_EVOLUTION_PART.
+ 
+ 2025-09-01  Cui, Lili  <lili.cui@intel.com>
+ 
+ 	PR rtl-optimization/117838
+ 	* ira-color.cc (improve_allocation): Remove soft conflict related code.
+ 
+ 2025-09-01  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	PR target/121699
+ 	* config/i386/predicates.md (const_vec_dup_operand): New
+ 	predicate.
+ 	* config/i386/sse.md (cond_<insn><mode>): Fix predicate of
+ 	operands[3], and fix wrong operands passed to
+ 	ix86_vgf2p8affine_shift_matrix and
+ 	gen_vgf2p8affineqb_<mode>_mask.
+ 
+ 2025-08-31  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
+ 
+ 	* config/xtensa/predicates.md (alt_ubranch_operator):
+ 	New predicate.
+ 	* config/xtensa/xtensa.md (*eqne_in_range):
+ 	New insn_and_split pattern.
+ 
+ 2025-08-31  Shreya Munnangi  <smunnangi1@ventanamicro.com>
+ 
+ 	* config/riscv/riscv-protos.h (synthesize_add_extended): Prototype.
+ 	* config/riscv/riscv.cc (synthesize_add_extended): New function.
+ 	* config/riscv/riscv.md (addsi3): For RV64, try synthesize_add_extended.
+ 
+ 2025-08-31  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/install.texi (Binaries): Drop MinGW.
+ 
  2025-08-30  Jakub Jelinek  <jakub@redhat.com>
  
  	PR tree-optimization/121698
diff -Nrcpad gcc-16-20250831/gcc/DATESTAMP gcc-16-20250907/gcc/DATESTAMP
*** gcc-16-20250831/gcc/DATESTAMP	Sun Aug 31 22:32:10 2025
--- gcc-16-20250907/gcc/DATESTAMP	Sun Sep  7 22:32:52 2025
***************
*** 1 ****
! 20250831
--- 1 ----
! 20250907
diff -Nrcpad gcc-16-20250831/gcc/Makefile.in gcc-16-20250907/gcc/Makefile.in
*** gcc-16-20250831/gcc/Makefile.in	Sun Aug 31 22:32:10 2025
--- gcc-16-20250907/gcc/Makefile.in	Sun Sep  7 22:32:52 2025
*************** OBJS = \
*** 1448,1453 ****
--- 1448,1454 ----
  	dce.o \
  	ddg.o \
  	debug.o \
+ 	dep-fusion.o \
  	df-core.o \
  	df-problems.o \
  	df-scan.o \
diff -Nrcpad gcc-16-20250831/gcc/auto-profile.cc gcc-16-20250907/gcc/auto-profile.cc
*** gcc-16-20250831/gcc/auto-profile.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/auto-profile.cc	Sun Sep  7 22:32:57 2025
*************** afdo_annotate_cfg (void)
*** 3875,3896 ****
  	  set_bb_annotated (bb, &annotated_bb);
  	}
      }
-   /* We try to preserve static profile for BBs with 0
-      afdo samples, but if even static profile agrees with 0,
-      consider it final so propagation works better.  */
-   for (basic_block bb : zero_bbs)
-     if (!bb->count.nonzero_p ())
-       {
- 	update_count_by_afdo_count (&bb->count, 0);
- 	set_bb_annotated (bb, &annotated_bb);
- 	if (dump_file)
- 	  {
- 	    fprintf (dump_file, "  Annotating bb %i with count ", bb->index);
- 	    bb->count.dump (dump_file);
- 	    fprintf (dump_file,
- 		     " (has 0 count in both static and afdo profile)\n");
- 	  }
-       }
    /* Exit without clobbering static profile if there was no
       non-zero count.  */
    if (!profile_found)
--- 3875,3880 ----
*************** afdo_annotate_cfg (void)
*** 3926,3956 ****
        free_dominance_info (CDI_POST_DOMINATORS);
        return;
      }
  
    /* Update profile.  */
    if (head_count > 0)
!   {
!     update_count_by_afdo_count (&ENTRY_BLOCK_PTR_FOR_FN (cfun)->count,
! 				head_count);
!     set_bb_annotated (ENTRY_BLOCK_PTR_FOR_FN (cfun), &annotated_bb);
!     if (!is_bb_annotated (ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb, annotated_bb)
! 	|| ENTRY_BLOCK_PTR_FOR_FN (cfun)->count
! 	   > ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->count)
!       {
! 	ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->count
! 	    = ENTRY_BLOCK_PTR_FOR_FN (cfun)->count;
! 	set_bb_annotated (ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb,
! 			  &annotated_bb);
!       }
!     if (!is_bb_annotated (EXIT_BLOCK_PTR_FOR_FN (cfun), annotated_bb)
! 	|| ENTRY_BLOCK_PTR_FOR_FN (cfun)->count
! 	   > EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb->count)
!       {
! 	EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb->count
! 	    = ENTRY_BLOCK_PTR_FOR_FN (cfun)->count;
! 	set_bb_annotated (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb, &annotated_bb);
!       }
!   }
  
    /* Calculate, propagate count and probability information on CFG.  */
    afdo_calculate_branch_prob (&annotated_bb);
--- 3910,3956 ----
        free_dominance_info (CDI_POST_DOMINATORS);
        return;
      }
+   /* We try to preserve static profile for BBs with 0
+      afdo samples, but if even static profile agrees with 0,
+      consider it final so propagation works better.  */
+   for (basic_block bb : zero_bbs)
+     if (!bb->count.nonzero_p ())
+       {
+ 	update_count_by_afdo_count (&bb->count, 0);
+ 	set_bb_annotated (bb, &annotated_bb);
+ 	if (dump_file)
+ 	  {
+ 	    fprintf (dump_file, "  Annotating bb %i with count ", bb->index);
+ 	    bb->count.dump (dump_file);
+ 	    fprintf (dump_file,
+ 		     " (has 0 count in both static and afdo profile)\n");
+ 	  }
+       }
  
    /* Update profile.  */
    if (head_count > 0)
!     {
!       update_count_by_afdo_count (&ENTRY_BLOCK_PTR_FOR_FN (cfun)->count,
! 				  head_count);
!       set_bb_annotated (ENTRY_BLOCK_PTR_FOR_FN (cfun), &annotated_bb);
!       if (!is_bb_annotated (ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb, annotated_bb)
! 	  || ENTRY_BLOCK_PTR_FOR_FN (cfun)->count
! 	     > ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->count)
! 	{
! 	  ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->count
! 	      = ENTRY_BLOCK_PTR_FOR_FN (cfun)->count;
! 	  set_bb_annotated (ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb,
! 			    &annotated_bb);
! 	}
!       if (!is_bb_annotated (EXIT_BLOCK_PTR_FOR_FN (cfun), annotated_bb)
! 	  || ENTRY_BLOCK_PTR_FOR_FN (cfun)->count
! 	     > EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb->count)
! 	{
! 	  EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb->count
! 	      = ENTRY_BLOCK_PTR_FOR_FN (cfun)->count;
! 	  set_bb_annotated (EXIT_BLOCK_PTR_FOR_FN (cfun)->prev_bb, &annotated_bb);
! 	}
!     }
  
    /* Calculate, propagate count and probability information on CFG.  */
    afdo_calculate_branch_prob (&annotated_bb);
diff -Nrcpad gcc-16-20250831/gcc/builtins.cc gcc-16-20250907/gcc/builtins.cc
*** gcc-16-20250831/gcc/builtins.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/builtins.cc	Sun Sep  7 22:32:57 2025
*************** interclass_mathfn_icode (tree arg, tree
*** 2497,2511 ****
    switch (DECL_FUNCTION_CODE (fndecl))
      {
      CASE_FLT_FN (BUILT_IN_ILOGB):
!       errno_set = true; builtin_optab = ilogb_optab; break;
      CASE_FLT_FN (BUILT_IN_ISINF):
!       builtin_optab = isinf_optab; break;
      case BUILT_IN_ISFINITE:
        builtin_optab = isfinite_optab;
        break;
      case BUILT_IN_ISNORMAL:
        builtin_optab = isnormal_optab;
        break;
      CASE_FLT_FN (BUILT_IN_FINITE):
      case BUILT_IN_FINITED32:
      case BUILT_IN_FINITED64:
--- 2497,2517 ----
    switch (DECL_FUNCTION_CODE (fndecl))
      {
      CASE_FLT_FN (BUILT_IN_ILOGB):
!       errno_set = true;
!       builtin_optab = ilogb_optab;
!       break;
      CASE_FLT_FN (BUILT_IN_ISINF):
!       builtin_optab = isinf_optab;
!       break;
      case BUILT_IN_ISFINITE:
        builtin_optab = isfinite_optab;
        break;
      case BUILT_IN_ISNORMAL:
        builtin_optab = isnormal_optab;
        break;
+     CASE_FLT_FN (BUILT_IN_ISNAN):
+       builtin_optab = isnan_optab;
+       break;
      CASE_FLT_FN (BUILT_IN_FINITE):
      case BUILT_IN_FINITED32:
      case BUILT_IN_FINITED64:
*************** interclass_mathfn_icode (tree arg, tree
*** 2513,2518 ****
--- 2519,2527 ----
      case BUILT_IN_ISINFD32:
      case BUILT_IN_ISINFD64:
      case BUILT_IN_ISINFD128:
+     case BUILT_IN_ISNAND32:
+     case BUILT_IN_ISNAND64:
+     case BUILT_IN_ISNAND128:
        /* These builtins have no optabs (yet).  */
        break;
      default:
*************** expand_builtin (tree exp, rtx target, rt
*** 7959,7964 ****
--- 7968,7974 ----
        gcc_fallthrough ();
      CASE_FLT_FN (BUILT_IN_ISINF):
      CASE_FLT_FN (BUILT_IN_FINITE):
+     CASE_FLT_FN (BUILT_IN_ISNAN):
      case BUILT_IN_ISFINITE:
      case BUILT_IN_ISNORMAL:
        target = expand_builtin_interclass_mathfn (exp, target);
*************** fold_builtin_interclass_mathfn (location
*** 9832,9837 ****
--- 9842,9860 ----
  			      max_exp, min_exp);
  	return result;
        }
+     CASE_FLT_FN (BUILT_IN_ISNAN):
+     case BUILT_IN_ISNAND32:
+     case BUILT_IN_ISNAND64:
+     case BUILT_IN_ISNAND128:
+       {
+ 	/* In IBM extended NaN and Inf are encoded in the high-order double
+ 	   value only.  The low-order value is not significant.  */
+ 	if (is_ibm_extended)
+ 	  arg = fold_build1_loc (loc, NOP_EXPR, double_type_node, arg);
+ 	arg = builtin_save_expr (arg);
+ 	tree type = TREE_TYPE (TREE_TYPE (fndecl));
+ 	return fold_build2_loc (loc, UNORDERED_EXPR, type, arg, arg);
+       }
      default:
        break;
      }
*************** fold_builtin_classify (location_t loc, t
*** 9903,9920 ****
  	return omit_one_operand_loc (loc, type, integer_one_node, arg);
        if (!tree_expr_maybe_nan_p (arg))
  	return omit_one_operand_loc (loc, type, integer_zero_node, arg);
! 
!       {
! 	bool is_ibm_extended = MODE_COMPOSITE_P (TYPE_MODE (TREE_TYPE (arg)));
! 	if (is_ibm_extended)
! 	  {
! 	    /* NaN and Inf are encoded in the high-order double value
! 	       only.  The low-order value is not significant.  */
! 	    arg = fold_build1_loc (loc, NOP_EXPR, double_type_node, arg);
! 	  }
!       }
!       arg = builtin_save_expr (arg);
!       return fold_build2_loc (loc, UNORDERED_EXPR, type, arg, arg);
  
      case BUILT_IN_ISSIGNALING:
        /* Folding to true for REAL_CST is done in fold_const_call_ss.
--- 9926,9932 ----
  	return omit_one_operand_loc (loc, type, integer_one_node, arg);
        if (!tree_expr_maybe_nan_p (arg))
  	return omit_one_operand_loc (loc, type, integer_zero_node, arg);
!       return NULL_TREE;
  
      case BUILT_IN_ISSIGNALING:
        /* Folding to true for REAL_CST is done in fold_const_call_ss.
*************** fold_builtin_1 (location_t loc, tree exp
*** 10679,10685 ****
      case BUILT_IN_UABS:
      case BUILT_IN_ULABS:
      case BUILT_IN_ULLABS:
!     case BUILT_IN_UIMAXABS:
        return fold_builtin_abs (loc, arg0, type);
  
      CASE_FLT_FN (BUILT_IN_CONJ):
--- 10691,10697 ----
      case BUILT_IN_UABS:
      case BUILT_IN_ULABS:
      case BUILT_IN_ULLABS:
!     case BUILT_IN_UMAXABS:
        return fold_builtin_abs (loc, arg0, type);
  
      CASE_FLT_FN (BUILT_IN_CONJ):
*************** fold_builtin_1 (location_t loc, tree exp
*** 10746,10752 ****
      case BUILT_IN_ISNAND32:
      case BUILT_IN_ISNAND64:
      case BUILT_IN_ISNAND128:
!       return fold_builtin_classify (loc, fndecl, arg0, BUILT_IN_ISNAN);
  
      case BUILT_IN_ISSIGNALING:
        return fold_builtin_classify (loc, fndecl, arg0, BUILT_IN_ISSIGNALING);
--- 10758,10769 ----
      case BUILT_IN_ISNAND32:
      case BUILT_IN_ISNAND64:
      case BUILT_IN_ISNAND128:
!       {
! 	tree ret = fold_builtin_classify (loc, fndecl, arg0, BUILT_IN_ISNAN);
! 	if (ret)
! 	  return ret;
! 	return fold_builtin_interclass_mathfn (loc, fndecl, arg0);
!       }
  
      case BUILT_IN_ISSIGNALING:
        return fold_builtin_classify (loc, fndecl, arg0, BUILT_IN_ISSIGNALING);
diff -Nrcpad gcc-16-20250831/gcc/builtins.def gcc-16-20250907/gcc/builtins.def
*** gcc-16-20250831/gcc/builtins.def	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/builtins.def	Sun Sep  7 22:32:57 2025
*************** DEF_EXT_LIB_BUILTIN    (BUILT_IN_STRFMON
*** 1137,1143 ****
  DEF_LIB_BUILTIN        (BUILT_IN_STRFTIME, "strftime", BT_FN_SIZE_STRING_SIZE_CONST_STRING_CONST_TM_PTR, ATTR_FORMAT_STRFTIME_NOTHROW_3_0)
  DEF_GCC_BUILTIN        (BUILT_IN_TRAP, "trap", BT_FN_VOID, ATTR_NORETURN_NOTHROW_LEAF_COLD_LIST)
  DEF_C2Y_BUILTIN        (BUILT_IN_UABS, "uabs", BT_FN_UINT_INT, ATTR_CONST_NOTHROW_LEAF_LIST)
! DEF_C2Y_BUILTIN        (BUILT_IN_UIMAXABS, "uimaxabs", BT_FN_UINTMAX_INTMAX, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_C2Y_BUILTIN        (BUILT_IN_ULABS, "ulabs", BT_FN_ULONG_LONG, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_C2Y_BUILTIN        (BUILT_IN_ULLABS, "ullabs", BT_FN_ULONGLONG_LONGLONG, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_UNREACHABLE_TRAP, "unreachable trap", BT_FN_VOID, ATTR_CONST_NORETURN_NOTHROW_LEAF_COLD_LIST)
--- 1137,1143 ----
  DEF_LIB_BUILTIN        (BUILT_IN_STRFTIME, "strftime", BT_FN_SIZE_STRING_SIZE_CONST_STRING_CONST_TM_PTR, ATTR_FORMAT_STRFTIME_NOTHROW_3_0)
  DEF_GCC_BUILTIN        (BUILT_IN_TRAP, "trap", BT_FN_VOID, ATTR_NORETURN_NOTHROW_LEAF_COLD_LIST)
  DEF_C2Y_BUILTIN        (BUILT_IN_UABS, "uabs", BT_FN_UINT_INT, ATTR_CONST_NOTHROW_LEAF_LIST)
! DEF_C2Y_BUILTIN        (BUILT_IN_UMAXABS, "umaxabs", BT_FN_UINTMAX_INTMAX, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_C2Y_BUILTIN        (BUILT_IN_ULABS, "ulabs", BT_FN_ULONG_LONG, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_C2Y_BUILTIN        (BUILT_IN_ULLABS, "ullabs", BT_FN_ULONGLONG_LONGLONG, ATTR_CONST_NOTHROW_LEAF_LIST)
  DEF_GCC_BUILTIN        (BUILT_IN_UNREACHABLE_TRAP, "unreachable trap", BT_FN_VOID, ATTR_CONST_NORETURN_NOTHROW_LEAF_COLD_LIST)
diff -Nrcpad gcc-16-20250831/gcc/c/ChangeLog gcc-16-20250907/gcc/c/ChangeLog
*** gcc-16-20250831/gcc/c/ChangeLog	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/c/ChangeLog	Sun Sep  7 22:32:57 2025
***************
*** 1,3 ****
--- 1,24 ----
+ 2025-09-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* c-decl.cc (pushtag): Remove ()s around string literal
+ 	in call to diagnostic function.
+ 	(diagnose_mismatched_decls): Likewise.
+ 	(c_check_switch_jump_warnings): Likewise.
+ 	(grokdeclarator): Likewise.
+ 	(warn_cxx_compat_finish_struct): Likewise.
+ 	(build_enumerator): Formatting fix.
+ 	(declspecs_add_type): Remove ()s around string literal
+ 	in call to diagnostic function, simplify
+ 	"both %<something%> and %<something%>" starting format
+ 	strings to "both %qs and %qs" with appropriate arguments.
+ 	Formatting fixes.
+ 	* c-typeck.cc (build_external_ref): Remove ()s around string
+ 	literal in call to diagnostic function.
+ 	(build_conditional_expr): Likewise.
+ 	* c-parser.cc (c_parser_transaction): Use G_() around string
+ 	literals.  Formatting fix.
+ 	(c_parser_transaction_expression): Likewise.
+ 
  2025-08-26  Sandra Loosemore  <sloosemore@baylibre.com>
  
  	PR middle-end/118839
diff -Nrcpad gcc-16-20250831/gcc/c/c-decl.cc gcc-16-20250907/gcc/c/c-decl.cc
*** gcc-16-20250831/gcc/c/c-decl.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/c/c-decl.cc	Sun Sep  7 22:32:57 2025
*************** pushtag (location_t loc, tree name, tree
*** 1726,1733 ****
  	{
  	  auto_diagnostic_group d;
  	  if (warning_at (loc, OPT_Wc___compat,
! 			  ("using %qD as both a typedef and a tag is "
! 			   "invalid in C++"), b->decl)
  	      && b->locus != UNKNOWN_LOCATION)
  	    inform (b->locus, "originally defined here");
  	}
--- 1726,1733 ----
  	{
  	  auto_diagnostic_group d;
  	  if (warning_at (loc, OPT_Wc___compat,
! 			  "using %qD as both a typedef and a tag is "
! 			  "invalid in C++", b->decl)
  	      && b->locus != UNKNOWN_LOCATION)
  	    inform (b->locus, "originally defined here");
  	}
*************** diagnose_mismatched_decls (tree newdecl,
*** 2630,2638 ****
  	  && !DECL_EXTERNAL (olddecl))
  	warned |= warning_at (DECL_SOURCE_LOCATION (newdecl),
  			      OPT_Wc___compat,
! 			      ("duplicate declaration of %qD is "
! 			       "invalid in C++"),
! 			      newdecl);
      }
  
    /* warnings */
--- 2630,2637 ----
  	  && !DECL_EXTERNAL (olddecl))
  	warned |= warning_at (DECL_SOURCE_LOCATION (newdecl),
  			      OPT_Wc___compat,
! 			      "duplicate declaration of %qD is "
! 			      "invalid in C++", newdecl);
      }
  
    /* warnings */
*************** c_check_switch_jump_warnings (struct c_s
*** 4368,4375 ****
  		{
  		  saw_error = true;
  		  error_at (case_loc,
! 			    ("switch jumps into scope of identifier with "
! 			     "variably modified type"));
  		  emitted = true;
  		}
  	      else if (flag_openmp
--- 4367,4374 ----
  		{
  		  saw_error = true;
  		  error_at (case_loc,
! 			    "switch jumps into scope of identifier with "
! 			    "variably modified type");
  		  emitted = true;
  		}
  	      else if (flag_openmp
*************** grokdeclarator (const struct c_declarato
*** 7768,7775 ****
  	    {
  	      auto_diagnostic_group d;
  	      if (warning_at (declarator->id_loc, OPT_Wc___compat,
! 			      ("using %qD as both a typedef and a tag is "
! 			       "invalid in C++"), decl)
  		  && b->locus != UNKNOWN_LOCATION)
  		inform (b->locus, "originally defined here");
  	    }
--- 7767,7774 ----
  	    {
  	      auto_diagnostic_group d;
  	      if (warning_at (declarator->id_loc, OPT_Wc___compat,
! 			      "using %qD as both a typedef and a tag is "
! 			      "invalid in C++", decl)
  		  && b->locus != UNKNOWN_LOCATION)
  		inform (b->locus, "originally defined here");
  	    }
*************** grokdeclarator (const struct c_declarato
*** 8267,8275 ****
  	    || TREE_CODE (TREE_TYPE (decl)) == ENUMERAL_TYPE)
  	&& TYPE_NAME (TREE_TYPE (decl)) == NULL_TREE)
        warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wc___compat,
! 		  ("non-local variable %qD with anonymous type is "
! 		   "questionable in C++"),
! 		  decl);
  
      return decl;
    }
--- 8266,8273 ----
  	    || TREE_CODE (TREE_TYPE (decl)) == ENUMERAL_TYPE)
  	&& TYPE_NAME (TREE_TYPE (decl)) == NULL_TREE)
        warning_at (DECL_SOURCE_LOCATION (decl), OPT_Wc___compat,
! 		  "non-local variable %qD with anonymous type is "
! 		  "questionable in C++", decl);
  
      return decl;
    }
*************** warn_cxx_compat_finish_struct (tree fiel
*** 9130,9138 ****
  	      && tset.contains (DECL_NAME (x)))
  	    {
  	      warning_at (DECL_SOURCE_LOCATION (x), OPT_Wc___compat,
! 			  ("using %qD as both field and typedef name is "
! 			   "invalid in C++"),
! 			  x);
  	      /* FIXME: It would be nice to report the location where
  		 the typedef name is used.  */
  	    }
--- 9128,9135 ----
  	      && tset.contains (DECL_NAME (x)))
  	    {
  	      warning_at (DECL_SOURCE_LOCATION (x), OPT_Wc___compat,
! 			  "using %qD as both field and typedef name is "
! 			  "invalid in C++", x);
  	      /* FIXME: It would be nice to report the location where
  		 the typedef name is used.  */
  	    }
*************** build_enumerator (location_t decl_loc, l
*** 10331,10339 ****
  	   overflows.)  */
  	warned_range = pedwarn (loc, OPT_Wpedantic,
  				"enumerator value outside the range of %qs",
! 				(TYPE_UNSIGNED (TREE_TYPE (value))
! 				 ? "uintmax_t"
! 				 : "intmax_t"));
        if (!warned_range && !int_fits_type_p (value, integer_type_node))
  	pedwarn_c11 (loc, OPT_Wpedantic,
  		     "ISO C restricts enumerator values to range of %<int%> "
--- 10328,10336 ----
  	   overflows.)  */
  	warned_range = pedwarn (loc, OPT_Wpedantic,
  				"enumerator value outside the range of %qs",
! 				TYPE_UNSIGNED (TREE_TYPE (value))
! 				? "uintmax_t"
! 				: "intmax_t");
        if (!warned_range && !int_fits_type_p (value, integer_type_node))
  	pedwarn_c11 (loc, OPT_Wpedantic,
  		     "ISO C restricts enumerator values to range of %<int%> "
*************** declspecs_add_type (location_t loc, stru
*** 11955,11962 ****
  		  if (specs->typespec_word == cts_double)
  		    {
  		      error_at (loc,
! 				("both %<long long%> and %<double%> in "
! 				 "declaration specifiers"));
  		      break;
  		    }
  		  pedwarn_c90 (loc, OPT_Wlong_long,
--- 11952,11959 ----
  		  if (specs->typespec_word == cts_double)
  		    {
  		      error_at (loc,
! 				"both %qs and %qs in declaration specifiers",
! 				"long long", "double");
  		      break;
  		    }
  		  pedwarn_c90 (loc, OPT_Wlong_long,
*************** declspecs_add_type (location_t loc, stru
*** 11967,12027 ****
  		}
  	      if (specs->short_p)
  		error_at (loc,
! 			  ("both %<long%> and %<short%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  ("both %<long%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  ("both %<long%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_int_n)
  		error_at (loc,
! 			  ("both %<long%> and %<__int%d%> in "
! 			   "declaration specifiers"),
! 			  int_n_data[specs->u.int_n_idx].bitsize);
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  ("both %<long%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_bitint)
  		error_at (loc,
! 			  ("both %<long%> and %<_BitInt%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_char)
  		error_at (loc,
! 			  ("both %<long%> and %<char%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  ("both %<long%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  ("both %<long%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
  	      else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  ("both %<long%> and %<_Decimal32%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  ("both %<long%> and %<_Decimal64%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  ("both %<long%> and %<_Decimal128%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  ("both %<long%> and %<_Decimal64x%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->long_p = true;
--- 11964,12023 ----
  		}
  	      if (specs->short_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "short");
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "__auto_type");
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "void");
  	      else if (specs->typespec_word == cts_int_n)
  		error_at (loc,
! 			  "both %qs and %<__int%d%> in declaration specifiers",
! 			  "long", int_n_data[specs->u.int_n_idx].bitsize);
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "_Bool");
  	      else if (specs->typespec_word == cts_bitint)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "_BitInt");
  	      else if (specs->typespec_word == cts_char)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "char");
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "float");
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "long",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
  	      else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "_Decimal32");
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "_Decimal64");
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "_Decimal128");
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "_Decimal64x");
  	      else
  		{
  		  specs->long_p = true;
*************** declspecs_add_type (location_t loc, stru
*** 12032,12096 ****
  	      dupe = specs->short_p;
  	      if (specs->long_p)
  		error_at (loc,
! 			  ("both %<long%> and %<short%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  ("both %<short%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  ("both %<short%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_int_n)
  		error_at (loc,
! 			  ("both %<short%> and %<__int%d%> in "
! 			   "declaration specifiers"),
! 			  int_n_data[specs->u.int_n_idx].bitsize);
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  ("both %<short%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_bitint)
  		error_at (loc,
! 			  ("both %<short%> and %<_BitInt%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_char)
  		error_at (loc,
! 			  ("both %<short%> and %<char%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  ("both %<short%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_double)
  		error_at (loc,
! 			  ("both %<short%> and %<double%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  ("both %<short%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
  	      else if (specs->typespec_word == cts_dfloat32)
                  error_at (loc,
! 			  ("both %<short%> and %<_Decimal32%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  ("both %<short%> and %<_Decimal64%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  ("both %<short%> and %<_Decimal128%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  ("both %<short%> and %<_Decimal64x%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->short_p = true;
--- 12028,12091 ----
  	      dupe = specs->short_p;
  	      if (specs->long_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "short");
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "__auto_type");
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "void");
  	      else if (specs->typespec_word == cts_int_n)
  		error_at (loc,
! 			  "both %qs and %<__int%d%> in declaration specifiers",
! 			  "short", int_n_data[specs->u.int_n_idx].bitsize);
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "_Bool");
  	      else if (specs->typespec_word == cts_bitint)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "_BitInt");
  	      else if (specs->typespec_word == cts_char)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "char");
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "float");
  	      else if (specs->typespec_word == cts_double)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "double");
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "short",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
  	      else if (specs->typespec_word == cts_dfloat32)
                  error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "_Decimal32");
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "_Decimal64");
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "_Decimal128");
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "_Decimal64x");
  	      else
  		{
  		  specs->short_p = true;
*************** declspecs_add_type (location_t loc, stru
*** 12101,12152 ****
  	      dupe = specs->signed_p;
  	      if (specs->unsigned_p)
  		error_at (loc,
! 			  ("both %<signed%> and %<unsigned%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  ("both %<signed%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  ("both %<signed%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  ("both %<signed%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  ("both %<signed%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_double)
  		error_at (loc,
! 			  ("both %<signed%> and %<double%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  ("both %<signed%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
  	      else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  ("both %<signed%> and %<_Decimal32%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  ("both %<signed%> and %<_Decimal64%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  ("both %<signed%> and %<_Decimal128%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  ("both %<signed%> and %<_Decimal64x%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->signed_p = true;
--- 12096,12147 ----
  	      dupe = specs->signed_p;
  	      if (specs->unsigned_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "unsigned");
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "__auto_type");
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "void");
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "_Bool");
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "float");
  	      else if (specs->typespec_word == cts_double)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "double");
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "signed",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
  	      else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "_Decimal32");
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "_Decimal64");
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "_Decimal128");
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "_Decimal64x");
  	      else
  		{
  		  specs->signed_p = true;
*************** declspecs_add_type (location_t loc, stru
*** 12157,12208 ****
  	      dupe = specs->unsigned_p;
  	      if (specs->signed_p)
  		error_at (loc,
! 			  ("both %<signed%> and %<unsigned%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_double)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<double%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
                else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<_Decimal32%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<_Decimal64%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<_Decimal128%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<_Decimal64x%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->unsigned_p = true;
--- 12152,12203 ----
  	      dupe = specs->unsigned_p;
  	      if (specs->signed_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "unsigned");
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "__auto_type");
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "void");
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "_Bool");
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "float");
  	      else if (specs->typespec_word == cts_double)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "double");
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "unsigned",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
                else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "_Decimal32");
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "_Decimal64");
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "_Decimal128");
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "_Decimal64x");
  	      else
  		{
  		  specs->unsigned_p = true;
*************** declspecs_add_type (location_t loc, stru
*** 12216,12263 ****
  			     "ISO C90 does not support complex types");
  	      if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  ("both %<complex%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  ("both %<complex%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  ("both %<complex%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_bitint)
  		error_at (loc,
! 			  ("both %<complex%> and %<_BitInt%> in "
! 			   "declaration specifiers"));
                else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  ("both %<complex%> and %<_Decimal32%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  ("both %<complex%> and %<_Decimal64%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  ("both %<complex%> and %<_Decimal128%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  ("both %<complex%> and %<_Decimal64x%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_fract)
  		error_at (loc,
! 			  ("both %<complex%> and %<_Fract%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_accum)
  		error_at (loc,
! 			  ("both %<complex%> and %<_Accum%> in "
! 			   "declaration specifiers"));
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<complex%> and %<_Sat%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->complex_p = true;
--- 12211,12258 ----
  			     "ISO C90 does not support complex types");
  	      if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "__auto_type");
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "void");
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_Bool");
  	      else if (specs->typespec_word == cts_bitint)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_BitInt");
                else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_Decimal32");
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_Decimal64");
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_Decimal128");
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_Decimal64x");
  	      else if (specs->typespec_word == cts_fract)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_Fract");
  	      else if (specs->typespec_word == cts_accum)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_Accum");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_Sat");
  	      else
  		{
  		  specs->complex_p = true;
*************** declspecs_add_type (location_t loc, stru
*** 12269,12340 ****
  	      pedwarn (loc, OPT_Wpedantic,
  		       "ISO C does not support saturating types");
  	      if (specs->typespec_word == cts_int_n)
! 	        {
! 		  error_at (loc,
! 			    ("both %<_Sat%> and %<__int%d%> in "
! 			     "declaration specifiers"),
! 			    int_n_data[specs->u.int_n_idx].bitsize);
! 	        }
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_bitint)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_BitInt%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_char)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<char%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_int)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<int%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_double)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<double%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
                else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_Decimal32%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_Decimal64%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_Decimal128%> in "
! 			   "declaration specifiers"));
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_Decimal64x%> in "
! 			   "declaration specifiers"));
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<complex%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->saturating_p = true;
--- 12264,12332 ----
  	      pedwarn (loc, OPT_Wpedantic,
  		       "ISO C does not support saturating types");
  	      if (specs->typespec_word == cts_int_n)
! 		error_at (loc,
! 			  "both %qs and %<__int%d%> in declaration specifiers",
! 			  "_Sat", int_n_data[specs->u.int_n_idx].bitsize);
  	      else if (specs->typespec_word == cts_auto_type)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "__auto_type");
  	      else if (specs->typespec_word == cts_void)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "void");
  	      else if (specs->typespec_word == cts_bool)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "_Bool");
  	      else if (specs->typespec_word == cts_bitint)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "_BitInt");
  	      else if (specs->typespec_word == cts_char)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "char");
  	      else if (specs->typespec_word == cts_int)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "int");
  	      else if (specs->typespec_word == cts_float)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "float");
  	      else if (specs->typespec_word == cts_double)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "double");
  	      else if (specs->typespec_word == cts_floatn_nx)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "_Sat",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
                else if (specs->typespec_word == cts_dfloat32)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "_Decimal32");
  	      else if (specs->typespec_word == cts_dfloat64)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "_Decimal64");
  	      else if (specs->typespec_word == cts_dfloat128)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "_Decimal128");
  	      else if (specs->typespec_word == cts_dfloat64x)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "_Decimal64x");
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "complex");
  	      else
  		{
  		  specs->saturating_p = true;
*************** declspecs_add_type (location_t loc, stru
*** 12381,12408 ****
  	    case RID_AUTO_TYPE:
  	      if (specs->long_p)
  		error_at (loc,
! 			  ("both %<long%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->short_p)
  		error_at (loc,
! 			  ("both %<short%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  ("both %<signed%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  ("both %<complex%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<__auto_type%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->typespec_word = cts_auto_type;
--- 12373,12400 ----
  	    case RID_AUTO_TYPE:
  	      if (specs->long_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "__auto_type");
  	      else if (specs->short_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "__auto_type");
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "__auto_type");
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "__auto_type");
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "__auto_type");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "__auto_type");
  	      else
  		{
  		  specs->typespec_word = cts_auto_type;
*************** declspecs_add_type (location_t loc, stru
*** 12425,12443 ****
  
  	      if (specs->long_p)
  		error_at (loc,
! 			  ("both %<__int%d%> and %<long%> in "
! 			   "declaration specifiers"),
! 			  int_n_data[specs->u.int_n_idx].bitsize);
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<__int%d%> in "
! 			   "declaration specifiers"),
! 			  int_n_data[specs->u.int_n_idx].bitsize);
  	      else if (specs->short_p)
  		error_at (loc,
! 			  ("both %<__int%d%> and %<short%> in "
! 			   "declaration specifiers"),
! 			  int_n_data[specs->u.int_n_idx].bitsize);
  	      else if (! int_n_enabled_p[specs->u.int_n_idx])
  		{
  		  specs->typespec_word = cts_int_n;
--- 12417,12432 ----
  
  	      if (specs->long_p)
  		error_at (loc,
! 			  "both %<__int%d%> and %qs in declaration specifiers",
! 			  int_n_data[specs->u.int_n_idx].bitsize, "long");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %<__int%d%> in declaration specifiers",
! 			  "_Sat", int_n_data[specs->u.int_n_idx].bitsize);
  	      else if (specs->short_p)
  		error_at (loc,
! 			  "both %<__int%d%> and %qs in declaration specifiers",
! 			  int_n_data[specs->u.int_n_idx].bitsize, "short");
  	      else if (! int_n_enabled_p[specs->u.int_n_idx])
  		{
  		  specs->typespec_word = cts_int_n;
*************** declspecs_add_type (location_t loc, stru
*** 12454,12481 ****
  	    case RID_VOID:
  	      if (specs->long_p)
  		error_at (loc,
! 			  ("both %<long%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->short_p)
  		error_at (loc,
! 			  ("both %<short%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  ("both %<signed%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  ("both %<complex%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<void%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->typespec_word = cts_void;
--- 12443,12470 ----
  	    case RID_VOID:
  	      if (specs->long_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "void");
  	      else if (specs->short_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "void");
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "void");
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "void");
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "void");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "void");
  	      else
  		{
  		  specs->typespec_word = cts_void;
*************** declspecs_add_type (location_t loc, stru
*** 12488,12515 ****
  			     "ISO C90 does not support boolean types");
  	      if (specs->long_p)
  		error_at (loc,
! 			  ("both %<long%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->short_p)
  		error_at (loc,
! 			  ("both %<short%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  ("both %<signed%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  ("both %<complex%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_Bool%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->typespec_word = cts_bool;
--- 12477,12504 ----
  			     "ISO C90 does not support boolean types");
  	      if (specs->long_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "_Bool");
  	      else if (specs->short_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "_Bool");
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "_Bool");
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "_Bool");
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_Bool");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "_Bool");
  	      else
  		{
  		  specs->typespec_word = cts_bool;
*************** declspecs_add_type (location_t loc, stru
*** 12519,12534 ****
  	    case RID_CHAR:
  	      if (specs->long_p)
  		error_at (loc,
! 			  ("both %<long%> and %<char%> in "
! 			   "declaration specifiers"));
  	      else if (specs->short_p)
  		error_at (loc,
! 			  ("both %<short%> and %<char%> in "
! 			   "declaration specifiers"));
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<char%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->typespec_word = cts_char;
--- 12508,12523 ----
  	    case RID_CHAR:
  	      if (specs->long_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "char");
  	      else if (specs->short_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "char");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "char");
  	      else
  		{
  		  specs->typespec_word = cts_char;
*************** declspecs_add_type (location_t loc, stru
*** 12538,12545 ****
  	    case RID_INT:
  	      if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<int%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->typespec_word = cts_int;
--- 12527,12534 ----
  	    case RID_INT:
  	      if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "int");
  	      else
  		{
  		  specs->typespec_word = cts_int;
*************** declspecs_add_type (location_t loc, stru
*** 12549,12572 ****
  	    case RID_FLOAT:
  	      if (specs->long_p)
  		error_at (loc,
! 			  ("both %<long%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else if (specs->short_p)
  		error_at (loc,
! 			  ("both %<short%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  ("both %<signed%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<float%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->typespec_word = cts_float;
--- 12538,12561 ----
  	    case RID_FLOAT:
  	      if (specs->long_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "float");
  	      else if (specs->short_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "float");
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "float");
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "float");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "float");
  	      else
  		{
  		  specs->typespec_word = cts_float;
*************** declspecs_add_type (location_t loc, stru
*** 12576,12599 ****
  	    case RID_DOUBLE:
  	      if (specs->long_long_p)
  		error_at (loc,
! 			  ("both %<long long%> and %<double%> in "
! 			   "declaration specifiers"));
  	      else if (specs->short_p)
  		error_at (loc,
! 			  ("both %<short%> and %<double%> in "
! 			   "declaration specifiers"));
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  ("both %<signed%> and %<double%> in "
! 			   "declaration specifiers"));
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<double%> in "
! 			   "declaration specifiers"));
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<double%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->typespec_word = cts_double;
--- 12565,12588 ----
  	    case RID_DOUBLE:
  	      if (specs->long_long_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long long", "double");
  	      else if (specs->short_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "double");
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "signed", "double");
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "unsigned", "double");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "double");
  	      else
  		{
  		  specs->typespec_word = cts_double;
*************** declspecs_add_type (location_t loc, stru
*** 12607,12665 ****
  			     "ISO C does not support the %<_Float%d%s%> type"
  			     " before C23",
  			     floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			     (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			      ? "x"
! 			      : ""));
  
  	      if (specs->long_p)
  		error_at (loc,
! 			  ("both %<long%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
  	      else if (specs->short_p)
  		error_at (loc,
! 			  ("both %<short%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  ("both %<signed%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  ("both %<unsigned%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_Float%d%s%> in "
! 			   "declaration specifiers"),
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			   ? "x"
! 			   : ""));
  	      else if (FLOATN_NX_TYPE_NODE (specs->u.floatn_nx_idx) == NULL_TREE)
  		{
  		  specs->typespec_word = cts_floatn_nx;
  		  error_at (loc,
  			    "%<_Float%d%s%> is not supported on this target",
  			    floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			    (floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			     ? "x"
! 			     : ""));
  		}
  	      else
  		{
--- 12596,12654 ----
  			     "ISO C does not support the %<_Float%d%s%> type"
  			     " before C23",
  			     floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			     floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			     ? "x"
! 			     : "");
  
  	      if (specs->long_p)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "long",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
  	      else if (specs->short_p)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "short",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
  	      else if (specs->signed_p)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "signed",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
  	      else if (specs->unsigned_p)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "unsigned",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %<_Float%d%s%> in declaration "
! 			  "specifiers", "_Sat",
  			  floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			  floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			  ? "x"
! 			  : "");
  	      else if (FLOATN_NX_TYPE_NODE (specs->u.floatn_nx_idx) == NULL_TREE)
  		{
  		  specs->typespec_word = cts_floatn_nx;
  		  error_at (loc,
  			    "%<_Float%d%s%> is not supported on this target",
  			    floatn_nx_types[specs->u.floatn_nx_idx].n,
! 			    floatn_nx_types[specs->u.floatn_nx_idx].extended
! 			    ? "x"
! 			    : "");
  		}
  	      else
  		{
*************** declspecs_add_type (location_t loc, stru
*** 12683,12721 ****
  		  str = "_Decimal64x";
  		if (specs->long_long_p)
  		  error_at (loc,
! 			    ("both %<long long%> and %qs in "
! 			     "declaration specifiers"),
! 			    str);
  		if (specs->long_p)
  		  error_at (loc,
! 			    ("both %<long%> and %qs in "
! 			     "declaration specifiers"),
! 			    str);
  		else if (specs->short_p)
  		  error_at (loc,
! 			    ("both %<short%> and %qs in "
! 			     "declaration specifiers"),
! 			    str);
  		else if (specs->signed_p)
  		  error_at (loc,
! 			    ("both %<signed%> and %qs in "
! 			     "declaration specifiers"),
! 			    str);
  		else if (specs->unsigned_p)
  		  error_at (loc,
! 			    ("both %<unsigned%> and %qs in "
! 			     "declaration specifiers"),
! 			    str);
                  else if (specs->complex_p)
                    error_at (loc,
! 			    ("both %<complex%> and %qs in "
! 			     "declaration specifiers"),
! 			    str);
                  else if (specs->saturating_p)
                    error_at (loc,
! 			    ("both %<_Sat%> and %qs in "
! 			     "declaration specifiers"),
! 			    str);
  		else if (i == RID_DFLOAT32)
  		  specs->typespec_word = cts_dfloat32;
  		else if (i == RID_DFLOAT64)
--- 12672,12703 ----
  		  str = "_Decimal64x";
  		if (specs->long_long_p)
  		  error_at (loc,
! 			    "both %qs and %qs in declaration specifiers",
! 			    "long long", str);
  		if (specs->long_p)
  		  error_at (loc,
! 			    "both %qs and %qs in declaration specifiers",
! 			    "long", str);
  		else if (specs->short_p)
  		  error_at (loc,
! 			    "both %qs and %qs in declaration specifiers",
! 			    "short", str);
  		else if (specs->signed_p)
  		  error_at (loc,
! 			    "both %qs and %qs in declaration specifiers",
! 			    "signed", str);
  		else if (specs->unsigned_p)
  		  error_at (loc,
! 			    "both %qs and %qs in declaration specifiers",
! 			    "unsigned", str);
                  else if (specs->complex_p)
                    error_at (loc,
! 			    "both %qs and %qs in declaration specifiers",
! 			    "complex", str);
                  else if (specs->saturating_p)
                    error_at (loc,
! 			    "both %qs and %qs in declaration specifiers",
! 			    "_Sat", str);
  		else if (i == RID_DFLOAT32)
  		  specs->typespec_word = cts_dfloat32;
  		else if (i == RID_DFLOAT64)
*************** declspecs_add_type (location_t loc, stru
*** 12728,12735 ****
  	      }
  	      if (!targetm.decimal_float_supported_p ())
  		error_at (loc,
! 			  ("decimal floating-point not supported "
! 			   "for this target"));
  	      pedwarn_c11 (loc, OPT_Wpedantic,
  			   "ISO C does not support decimal floating-point "
  			   "before C23");
--- 12710,12717 ----
  	      }
  	      if (!targetm.decimal_float_supported_p ())
  		error_at (loc,
! 			  "decimal floating-point not supported "
! 			  "for this target");
  	      pedwarn_c11 (loc, OPT_Wpedantic,
  			   "ISO C does not support decimal floating-point "
  			   "before C23");
*************** declspecs_add_type (location_t loc, stru
*** 12744,12752 ****
  		  str = "_Accum";
                  if (specs->complex_p)
                    error_at (loc,
! 			    ("both %<complex%> and %qs in "
! 			     "declaration specifiers"),
! 			    str);
  		else if (i == RID_FRACT)
  		    specs->typespec_word = cts_fract;
  		else
--- 12726,12733 ----
  		  str = "_Accum";
                  if (specs->complex_p)
                    error_at (loc,
! 			    "both %qs and %qs in declaration specifiers",
! 			    "complex", str);
  		else if (i == RID_FRACT)
  		    specs->typespec_word = cts_fract;
  		else
*************** declspecs_add_type (location_t loc, stru
*** 12762,12781 ****
  	    case RID_BITINT:
  	      if (specs->long_p)
  		error_at (loc,
! 			  ("both %<long%> and %<_BitInt%> in "
! 			   "declaration specifiers"));
  	      else if (specs->short_p)
  		error_at (loc,
! 			  ("both %<short%> and %<_BitInt%> in "
! 			   "declaration specifiers"));
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  ("both %<complex%> and %<_BitInt%> in "
! 			   "declaration specifiers"));
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  ("both %<_Sat%> and %<_BitInt%> in "
! 			   "declaration specifiers"));
  	      else
  		{
  		  specs->typespec_word = cts_bitint;
--- 12743,12762 ----
  	    case RID_BITINT:
  	      if (specs->long_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "long", "_BitInt");
  	      else if (specs->short_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "short", "_BitInt");
  	      else if (specs->complex_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "complex", "_BitInt");
  	      else if (specs->saturating_p)
  		error_at (loc,
! 			  "both %qs and %qs in declaration specifiers",
! 			  "_Sat", "_BitInt");
  	      else
  		{
  		  specs->typespec_word = cts_bitint;
diff -Nrcpad gcc-16-20250831/gcc/c/c-parser.cc gcc-16-20250907/gcc/c/c-parser.cc
*** gcc-16-20250831/gcc/c/c-parser.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/c/c-parser.cc	Sun Sep  7 22:32:58 2025
*************** c_parser_transaction (c_parser *parser,
*** 30173,30182 ****
    if (flag_tm)
      stmt = c_finish_transaction (loc, stmt, this_in);
    else
!     error_at (loc, (keyword == RID_TRANSACTION_ATOMIC ?
! 	"%<__transaction_atomic%> without transactional memory support enabled"
! 	: "%<__transaction_relaxed %> "
! 	"without transactional memory support enabled"));
  
    return stmt;
  }
--- 30173,30184 ----
    if (flag_tm)
      stmt = c_finish_transaction (loc, stmt, this_in);
    else
!     error_at (loc, 
! 	      keyword == RID_TRANSACTION_ATOMIC
! 	      ? G_("%<__transaction_atomic%> without transactional memory "
! 		   "support enabled")
! 	      : G_("%<__transaction_relaxed%> without transactional memory "
! 		   "support enabled"));
  
    return stmt;
  }
*************** c_parser_transaction_expression (c_parse
*** 30240,30249 ****
    parser->in_transaction = old_in;
  
    if (!flag_tm)
!     error_at (loc, (keyword == RID_TRANSACTION_ATOMIC ?
! 	"%<__transaction_atomic%> without transactional memory support enabled"
! 	: "%<__transaction_relaxed %> "
! 	"without transactional memory support enabled"));
  
    set_c_expr_source_range (&ret, loc, loc);
  
--- 30242,30253 ----
    parser->in_transaction = old_in;
  
    if (!flag_tm)
!     error_at (loc,
! 	      keyword == RID_TRANSACTION_ATOMIC
! 	      ? G_("%<__transaction_atomic%> without transactional memory "
! 		   "support enabled")
! 	      : G_("%<__transaction_relaxed%> without transactional memory "
! 		   "support enabled"));
  
    set_c_expr_source_range (&ret, loc, loc);
  
diff -Nrcpad gcc-16-20250831/gcc/c/c-typeck.cc gcc-16-20250907/gcc/c/c-typeck.cc
*** gcc-16-20250831/gcc/c/c-typeck.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/c/c-typeck.cc	Sun Sep  7 22:32:58 2025
*************** build_external_ref (location_t loc, tree
*** 3717,3724 ****
  	  && C_TYPE_DEFINED_IN_STRUCT (TREE_TYPE (ref)))
  	{
  	  warning_at (loc, OPT_Wc___compat,
! 		      ("enum constant defined in struct or union "
! 		       "is not visible in C++"));
  	  inform (DECL_SOURCE_LOCATION (ref), "enum constant defined here");
  	}
  
--- 3717,3724 ----
  	  && C_TYPE_DEFINED_IN_STRUCT (TREE_TYPE (ref)))
  	{
  	  warning_at (loc, OPT_Wc___compat,
! 		      "enum constant defined in struct or union "
! 		      "is not visible in C++");
  	  inform (DECL_SOURCE_LOCATION (ref), "enum constant defined here");
  	}
  
*************** build_conditional_expr (location_t colon
*** 6421,6429 ****
  	  && TREE_CODE (t2) == ENUMERAL_TYPE
  	  && TYPE_MAIN_VARIANT (t1) != TYPE_MAIN_VARIANT (t2))
  	warning_at (colon_loc, OPT_Wc___compat,
! 		    ("different enum types in conditional is "
! 		     "invalid in C++: %qT vs %qT"),
! 		    t1, t2);
      }
  
    if (warn_zero_as_null_pointer_constant
--- 6421,6428 ----
  	  && TREE_CODE (t2) == ENUMERAL_TYPE
  	  && TYPE_MAIN_VARIANT (t1) != TYPE_MAIN_VARIANT (t2))
  	warning_at (colon_loc, OPT_Wc___compat,
! 		    "different enum types in conditional is "
! 		    "invalid in C++: %qT vs %qT", t1, t2);
      }
  
    if (warn_zero_as_null_pointer_constant
diff -Nrcpad gcc-16-20250831/gcc/cobol/ChangeLog gcc-16-20250907/gcc/cobol/ChangeLog
*** gcc-16-20250831/gcc/cobol/ChangeLog	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/cobol/ChangeLog	Sun Sep  7 22:32:58 2025
***************
*** 1,3 ****
--- 1,15 ----
+ 2025-09-05  Robert Dubner  <rdubner@symas.com>
+ 
+ 	* genapi.cc (trace1_init): Prepend two internal variables with
+ 	underscore.
+ 	(initialize_variable_internal): Use new register_e attribute.
+ 	(psa_global): Use "__ggsr__" prefix to identify special registers
+ 	(parser_symbol_add): Use new register_e attribute.
+ 	* symbols.cc (cbl_field_attr_str): Likewise.
+ 	(symbol_table_init): Likewise.
+ 	(is_register_field): Eliminated in favor of (attr & register_e).
+ 	* symbols.h (is_register_field): Likewise.
+ 
  2025-08-20  Robert Dubner  <rdubner@symas.com>
  
  	* genutil.cc (get_binary_value): Fix a comment.
diff -Nrcpad gcc-16-20250831/gcc/cobol/genapi.cc gcc-16-20250907/gcc/cobol/genapi.cc
*** gcc-16-20250831/gcc/cobol/genapi.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/cobol/genapi.cc	Sun Sep  7 22:32:58 2025
*************** trace1_init()
*** 203,210 ****
    if( first_time )
      {
      first_time = false;
!     trace_handle = gg_define_variable(INT, "trace_handle", vs_static);
!     trace_indent = gg_define_variable(INT, "trace_indent", vs_static);
  
      bTRACE1 = getenv("GCOBOL_TRACE") ? getenv("GCOBOL_TRACE") :gv_trace_switch;
  
--- 203,210 ----
    if( first_time )
      {
      first_time = false;
!     trace_handle = gg_define_variable(INT, "_trace_handle", vs_static);
!     trace_indent = gg_define_variable(INT, "_trace_indent", vs_static);
  
      bTRACE1 = getenv("GCOBOL_TRACE") ? getenv("GCOBOL_TRACE") :gv_trace_switch;
  
*************** initialize_variable_internal( cbl_refer_
*** 1227,1233 ****
      return;
      }
  
!   if( is_register_field( parsed_var) )
      {
      return;
      }
--- 1227,1233 ----
      return;
      }
  
!   if( parsed_var->attr & register_e )
      {
      return;
      }
*************** actually_create_the_static_field( cbl_fi
*** 16374,16383 ****
  static void
  psa_global(cbl_field_t *new_var)
    {
-   char *mname = cobol_name_mangler(new_var->name);
-   char ach[2*sizeof(cbl_name_t)];
-   sprintf(ach, "__gg__%s", mname);
-   free(mname);
  
    if( strcmp(new_var->name, "_VERY_TRUE") == 0 )
      {
--- 16374,16379 ----
*************** psa_global(cbl_field_t *new_var)
*** 16390,16399 ****
      return;
      }
  
!   // global variables already have a cblc_field_t defined in constants.cc
  
!   strcpy(ach, "__gg__");
!   strcat(ach, new_var->name);
    for(size_t i=0; i<strlen(ach); i++)
      {
      ach[i] = _tolower(ach[i]);
--- 16386,16405 ----
      return;
      }
  
!   // global variables already have a cblc_field_t defined in constants.cc.
  
!   // Finding their name is done by converting to lowercase, dashes become
!   // underscores, and "__ggsr__" is prepended.  "filler" gets ignored.
! 
!   // To feed GDB-COBOL's requirements, we tack on this variable's index and
!   // this program's index number:
! 
!   char ach[2*sizeof(cbl_name_t)];
! 
!   snprintf( ach,
!             sizeof(ach),
!             "__ggsr__%s",
!             new_var->name);
    for(size_t i=0; i<strlen(ach); i++)
      {
      ach[i] = _tolower(ach[i]);
*************** psa_global(cbl_field_t *new_var)
*** 16403,16418 ****
        }
      }
  
-   if( strcmp(new_var->name, "RETURN-CODE") == 0 )
-     {
-     strcpy(ach, "__gg__return_code");
-     }
- 
-   if( strcmp(new_var->name, "UPSI-0") == 0 )
-     {
-     strcpy(ach, "__gg__upsi");
-     }
- 
    new_var->var_decl_node = gg_declare_variable(cblc_field_type_node, ach, NULL, vs_external_reference);
  
    // global variables already have a .data area defined.  We can find that
--- 16409,16414 ----
*************** parser_symbol_add(struct cbl_field_t *ne
*** 16857,16863 ****
      {
      cbl_field_type_t incoming_type = new_var->type;
  
!     if( is_register_field(new_var) )
        {
        psa_global(new_var);
        goto done;
--- 16853,16859 ----
      {
      cbl_field_type_t incoming_type = new_var->type;
  
!     if( new_var->attr & register_e )
        {
        psa_global(new_var);
        goto done;
diff -Nrcpad gcc-16-20250831/gcc/cobol/symbols.cc gcc-16-20250907/gcc/cobol/symbols.cc
*** gcc-16-20250831/gcc/cobol/symbols.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/cobol/symbols.cc	Sun Sep  7 22:32:58 2025
*************** cbl_field_attr_str( cbl_field_attr_t att
*** 741,747 ****
    case function_e: return "function";
    case quoted_e: return "quoted";
    case filler_e: return "filler";
!   case _spare_e: return "temporary";
    case intermediate_e: return "intermediate";
    case embiggened_e: return "embiggened";
    case all_alpha_e: return "all_alpha";
--- 741,747 ----
    case function_e: return "function";
    case quoted_e: return "quoted";
    case filler_e: return "filler";
!   case register_e: return "register";
    case intermediate_e: return "intermediate";
    case embiggened_e: return "embiggened";
    case all_alpha_e: return "all_alpha";
*************** symbol_table_init(void) {
*** 2153,2186 ****
  
    // These should match the definitions in libgcobol/constants.cc
    static cbl_field_t constants[] = {
!     { 0, FldAlphanumeric, FldInvalid, space_value_e | constq, 0, 0, 0, nonarray, 0,
        "SPACE", 0, {}, {1,1,0,0, " \0\xFF"}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, space_value_e | constq , 0, 0, 0, nonarray, 0,
        "SPACES", 0, {}, {1,1,0,0, " \0\xFF"}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, low_value_e | constq, 0, 0, 0, nonarray, 0,
        "LOW_VALUES", 0, {}, {1,1,0,0, "L\0\xFF"}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, zero_value_e | constq, 0, 0, 0, nonarray, 0,
        "ZEROS", 0, {}, {1,1,0,0, "0"}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, high_value_e | constq, 0, 0, 0, nonarray, 0,
        "HIGH_VALUES", 0, {}, {1,1,0,0, "H\0\xFF"}, NULL },
      // IBM standard: QUOTE is a double-quote unless APOST compiler option
!     { 0, FldAlphanumeric, FldInvalid, quote_value_e | constq , 0, 0, 0, nonarray, 0,
        "QUOTES", 0, {}, {1,1,0,0, "\"\0\xFF"}, NULL },
!     { 0, FldPointer, FldPointer, constq , 0, 0, 0, nonarray, 0,
        "NULLS", 0, {}, {8,8,0,0, zeroes_for_null_pointer}, NULL },
      // IBM defines TALLY
      // 01  TALLY GLOBAL PICTURE 9(5) USAGE BINARY VALUE ZERO.
!     { 0, FldNumericBin5, FldInvalid, signable_e, 0, 0, 0, nonarray, 0,
        "_TALLY", 0, {}, {16, 16, MAX_FIXED_POINT_DIGITS, 0, NULL}, NULL },
      // 01  ARGI is the current index into the argv array
!     { 0, FldNumericBin5, FldInvalid, signable_e, 0, 0, 0, nonarray, 0,
        "_ARGI", 0, {}, {16, 16, MAX_FIXED_POINT_DIGITS, 0, NULL}, NULL },
  
      // These last two don't require actual storage; they get BOOL var_decl_node
      // in parser_symbol_add()
!     { 0, FldConditional, FldInvalid, constant_e , 0, 0, 0, nonarray, 0,
        "_VERY_TRUE", 0, {}, {1,1,0,0, ""}, NULL },
!     { 0, FldConditional, FldInvalid, constant_e , 0, 0, 0, nonarray, 0,
        "_VERY_FALSE", 0, {}, {1,1,0,0, ""}, NULL },
    };
    for( struct cbl_field_t *f = constants;
--- 2153,2186 ----
  
    // These should match the definitions in libgcobol/constants.cc
    static cbl_field_t constants[] = {
!     { 0, FldAlphanumeric, FldInvalid, space_value_e | constq | register_e, 0, 0, 0, nonarray, 0,
        "SPACE", 0, {}, {1,1,0,0, " \0\xFF"}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, space_value_e | constq | register_e, 0, 0, 0, nonarray, 0,
        "SPACES", 0, {}, {1,1,0,0, " \0\xFF"}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, low_value_e | constq | register_e, 0, 0, 0, nonarray, 0,
        "LOW_VALUES", 0, {}, {1,1,0,0, "L\0\xFF"}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, zero_value_e | constq | register_e, 0, 0, 0, nonarray, 0,
        "ZEROS", 0, {}, {1,1,0,0, "0"}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, high_value_e | constq | register_e, 0, 0, 0, nonarray, 0,
        "HIGH_VALUES", 0, {}, {1,1,0,0, "H\0\xFF"}, NULL },
      // IBM standard: QUOTE is a double-quote unless APOST compiler option
!     { 0, FldAlphanumeric, FldInvalid, quote_value_e | constq | register_e , 0, 0, 0, nonarray, 0,
        "QUOTES", 0, {}, {1,1,0,0, "\"\0\xFF"}, NULL },
!     { 0, FldPointer, FldPointer, constq | register_e , 0, 0, 0, nonarray, 0,
        "NULLS", 0, {}, {8,8,0,0, zeroes_for_null_pointer}, NULL },
      // IBM defines TALLY
      // 01  TALLY GLOBAL PICTURE 9(5) USAGE BINARY VALUE ZERO.
!     { 0, FldNumericBin5, FldInvalid, signable_e | register_e, 0, 0, 0, nonarray, 0,
        "_TALLY", 0, {}, {16, 16, MAX_FIXED_POINT_DIGITS, 0, NULL}, NULL },
      // 01  ARGI is the current index into the argv array
!     { 0, FldNumericBin5, FldInvalid, signable_e | register_e, 0, 0, 0, nonarray, 0,
        "_ARGI", 0, {}, {16, 16, MAX_FIXED_POINT_DIGITS, 0, NULL}, NULL },
  
      // These last two don't require actual storage; they get BOOL var_decl_node
      // in parser_symbol_add()
!     { 0, FldConditional, FldInvalid, constant_e | register_e , 0, 0, 0, nonarray, 0,
        "_VERY_TRUE", 0, {}, {1,1,0,0, ""}, NULL },
!     { 0, FldConditional, FldInvalid, constant_e | register_e , 0, 0, 0, nonarray, 0,
        "_VERY_FALSE", 0, {}, {1,1,0,0, ""}, NULL },
    };
    for( struct cbl_field_t *f = constants;
*************** symbol_table_init(void) {
*** 2253,2281 ****
     **/
  
    static cbl_field_t debug_registers[] = {
!     { 0, FldGroup, FldInvalid, global_e, 0,0,1, nonarray, 0,
        "DEBUG-ITEM", 0, {}, {132,132,0,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, global_e, 0,0,2, nonarray, 0,
        "DEBUG-LINE", 0, {}, {6,6,0,0, "      "}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, 0, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, global_e, 0,0,2, nonarray, 0,
        "DEBUG-NAME", 0, {}, {30,30,0,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, 0, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldNumericDisplay, FldInvalid, signable_e | global_e | leading_e | separate_e, 0,0,2, nonarray, 0,
!       "DEBUG-SUB-1", 0, {}, {5,5,3,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, 0, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldNumericDisplay, FldInvalid, signable_e | global_e | leading_e | separate_e, 0,0,2, nonarray, 0,
!       "DEBUG-SUB-2", 0, {}, {5,5,3,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, 0, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldNumericDisplay, FldInvalid, signable_e | global_e | leading_e | separate_e, 0,0,2, nonarray, 0,
!       "DEBUG-SUB-3", 0, {}, {5,5,3,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, 0, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, signable_e | global_e, 0,0,2, nonarray, 0,
        "DEBUG-CONTENTS", 0, {}, {76,76,0,0, NULL}, NULL },
    };
  
--- 2253,2281 ----
     **/
  
    static cbl_field_t debug_registers[] = {
!     { 0, FldGroup, FldInvalid, register_e, 0,0,1, nonarray, 0,
        "DEBUG-ITEM", 0, {}, {132,132,0,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, register_e, 0,0,2, nonarray, 0,
        "DEBUG-LINE", 0, {}, {6,6,0,0, "      "}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, register_e|filler_e, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, register_e, 0,0,2, nonarray, 0,
        "DEBUG-NAME", 0, {}, {30,30,0,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, register_e|filler_e, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldNumericDisplay, FldInvalid, signable_e | register_e | leading_e | separate_e, 0,0,2, nonarray, 0,
!       "DEBUG-SUB-1", 0, {}, {5,5,4,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, register_e|filler_e, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldNumericDisplay, FldInvalid, signable_e | register_e | leading_e | separate_e, 0,0,2, nonarray, 0,
!       "DEBUG-SUB-2", 0, {}, {5,5,4,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, register_e|filler_e, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldNumericDisplay, FldInvalid, signable_e | register_e | leading_e | separate_e, 0,0,2, nonarray, 0,
!       "DEBUG-SUB-3", 0, {}, {5,5,4,0, NULL}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, register_e|filler_e, 0,0,2, nonarray, 0,
        "FILLER", 0, {}, {1,1,0,0, " "}, NULL },
!     { 0, FldAlphanumeric, FldInvalid, signable_e | register_e, 0,0,2, nonarray, 0,
        "DEBUG-CONTENTS", 0, {}, {76,76,0,0, NULL}, NULL },
    };
  
*************** symbol_table_init(void) {
*** 2296,2316 ****
    std::for_each(debug_start+1, p, parent_elem_set(debug_start - table.elems));
  
    static cbl_field_t special_registers[] = {
!     { 0, FldNumericDisplay, FldInvalid, 0, 0, 0, 0, nonarray, 0, "_FILE_STATUS",
        0, {}, {2,2,2,0, NULL}, NULL },
!     { 0, FldNumericBin5, FldInvalid, 0, 0, 0, 0, nonarray, 0, "UPSI-0",
        0, {}, {2,2,4,0, NULL}, NULL },
!     { 0, FldNumericBin5, FldInvalid, signable_e, 0, 0, 0, nonarray, 0, "RETURN-CODE",
        0, {}, {2,2,4,0, NULL}, NULL },
!     { 0, FldNumericBin5, FldInvalid, 0, 0, 0, 0, nonarray, 0, "LINAGE-COUNTER",
        0, {}, {2,2,4,0, NULL}, NULL },
!     { 0, FldLiteralA, FldInvalid, 0, 0, 0, 0, nonarray, 0, "_dev_stdin",
        0, {}, {0,0,0,0, "/dev/stdin"}, NULL },
!     { 0, FldLiteralA, FldInvalid, constq, 0, 0, 0, nonarray, 0, "_dev_stdout",
        0, {}, {0,0,0,0, "/dev/stdout"}, NULL },
!     { 0, FldLiteralA, FldInvalid, constq, 0, 0, 0, nonarray, 0, "_dev_stderr",
        0, {}, {0,0,0,0, "/dev/stderr"}, NULL },
!     { 0, FldLiteralA, FldInvalid, constq, 0, 0, 0, nonarray, 0, "_dev_null",
        0, {}, {0,0,0,0, "/dev/null"}, NULL },
    };
  
--- 2296,2316 ----
    std::for_each(debug_start+1, p, parent_elem_set(debug_start - table.elems));
  
    static cbl_field_t special_registers[] = {
!     { 0, FldNumericDisplay, FldInvalid, register_e, 0, 0, 0, nonarray, 0, "_FILE_STATUS",
        0, {}, {2,2,2,0, NULL}, NULL },
!     { 0, FldNumericBin5, FldInvalid, register_e, 0, 0, 0, nonarray, 0, "UPSI-0",
        0, {}, {2,2,4,0, NULL}, NULL },
!     { 0, FldNumericBin5, FldInvalid, signable_e|register_e, 0, 0, 0, nonarray, 0, "RETURN-CODE",
        0, {}, {2,2,4,0, NULL}, NULL },
!     { 0, FldNumericBin5, FldInvalid, register_e, 0, 0, 0, nonarray, 0, "LINAGE-COUNTER",
        0, {}, {2,2,4,0, NULL}, NULL },
!     { 0, FldLiteralA, FldInvalid, register_e, 0, 0, 0, nonarray, 0, "_dev_stdin",
        0, {}, {0,0,0,0, "/dev/stdin"}, NULL },
!     { 0, FldLiteralA, FldInvalid, constq|register_e, 0, 0, 0, nonarray, 0, "_dev_stdout",
        0, {}, {0,0,0,0, "/dev/stdout"}, NULL },
!     { 0, FldLiteralA, FldInvalid, constq|register_e, 0, 0, 0, nonarray, 0, "_dev_stderr",
        0, {}, {0,0,0,0, "/dev/stderr"}, NULL },
!     { 0, FldLiteralA, FldInvalid, constq|register_e, 0, 0, 0, nonarray, 0, "_dev_null",
        0, {}, {0,0,0,0, "/dev/null"}, NULL },
    };
  
*************** ast_file_status_between( file_status_t l
*** 4713,4733 ****
  }
  
  bool
- is_register_field(const cbl_field_t *field)
-   {
-   // TRUE when the field is an executable-level global variable of the type we
-   // are calling a "register", like RETURN-CODE or UPSI or the like:
-   return
-     (    field->parent == 0
-       && field->level == 0
-       && !(field->attr & intermediate_e)
-       && !(field->attr & filler_e)
-       && field->type != FldClass
-       && field->type != FldBlob
-       );
-   }
- 
- bool
  has_value( cbl_field_type_t type ) {
    // Indicates that the field type contains data that can be expressed as
    // a numeric value
--- 4713,4718 ----
diff -Nrcpad gcc-16-20250831/gcc/cobol/symbols.h gcc-16-20250907/gcc/cobol/symbols.h
*** gcc-16-20250831/gcc/cobol/symbols.h	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/cobol/symbols.h	Sun Sep  7 22:32:58 2025
*************** is_record_area( const cbl_field_t *field
*** 817,824 ****
    return 0 == memcmp(field->name, stem, sizeof(stem)-1);
  }
  
- bool is_register_field( const cbl_field_t *field );
- 
  static inline bool
  is_constant( const cbl_field_t *field ) {
    return field->has_attr(constant_e);
--- 817,822 ----
diff -Nrcpad gcc-16-20250831/gcc/common/config/riscv/riscv-common.cc gcc-16-20250907/gcc/common/config/riscv/riscv-common.cc
*** gcc-16-20250831/gcc/common/config/riscv/riscv-common.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/common/config/riscv/riscv-common.cc	Sun Sep  7 22:32:58 2025
*************** static const riscv_extra_ext_flag_table_
*** 1545,1550 ****
--- 1545,1553 ----
    RISCV_EXT_FLAG_ENTRY ("xtheadvector",  x_riscv_isa_flags, MASK_FULL_V),
    RISCV_EXT_FLAG_ENTRY ("xtheadvector",  x_riscv_isa_flags, MASK_VECTOR),
  
+   RISCV_EXT_FLAG_ENTRY ("xandesvbfhcvt",  x_riscv_vector_elen_flags, MASK_VECTOR_ELEN_BF_16),
+   RISCV_EXT_FLAG_ENTRY ("xandesvpackfph", x_riscv_vector_elen_flags, MASK_VECTOR_ELEN_FP_16),
+ 
    {NULL, NULL, NULL, 0}
  };
  
*************** riscv_ext_is_subset (struct cl_target_op
*** 1626,1632 ****
    for (const auto &riscv_ext_info : riscv_ext_infos)
      {
        const auto &ext_info = riscv_ext_info.second;
!       if (ext_info.check_opts (opts) && !ext_info.check_opts (subset))
  	return false;
      }
    return true;
--- 1629,1635 ----
    for (const auto &riscv_ext_info : riscv_ext_infos)
      {
        const auto &ext_info = riscv_ext_info.second;
!       if (!ext_info.check_opts (opts) && ext_info.check_opts (subset))
  	return false;
      }
    return true;
diff -Nrcpad gcc-16-20250831/gcc/common.opt gcc-16-20250907/gcc/common.opt
*** gcc-16-20250831/gcc/common.opt	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/common.opt	Sun Sep  7 22:32:58 2025
*************** fdelete-null-pointer-checks
*** 1394,1399 ****
--- 1394,1403 ----
  Common Var(flag_delete_null_pointer_checks) Init(-1) Optimization
  Delete useless null pointer checks.
  
+ fdep-fusion
+ Common Var(flag_dep_fusion) Optimization Init(1)
+ Issue defining instructions back to back with their single uses, provided they are macro-fusible in the target microarchitecture.
+ 
  fdevirtualize-at-ltrans
  Common Var(flag_ltrans_devirtualize)
  Stream extra data to support more aggressive devirtualization in LTO local transformation mode.
diff -Nrcpad gcc-16-20250831/gcc/config/aarch64/aarch64-simd.md gcc-16-20250907/gcc/config/aarch64/aarch64-simd.md
*** gcc-16-20250831/gcc/config/aarch64/aarch64-simd.md	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config/aarch64/aarch64-simd.md	Sun Sep  7 22:32:58 2025
***************
*** 1788,1793 ****
--- 1788,1801 ----
    enum rtx_code cmp_operator;
    rtx cmp_fmt;
  
+   /* SVE has native D-forms of the MIN/MAX instructions.  */
+   if (TARGET_SVE)
+     {
+       emit_insn (gen_<su><maxmin>v2di3_as_sve (operands[0], operands[1],
+ 					       operands[2]));
+       DONE;
+     }
+ 
    switch (<CODE>)
      {
      case UMIN:
***************
*** 6731,6737 ****
  	(SAT_TRUNC:<VNARROWQ>
  	  (<TRUNC_SHIFT>:SD_HSDI
  	    (match_operand:SD_HSDI 1 "register_operand" "w")
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
    "TARGET_SIMD"
    "<shrn_op>shrn\t%<vn2>0<Vmntype>, %<v>1<Vmtype>, %2"
    [(set_attr "type" "neon_shift_imm_narrow_q")]
--- 6739,6745 ----
  	(SAT_TRUNC:<VNARROWQ>
  	  (<TRUNC_SHIFT>:SD_HSDI
  	    (match_operand:SD_HSDI 1 "register_operand" "w")
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
    "TARGET_SIMD"
    "<shrn_op>shrn\t%<vn2>0<Vmntype>, %<v>1<Vmtype>, %2"
    [(set_attr "type" "neon_shift_imm_narrow_q")]
***************
*** 6753,6759 ****
  	(ALL_TRUNC:<VNARROWQ>
  	  (<TRUNC_SHIFT>:VQN
  	    (match_operand:VQN 1 "register_operand")
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
    "TARGET_SIMD"
    {
      operands[2] = aarch64_simd_gen_const_vector_dup (<MODE>mode,
--- 6761,6767 ----
  	(ALL_TRUNC:<VNARROWQ>
  	  (<TRUNC_SHIFT>:VQN
  	    (match_operand:VQN 1 "register_operand")
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
    "TARGET_SIMD"
    {
      operands[2] = aarch64_simd_gen_const_vector_dup (<MODE>mode,
***************
*** 6784,6790 ****
  	      (<TRUNCEXTEND>:<DWI>
  	        (match_operand:SD_HSDI 1 "register_operand" "w"))
  	      (match_operand:<DWI> 3 "aarch64_int_rnd_operand"))
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
    "TARGET_SIMD
     && aarch64_const_vec_rnd_cst_p (operands[3], operands[2])"
    "<shrn_op>rshrn\t%<vn2>0<Vmntype>, %<v>1<Vmtype>, %2"
--- 6792,6798 ----
  	      (<TRUNCEXTEND>:<DWI>
  	        (match_operand:SD_HSDI 1 "register_operand" "w"))
  	      (match_operand:<DWI> 3 "aarch64_int_rnd_operand"))
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
    "TARGET_SIMD
     && aarch64_const_vec_rnd_cst_p (operands[3], operands[2])"
    "<shrn_op>rshrn\t%<vn2>0<Vmntype>, %<v>1<Vmtype>, %2"
***************
*** 6799,6805 ****
  	      (<TRUNCEXTEND>:<V2XWIDE>
  	        (match_operand:SD_HSDI 1 "register_operand"))
  	      (match_dup 3))
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
    "TARGET_SIMD"
    {
      /* Use this expander to create the rounding constant vector, which is
--- 6807,6813 ----
  	      (<TRUNCEXTEND>:<V2XWIDE>
  	        (match_operand:SD_HSDI 1 "register_operand"))
  	      (match_dup 3))
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
    "TARGET_SIMD"
    {
      /* Use this expander to create the rounding constant vector, which is
***************
*** 6819,6825 ****
  	      (<TRUNCEXTEND>:<V2XWIDE>
  	        (match_operand:VQN 1 "register_operand"))
  	      (match_dup 3))
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))))]
    "TARGET_SIMD"
    {
      if (<CODE> == TRUNCATE
--- 6827,6833 ----
  	      (<TRUNCEXTEND>:<V2XWIDE>
  	        (match_operand:VQN 1 "register_operand"))
  	      (match_dup 3))
! 	    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))))]
    "TARGET_SIMD"
    {
      if (<CODE> == TRUNCATE
***************
*** 6861,6867 ****
  	  (smax:SD_HSDI
  	    (ashiftrt:SD_HSDI
  	      (match_operand:SD_HSDI 1 "register_operand" "w")
! 	      (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))
  	    (const_int 0))
  	  (const_int <half_mask>)))]
    "TARGET_SIMD"
--- 6869,6875 ----
  	  (smax:SD_HSDI
  	    (ashiftrt:SD_HSDI
  	      (match_operand:SD_HSDI 1 "register_operand" "w")
! 	      (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))
  	    (const_int 0))
  	  (const_int <half_mask>)))]
    "TARGET_SIMD"
***************
*** 6872,6878 ****
  (define_expand "aarch64_sqshrun_n<mode>"
    [(match_operand:<VNARROWQ> 0 "register_operand")
     (match_operand:SD_HSDI 1 "register_operand")
!    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>")]
    "TARGET_SIMD"
    {
      rtx dst = gen_reg_rtx (<MODE>mode);
--- 6880,6886 ----
  (define_expand "aarch64_sqshrun_n<mode>"
    [(match_operand:<VNARROWQ> 0 "register_operand")
     (match_operand:SD_HSDI 1 "register_operand")
!    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>")]
    "TARGET_SIMD"
    {
      rtx dst = gen_reg_rtx (<MODE>mode);
***************
*** 6890,6896 ****
  	    (smax:VQN
  	      (ashiftrt:VQN
  		(match_operand:VQN 1 "register_operand")
! 		(match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))
  	      (match_dup 3))
  	    (match_dup 4))))]
    "TARGET_SIMD"
--- 6898,6904 ----
  	    (smax:VQN
  	      (ashiftrt:VQN
  		(match_operand:VQN 1 "register_operand")
! 		(match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))
  	      (match_dup 3))
  	    (match_dup 4))))]
    "TARGET_SIMD"
***************
*** 6932,6938 ****
  		(sign_extend:<DWI>
  		  (match_operand:SD_HSDI 1 "register_operand" "w"))
  		(match_operand:<DWI> 3 "aarch64_int_rnd_operand"))
! 	      (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))
  	    (const_int 0))
  	  (const_int <half_mask>)))]
    "TARGET_SIMD
--- 6940,6946 ----
  		(sign_extend:<DWI>
  		  (match_operand:SD_HSDI 1 "register_operand" "w"))
  		(match_operand:<DWI> 3 "aarch64_int_rnd_operand"))
! 	      (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))
  	    (const_int 0))
  	  (const_int <half_mask>)))]
    "TARGET_SIMD
***************
*** 6944,6950 ****
  (define_expand "aarch64_sqrshrun_n<mode>"
    [(match_operand:<VNARROWQ> 0 "register_operand")
     (match_operand:SD_HSDI 1 "register_operand")
!    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>")]
    "TARGET_SIMD"
    {
      int prec = GET_MODE_UNIT_PRECISION (<DWI>mode);
--- 6952,6958 ----
  (define_expand "aarch64_sqrshrun_n<mode>"
    [(match_operand:<VNARROWQ> 0 "register_operand")
     (match_operand:SD_HSDI 1 "register_operand")
!    (match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>")]
    "TARGET_SIMD"
    {
      int prec = GET_MODE_UNIT_PRECISION (<DWI>mode);
***************
*** 6967,6973 ****
  		  (sign_extend:<V2XWIDE>
  		    (match_operand:VQN 1 "register_operand"))
  		  (match_dup 3))
! 		(match_operand:SI 2 "aarch64_simd_shift_imm_offset_<ve_mode>"))
  	      (match_dup 4))
  	    (match_dup 5))))]
    "TARGET_SIMD"
--- 6975,6981 ----
  		  (sign_extend:<V2XWIDE>
  		    (match_operand:VQN 1 "register_operand"))
  		  (match_dup 3))
! 		(match_operand:SI 2 "aarch64_simd_shift_imm_offset_<vn_mode>"))
  	      (match_dup 4))
  	    (match_dup 5))))]
    "TARGET_SIMD"
diff -Nrcpad gcc-16-20250831/gcc/config/aarch64/aarch64-sve.md gcc-16-20250907/gcc/config/aarch64/aarch64-sve.md
*** gcc-16-20250831/gcc/config/aarch64/aarch64-sve.md	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config/aarch64/aarch64-sve.md	Sun Sep  7 22:32:58 2025
***************
*** 4052,4064 ****
  ;; -------------------------------------------------------------------------
  
  ;; Unpredicated integer binary operations that have an immediate form.
! (define_expand "<optab><mode>3"
!   [(set (match_operand:SVE_I 0 "register_operand")
! 	(unspec:SVE_I
  	  [(match_dup 3)
! 	   (SVE_INT_BINARY_MULTI:SVE_I
! 	     (match_operand:SVE_I 1 "register_operand")
! 	     (match_operand:SVE_I 2 "aarch64_sve_<sve_imm_con>_operand"))]
  	  UNSPEC_PRED_X))]
    "TARGET_SVE"
    {
--- 4052,4064 ----
  ;; -------------------------------------------------------------------------
  
  ;; Unpredicated integer binary operations that have an immediate form.
! (define_expand "<optab><mode>3<sve_di_suf>"
!   [(set (match_operand:SVE_I_SIMD_DI 0 "register_operand")
! 	(unspec:SVE_I_SIMD_DI
  	  [(match_dup 3)
! 	   (SVE_INT_BINARY_MULTI:SVE_I_SIMD_DI
! 	     (match_operand:SVE_I_SIMD_DI 1 "register_operand")
! 	     (match_operand:SVE_I_SIMD_DI 2 "aarch64_sve_<sve_imm_con>_operand"))]
  	  UNSPEC_PRED_X))]
    "TARGET_SVE"
    {
diff -Nrcpad gcc-16-20250831/gcc/config/aarch64/aarch64.cc gcc-16-20250907/gcc/config/aarch64/aarch64.cc
*** gcc-16-20250831/gcc/config/aarch64/aarch64.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config/aarch64/aarch64.cc	Sun Sep  7 22:32:58 2025
*************** aarch64_adjust_stmt_cost (vec_info *vinf
*** 17770,17782 ****
  
     with the single accumulator being read and written multiple times.  */
  static bool
! aarch64_force_single_cycle (vec_info *vinfo, stmt_vec_info stmt_info)
  {
!   if (!STMT_VINFO_REDUC_DEF (stmt_info))
      return false;
! 
!   auto reduc_info = info_for_reduction (vinfo, stmt_info);
!   return STMT_VINFO_FORCE_SINGLE_CYCLE (reduc_info);
  }
  
  /* COUNT, KIND and STMT_INFO are the same as for vector_costs::add_stmt_cost
--- 17770,17781 ----
  
     with the single accumulator being read and written multiple times.  */
  static bool
! aarch64_force_single_cycle (vec_info *vinfo, slp_tree node)
  {
!   auto reduc_info = info_for_reduction (as_a <loop_vec_info> (vinfo), node);
!   if (!reduc_info)
      return false;
!   return VECT_REDUC_INFO_FORCE_SINGLE_CYCLE (reduc_info);
  }
  
  /* COUNT, KIND and STMT_INFO are the same as for vector_costs::add_stmt_cost
*************** aarch64_vector_costs::count_ops (unsigne
*** 17803,17809 ****
  	= aarch64_in_loop_reduction_latency (m_vinfo, node,
  					     stmt_info, m_vec_flags);
        if (m_costing_for_scalar
! 	  || aarch64_force_single_cycle (m_vinfo, stmt_info))
  	/* ??? Ideally we'd use a tree to reduce the copies down to 1 vector,
  	   and then accumulate that, but at the moment the loop-carried
  	   dependency includes all copies.  */
--- 17802,17808 ----
  	= aarch64_in_loop_reduction_latency (m_vinfo, node,
  					     stmt_info, m_vec_flags);
        if (m_costing_for_scalar
! 	  || aarch64_force_single_cycle (m_vinfo, node))
  	/* ??? Ideally we'd use a tree to reduce the copies down to 1 vector,
  	   and then accumulate that, but at the moment the loop-carried
  	   dependency includes all copies.  */
diff -Nrcpad gcc-16-20250831/gcc/config/aarch64/iterators.md gcc-16-20250907/gcc/config/aarch64/iterators.md
*** gcc-16-20250831/gcc/config/aarch64/iterators.md	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config/aarch64/iterators.md	Sun Sep  7 22:32:58 2025
***************
*** 1931,1936 ****
--- 1931,1941 ----
  			   (VNx8SI "VNx8HI") (VNx16SI "VNx16QI")
  			   (VNx8DI "VNx8HI")])
  
+ ;; Suffix mapping Advanced SIMD modes to be expanded as SVE instructions.
+ (define_mode_attr sve_di_suf [(VNx16QI "") (VNx8HI "") (VNx4SI "") (VNx2DI "")
+ 			      (VNx8QI "") (VNx4QI "") (VNx2QI "") (VNx4HI "")
+ 			      (VNx2HI "") (VNx2SI "") (V2DI "_as_sve")])
+ 
  ;; Register suffix narrowed modes for VQN.
  (define_mode_attr Vntype [(V8HI "8b") (V4SI "4h")
  			  (V2DI "2s")])
***************
*** 2205,2211 ****
  			   (SI   "si")])
  
  ;; Like ve_mode but for the half-width modes.
! (define_mode_attr vn_mode [(V8HI  "qi") (V4SI  "hi") (V2DI  "si")])
  
  ;; Vm for lane instructions is restricted to FP_LO_REGS.
  (define_mode_attr vwx [(V4HI "x") (V8HI "x") (HI "x")
--- 2210,2217 ----
  			   (SI   "si")])
  
  ;; Like ve_mode but for the half-width modes.
! (define_mode_attr vn_mode [(V8HI  "qi") (V4SI  "hi") (V2DI  "si") (DI "si")
! 			   (SI "hi") (HI "qi")])
  
  ;; Vm for lane instructions is restricted to FP_LO_REGS.
  (define_mode_attr vwx [(V4HI "x") (V8HI "x") (HI "x")
diff -Nrcpad gcc-16-20250831/gcc/config/arm/neon.md gcc-16-20250907/gcc/config/arm/neon.md
*** gcc-16-20250831/gcc/config/arm/neon.md	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config/arm/neon.md	Sun Sep  7 22:32:58 2025
***************
*** 321,327 ****
              (match_operand:<V_elem> 1 "nonimmediate_operand" "Um,r"))
            (match_operand:VD_LANE 3 "s_register_operand" "0,0")
            (match_operand:SI 2 "immediate_operand" "i,i")))]
!   "TARGET_NEON"
  {
    int elt = ffs ((int) INTVAL (operands[2])) - 1;
    if (BYTES_BIG_ENDIAN)
--- 321,329 ----
              (match_operand:<V_elem> 1 "nonimmediate_operand" "Um,r"))
            (match_operand:VD_LANE 3 "s_register_operand" "0,0")
            (match_operand:SI 2 "immediate_operand" "i,i")))]
!   "TARGET_NEON
!    && (GET_MODE_NUNITS (<MODE>mode)
!        > (unsigned) exact_log2 (INTVAL (operands[2])))"
  {
    int elt = ffs ((int) INTVAL (operands[2])) - 1;
    if (BYTES_BIG_ENDIAN)
***************
*** 342,348 ****
              (match_operand:<V_elem> 1 "nonimmediate_operand" "Um,r"))
            (match_operand:VQ2 3 "s_register_operand" "0,0")
            (match_operand:SI 2 "immediate_operand" "i,i")))]
!   "TARGET_NEON"
  {
    HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
    int half_elts = GET_MODE_NUNITS (<MODE>mode) / 2;
--- 344,353 ----
              (match_operand:<V_elem> 1 "nonimmediate_operand" "Um,r"))
            (match_operand:VQ2 3 "s_register_operand" "0,0")
            (match_operand:SI 2 "immediate_operand" "i,i")))]
!   "TARGET_NEON
!    && (GET_MODE_NUNITS (<MODE>mode)
!        > (unsigned) exact_log2 (INTVAL (operands[2])))"
! 
  {
    HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
    int half_elts = GET_MODE_NUNITS (<MODE>mode) / 2;
***************
*** 371,377 ****
              (match_operand:DI 1 "nonimmediate_operand" "Um,r"))
            (match_operand:V2DI_ONLY 3 "s_register_operand" "0,0")
            (match_operand:SI 2 "immediate_operand" "i,i")))]
!   "TARGET_NEON"
  {
    HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
    int regno = REGNO (operands[0]) + 2 * elem;
--- 376,384 ----
              (match_operand:DI 1 "nonimmediate_operand" "Um,r"))
            (match_operand:V2DI_ONLY 3 "s_register_operand" "0,0")
            (match_operand:SI 2 "immediate_operand" "i,i")))]
!   "TARGET_NEON
!    && (GET_MODE_NUNITS (<MODE>mode)
!        > (unsigned) exact_log2 (INTVAL (operands[2])))"
  {
    HOST_WIDE_INT elem = ffs ((int) INTVAL (operands[2])) - 1;
    int regno = REGNO (operands[0]) + 2 * elem;
diff -Nrcpad gcc-16-20250831/gcc/config/avr/avr.cc gcc-16-20250907/gcc/config/avr/avr.cc
*** gcc-16-20250831/gcc/config/avr/avr.cc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config/avr/avr.cc	Sun Sep  7 22:32:58 2025
*************** avr_out_compare (rtx_insn *insn, rtx *xo
*** 6597,6630 ****
  	    }
  	}
  
!       /* Comparing against 0 is easy.  */
! 
!       if (val8 == 0)
! 	{
! 	  avr_asm_len (i == start
! 		       ? "cp %0,__zero_reg__"
! 		       : "cpc %0,__zero_reg__", xop, plen, 1);
! 	  continue;
! 	}
  
!       /* Upper registers can compare and subtract-with-carry immediates.
! 	 Notice that compare instructions do the same as respective subtract
! 	 instruction; the only difference is that comparisons don't write
! 	 the result back to the target register.  */
  
!       if (test_hard_reg_class (LD_REGS, xop[0]))
  	{
! 	  if (i == start)
! 	    {
! 	      avr_asm_len ("cpi %0,%1", xop, plen, 1);
! 	      continue;
! 	    }
! 	  else if (reg_unused_after (insn, xreg))
! 	    {
! 	      avr_asm_len ("sbci %0,%1", xop, plen, 1);
! 	      changed[i] = true;
! 	      continue;
! 	    }
  	}
  
        /* When byte comparisons for an EQ or NE comparison look like
--- 6597,6610 ----
  	    }
  	}
  
!       /* Otherwise, compare a single byte with CP / CPC or equivalent.  */
  
!       const bool ldreg_p = test_hard_reg_class (LD_REGS, xop[0]);
  
!       if (ldreg_p && i == start)
  	{
! 	  avr_asm_len ("cpi %0,%1", xop, plen, 1);
! 	  continue;
  	}
  
        /* When byte comparisons for an EQ or NE comparison look like
*************** avr_out_compare (rtx_insn *insn, rtx *xo
*** 6641,6647 ****
  
  	  for (int j = start; j < i && ! found; ++j)
  	    if (val8 == avr_uint8 (xval, j)
! 		// Make sure that we didn't clobber x[j] above.
  		&& ! changed[j])
  	      {
  		rtx op[] = { xop[0], avr_byte (xreg, j) };
--- 6621,6627 ----
  
  	  for (int j = start; j < i && ! found; ++j)
  	    if (val8 == avr_uint8 (xval, j)
! 		// Make sure that we didn't clobber x[j] with SBCI.
  		&& ! changed[j])
  	      {
  		rtx op[] = { xop[0], avr_byte (xreg, j) };
*************** avr_out_compare (rtx_insn *insn, rtx *xo
*** 6653,6658 ****
--- 6633,6669 ----
  	    continue;
  	}
  
+       /* Upper registers can SBCI which has the same effect like CPC on
+ 	 SREG, but it writes back the result of the subtraction to %0.
+ 	 Therefore, SBCI can only replace CPC when %0 is unused after,
+ 	 or when the comparison is against 0x..0000.  */
+ 
+       if (ldreg_p && i > start)
+ 	{
+ 	  bool zero_p = true;
+ 
+ 	  for (int j = start; j <= i; ++j)
+ 	    zero_p &= avr_uint8 (xval, j) == 0;
+ 
+ 	  if (zero_p || reg_unused_after (insn, xreg))
+ 	    {
+ 	      avr_asm_len ("sbci %0,%1", xop, plen, 1);
+ 	      changed[i] = !zero_p;
+ 	      continue;
+ 	    }
+ 	}
+ 
+       /* Comparing against 0 is easy, but only invoke __zero_reg__ when
+ 	 nothing else has been found.  This is better for small ISRs.  */
+ 
+       if (val8 == 0)
+ 	{
+ 	  avr_asm_len (i == start
+ 		       ? "cp %0,__zero_reg__"
+ 		       : "cpc %0,__zero_reg__", xop, plen, 1);
+ 	  continue;
+ 	}
+ 
        /* Must load the value into the scratch register.  */
  
        gcc_assert (REG_P (xop[2]));
*************** avr_out_plus_ext (rtx_insn *insn, rtx *y
*** 8533,8543 ****
--- 8544,8560 ----
    const int n_bytes0 = GET_MODE_SIZE (GET_MODE (xop[0]));
    const int n_bytes1 = GET_MODE_SIZE (GET_MODE (xop[1]));
    rtx msb1 = all_regs_rtx[n_bytes1 - 1 + REGNO (xop[1])];
+   // Prefer SBCI *,0 over SBC *,__zero_reg__.
+   const bool sbci_p = add == MINUS && n_bytes0 > n_bytes1
+     ? test_hard_reg_class (LD_REGS, avr_byte (xop[0], n_bytes1))
+     : false;
  
    const char *const s_ADD = add == PLUS ? "add %0,%1" : "sub %0,%1";
    const char *const s_ADC = add == PLUS ? "adc %0,%1" : "sbc %0,%1";
    const char *const s_DEC = add == PLUS
      ? "adc %0,__zero_reg__"  CR_TAB  "sbrc %1,7"  CR_TAB  "dec %0"
+     : sbci_p
+     ? "sbci %0,0"            CR_TAB  "sbrc %1,7"  CR_TAB  "inc %0"
      : "sbc %0,__zero_reg__"  CR_TAB  "sbrc %1,7"  CR_TAB  "inc %0";
  
    // A register that containts 8 copies of $1.msb.
*************** avr_out_plus_ext (rtx_insn *insn, rtx *y
*** 8582,8587 ****
--- 8599,8606 ----
  	  regs[1] = msb1;
  	  avr_asm_len (s_DEC, regs, plen, 3);
  	}
+       else if (sbci_p && regs[1] == zero_reg_rtx)
+ 	avr_asm_len ("sbci %0,0", regs, plen, 1);
        else
  	avr_asm_len (s_ADC, regs, plen, 1);
      }
*************** avr_out_plus_1 (rtx xinsn, rtx *xop, int
*** 8890,8896 ****
  	{
  	  if (started)
  	    avr_asm_len (code == PLUS
! 			 ? "adc %0,__zero_reg__" : "sbc %0,__zero_reg__",
  			 op, plen, 1);
  	  continue;
  	}
--- 8909,8916 ----
  	{
  	  if (started)
  	    avr_asm_len (code == PLUS
! 			 ? "adc %0,__zero_reg__"
! 			 : ld_reg_p ? "sbci %0,0" : "sbc %0,__zero_reg__",
  			 op, plen, 1);
  	  continue;
  	}
diff -Nrcpad gcc-16-20250831/gcc/config/avr/avr.md gcc-16-20250907/gcc/config/avr/avr.md
*** gcc-16-20250831/gcc/config/avr/avr.md	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config/avr/avr.md	Sun Sep  7 22:32:58 2025
***************
*** 6492,6504 ****
  ;; "cmpqq3" "cmpuqq3"
  (define_insn "cmp<mode>3"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALL1 0 "register_operand"  "r  ,r,d")
!                     (match_operand:ALL1 1 "nonmemory_operand" "Y00,r,i")))]
    "reload_completed"
    "@
! 	cp %0, __zero_reg__
! 	cp %0,%1
! 	cpi %0,lo8(%1)"
    [(set_attr "length" "1,1,1")])
  
  
--- 6492,6504 ----
  ;; "cmpqq3" "cmpuqq3"
  (define_insn "cmp<mode>3"
    [(set (reg:CC REG_CC)
!         (compare:CC (match_operand:ALL1 0 "register_operand"  "d,r  ,r")
!                     (match_operand:ALL1 1 "nonmemory_operand" "i,Y00,r")))]
    "reload_completed"
    "@
! 	cpi %0,lo8(%1)
! 	cp %0,__zero_reg__
! 	cp %0,%1"
    [(set_attr "length" "1,1,1")])
  
  
diff -Nrcpad gcc-16-20250831/gcc/config/i386/predicates.md gcc-16-20250907/gcc/config/i386/predicates.md
*** gcc-16-20250831/gcc/config/i386/predicates.md	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config/i386/predicates.md	Sun Sep  7 22:32:58 2025
***************
*** 1319,1324 ****
--- 1319,1327 ----
    (ior (match_operand 0 "nonimmediate_operand")
         (match_test "const_vec_duplicate_p (op)")))
  
+ (define_predicate "const_vec_dup_operand"
+        (match_test "const_vec_duplicate_p (op)"))
+ 
  ;; Return true when OP is either register operand, or any
  ;; CONST_VECTOR.
  (define_predicate "reg_or_const_vector_operand"
diff -Nrcpad gcc-16-20250831/gcc/config/i386/sse.md gcc-16-20250907/gcc/config/i386/sse.md
*** gcc-16-20250831/gcc/config/i386/sse.md	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config/i386/sse.md	Sun Sep  7 22:32:58 2025
***************
*** 27001,27019 ****
    DONE;
  })
  
- ; not generated by vectorizer?
  (define_expand "cond_<insn><mode>"
    [(set (match_operand:VI1_AVX512VL 0 "register_operand")
  	(vec_merge:VI1_AVX512VL
  	  (any_shift:VI1_AVX512VL
  	    (match_operand:VI1_AVX512VL 2 "register_operand")
! 	    (match_operand:VI1_AVX512VL 3 "nonimmediate_or_const_vec_dup_operand"))
  	  (match_operand:VI1_AVX512VL 4 "nonimm_or_0_operand")
  	(match_operand:<avx512fmaskmode> 1 "register_operand")))]
    "TARGET_GFNI && TARGET_AVX512F"
  {
!   rtx matrix = ix86_vgf2p8affine_shift_matrix (operands[0], operands[2], <CODE>);
!   emit_insn (gen_vgf2p8affineqb_<mode>_mask (operands[0], operands[1], matrix,
  					     const0_rtx, operands[4],
  					     operands[1]));
    DONE;
--- 27001,27019 ----
    DONE;
  })
  
  (define_expand "cond_<insn><mode>"
    [(set (match_operand:VI1_AVX512VL 0 "register_operand")
  	(vec_merge:VI1_AVX512VL
  	  (any_shift:VI1_AVX512VL
  	    (match_operand:VI1_AVX512VL 2 "register_operand")
! 	    (match_operand:VI1_AVX512VL 3 "const_vec_dup_operand"))
  	  (match_operand:VI1_AVX512VL 4 "nonimm_or_0_operand")
  	(match_operand:<avx512fmaskmode> 1 "register_operand")))]
    "TARGET_GFNI && TARGET_AVX512F"
  {
!   rtx count = XVECEXP (operands[3], 0, 0);
!   rtx matrix = ix86_vgf2p8affine_shift_matrix (operands[0], count, <CODE>);
!   emit_insn (gen_vgf2p8affineqb_<mode>_mask (operands[0], operands[2], matrix,
  					     const0_rtx, operands[4],
  					     operands[1]));
    DONE;
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/andes-vector-builtins-bases.cc gcc-16-20250907/gcc/config/riscv/andes-vector-builtins-bases.cc
*** gcc-16-20250831/gcc/config/riscv/andes-vector-builtins-bases.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/config/riscv/andes-vector-builtins-bases.cc	Sun Sep  7 22:32:58 2025
***************
*** 0 ****
--- 1,183 ----
+ /* function_base implementation for Andes custom 'V' Extension for GNU compiler.
+    Copyright (C) 2024-2025 Free Software Foundation, Inc.
+    Contributed by Andes.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "tm.h"
+ #include "tree.h"
+ #include "rtl.h"
+ #include "tm_p.h"
+ #include "memmodel.h"
+ #include "insn-codes.h"
+ #include "optabs.h"
+ #include "recog.h"
+ #include "expr.h"
+ #include "basic-block.h"
+ #include "function.h"
+ #include "fold-const.h"
+ #include "gimple.h"
+ #include "gimple-iterator.h"
+ #include "gimplify.h"
+ #include "explow.h"
+ #include "emit-rtl.h"
+ #include "tree-vector-builder.h"
+ #include "rtx-vector-builder.h"
+ #include "riscv-vector-builtins.h"
+ #include "riscv-vector-builtins-shapes.h"
+ #include "andes-vector-builtins-bases.h"
+ #include "riscv-vector-builtins-bases.h"
+ 
+ using namespace riscv_vector;
+ 
+ namespace riscv_vector {
+ 
+ /* Implements Andes vfwcvt.  */
+ template <enum frm_op_type FRM_OP = NO_FRM>
+ class nds_vfncvtbf16_f : public function_base
+ {
+ public:
+   bool apply_mask_policy_p () const override { return false; }
+   bool use_mask_predication_p () const override { return false; }
+   bool has_rounding_mode_operand_p () const override
+   {
+       return FRM_OP == HAS_FRM;
+   }
+   bool may_require_frm_p () const override { return true; }
+ 
+   rtx expand (function_expander &e) const override
+   {
+     return e.use_exact_insn (code_for_pred_nds_vfncvt_bf16
+ 			     (e.vector_mode ()));
+   }
+ };
+ 
+ class nds_vfwcvtbf16_f : public function_base
+ {
+ public:
+   bool apply_mask_policy_p () const override { return false; }
+   bool use_mask_predication_p () const override { return false; }
+ 
+   rtx expand (function_expander &e) const override
+   {
+     return e.use_exact_insn (code_for_pred_nds_vfwcvt_bf16 (e.vector_mode ()));
+   }
+ };
+ 
+ /* Implements Andes vln8.v/vln8.v.  */
+ template <bool SIGN>
+ class nds_nibbleload : public function_base
+ {
+ public:
+   unsigned int call_properties (const function_instance &) const override
+   {
+     return CP_READ_MEMORY;
+   }
+ 
+   bool can_be_overloaded_p (enum predication_type_index pred) const override
+   {
+     return pred != PRED_TYPE_none;
+   }
+ 
+   rtx expand (function_expander &e) const override
+   {
+     if (SIGN)
+       return e.use_contiguous_load_insn (
+ 	code_for_pred_intload_mov (SIGN_EXTEND, e.vector_mode ()));
+     return e.use_contiguous_load_insn (
+       code_for_pred_intload_mov (ZERO_EXTEND, e.vector_mode ()));
+   }
+ };
+ 
+ template<int UNSPEC, enum frm_op_type FRM_OP = NO_FRM>
+ class nds_vfpmad : public function_base
+ {
+ public:
+   bool has_rounding_mode_operand_p () const override
+   {
+     return FRM_OP == HAS_FRM;
+   }
+   bool may_require_frm_p () const override { return true; }
+ 
+   rtx expand (function_expander &e) const override
+   {
+     return e.use_exact_insn (code_for_pred_nds_vfpmad (UNSPEC,
+ 						       e.vector_mode ()));
+   }
+ };
+ 
+ /* Implements Andes vdot.  */
+ template<rtx_code EXTEND>
+ class nds_vd4dot : public function_base
+ {
+ public:
+   bool has_merge_operand_p () const override { return false; }
+ 
+   rtx expand (function_expander &e) const override
+   {
+     return e.use_widen_ternop_insn
+       (code_for_pred_nds_vd4dot (EXTEND, e.vector_mode ()));
+   }
+ };
+ 
+ /* Implements vwmacc<su><su>.  */
+ class nds_vd4dotsu : public function_base
+ {
+ public:
+   bool has_merge_operand_p () const override { return false; }
+ 
+   rtx expand (function_expander &e) const override
+   {
+     return e.use_widen_ternop_insn
+       (code_for_pred_nds_vd4dotsu (e.vector_mode ()));
+   }
+ };
+ 
+ static CONSTEXPR const nds_vfwcvtbf16_f nds_vfwcvt_s_obj;
+ static CONSTEXPR const nds_vfncvtbf16_f<NO_FRM> nds_vfncvt_bf16_obj;
+ static CONSTEXPR const nds_vfncvtbf16_f<HAS_FRM> nds_vfncvt_bf16_frm_obj;
+ static CONSTEXPR const nds_nibbleload<true> nds_vln8_obj;
+ static CONSTEXPR const nds_nibbleload<false> nds_vlnu8_obj;
+ static CONSTEXPR const nds_vfpmad <UNSPEC_NDS_VFPMADT, NO_FRM> nds_vfpmadt_obj;
+ static CONSTEXPR const nds_vfpmad <UNSPEC_NDS_VFPMADB, NO_FRM> nds_vfpmadb_obj;
+ static CONSTEXPR const nds_vfpmad <UNSPEC_NDS_VFPMADT, HAS_FRM> nds_vfpmadt_frm_obj;
+ static CONSTEXPR const nds_vfpmad <UNSPEC_NDS_VFPMADB, HAS_FRM> nds_vfpmadb_frm_obj;
+ static CONSTEXPR const nds_vd4dot<SIGN_EXTEND> nds_vd4dots_obj;
+ static CONSTEXPR const nds_vd4dot<ZERO_EXTEND> nds_vd4dotu_obj;
+ static CONSTEXPR const nds_vd4dotsu nds_vd4dotsu_obj;
+ 
+ /* Declare the function base NAME, pointing it to an instance
+    of class <NAME>_obj.  */
+ #define BASE(NAME) \
+   namespace bases { const function_base *const NAME = &NAME##_obj; }
+ 
+ BASE (nds_vfwcvt_s)
+ BASE (nds_vfncvt_bf16)
+ BASE (nds_vfncvt_bf16_frm)
+ BASE (nds_vln8)
+ BASE (nds_vlnu8)
+ BASE (nds_vfpmadt)
+ BASE (nds_vfpmadb)
+ BASE (nds_vfpmadt_frm)
+ BASE (nds_vfpmadb_frm)
+ BASE (nds_vd4dots)
+ BASE (nds_vd4dotu)
+ BASE (nds_vd4dotsu)
+ } // end namespace riscv_vector
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/andes-vector-builtins-bases.h gcc-16-20250907/gcc/config/riscv/andes-vector-builtins-bases.h
*** gcc-16-20250831/gcc/config/riscv/andes-vector-builtins-bases.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/config/riscv/andes-vector-builtins-bases.h	Sun Sep  7 22:32:58 2025
***************
*** 0 ****
--- 1,43 ----
+ /* function_base declaration for Andes custom 'V' Extension for GNU compiler.
+    Copyright (C) 2024-2025 Free Software Foundation, Inc.
+    Contributed by Andes.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3, or (at your option)
+    any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but
+    WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+    General Public License for more details.
+ 
+    You should have received a copy of the GNU General Public License
+    along with GCC; see the file COPYING3.  If not see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef GCC_ANDES_VECTOR_BUILTINS_BASES_H
+ #define GCC_ANDES_VECTOR_BUILTINS_BASES_H
+ 
+ namespace riscv_vector {
+ 
+ namespace bases {
+ extern const function_base *const nds_vfwcvt_s;
+ extern const function_base *const nds_vfncvt_bf16;
+ extern const function_base *const nds_vfncvt_bf16_frm;
+ extern const function_base *const nds_vln8;
+ extern const function_base *const nds_vlnu8;
+ extern const function_base *const nds_vfpmadt;
+ extern const function_base *const nds_vfpmadb;
+ extern const function_base *const nds_vfpmadt_frm;
+ extern const function_base *const nds_vfpmadb_frm;
+ extern const function_base *const nds_vd4dots;
+ extern const function_base *const nds_vd4dotu;
+ extern const function_base *const nds_vd4dotsu;
+ }
+ 
+ } // end namespace riscv_vector
+ 
+ #endif
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/andes-vector-builtins-functions.def gcc-16-20250907/gcc/config/riscv/andes-vector-builtins-functions.def
*** gcc-16-20250831/gcc/config/riscv/andes-vector-builtins-functions.def	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/config/riscv/andes-vector-builtins-functions.def	Sun Sep  7 22:32:58 2025
***************
*** 0 ****
--- 1,66 ----
+ /* Intrinsic define macros for Andes custom 'V' Extension for GNU compiler.
+    Copyright (C) 2024-2025 Free Software Foundation, Inc.
+    Contributed by Andes.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>. */
+ 
+ /* Use "DEF_RVV_FUNCTION" macro to define RVV intrinsic functions.
+ 
+      - NAME not only describes the base_name of the functions
+        but also point to the name of the function_base class.
+ 
+      - SHAPE point to the function_shape class.
+ 
+      - PREDS describes the predication types that are supported in the
+        functions.
+ 
+      - OPS_INFO describes all information of return type and each
+        argument type.
+ 
+ */
+ #ifndef DEF_RVV_FUNCTION
+ #define DEF_RVV_FUNCTION(NAME, SHAPE, PREDS, OPS_INFO)
+ #endif
+ 
+ /* Andes Vector Packed FP16 Extension (XAndesVBFHCvt).  */
+ #define REQUIRED_EXTENSIONS XANDESVBFHCVT_EXT
+ DEF_RVV_FUNCTION (nds_vfwcvt_s, alu, none_tu_preds, bf16_to_f32_wf_v_ops)
+ DEF_RVV_FUNCTION (nds_vfncvt_bf16, narrow_alu, none_tu_preds, f32_to_bf16_nf_w_ops)
+ DEF_RVV_FUNCTION (nds_vfncvt_bf16_frm, narrow_alu_frm, none_tu_preds, f32_to_bf16_nf_w_ops)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #define REQUIRED_EXTENSIONS XANDESVSINTLOAD_EXT
+ DEF_RVV_FUNCTION (nds_vln8, alu, full_preds, q_v_void_const_ptr_ops)
+ DEF_RVV_FUNCTION (nds_vlnu8, alu, full_preds, qu_v_void_const_ptr_ops)
+ #undef REQUIRED_EXTENSIONS
+ 
+ /* Prefix name for `__riscv_nds_`.  */
+ #define REQUIRED_EXTENSIONS XANDESVPACKFPH_EXT
+ DEF_RVV_FUNCTION (nds_vfpmadt, alu, full_preds, f16_vvw_ops)
+ DEF_RVV_FUNCTION (nds_vfpmadb, alu, full_preds, f16_vvw_ops)
+ DEF_RVV_FUNCTION (nds_vfpmadt_frm, alu_frm, full_preds, f16_vvw_ops)
+ DEF_RVV_FUNCTION (nds_vfpmadb_frm, alu_frm, full_preds, f16_vvw_ops)
+ #undef REQUIRED_EXTENSIONS
+ 
+ /* Andes Vector Dot Product Extension (XAndesVDot).  */
+ #define REQUIRED_EXTENSIONS XANDESVDOT_EXT
+ DEF_RVV_FUNCTION (nds_vd4dots, alu, full_preds, qexti_vvvv_ops)
+ DEF_RVV_FUNCTION (nds_vd4dotsu, alu, full_preds, qexti_su_vvvv_ops)
+ DEF_RVV_FUNCTION (nds_vd4dotu, alu, full_preds, qextu_vvvv_ops)
+ #undef REQUIRED_EXTENSIONS
+ 
+ #undef DEF_RVV_FUNCTION
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/andes-vector.md gcc-16-20250907/gcc/config/riscv/andes-vector.md
*** gcc-16-20250831/gcc/config/riscv/andes-vector.md	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/config/riscv/andes-vector.md	Sun Sep  7 22:32:58 2025
***************
*** 0 ****
--- 1,190 ----
+ ;; Machine description for Andes vendor extensions
+ ;; Copyright (C) 2021-2025 Free Software Foundation, Inc.
+ 
+ ;; This file is part of GCC.
+ 
+ ;; GCC is free software; you can redistribute it and/or modify
+ ;; it under the terms of the GNU General Public License as published by
+ ;; the Free Software Foundation; either version 3, or (at your option)
+ ;; any later version.
+ 
+ ;; GCC is distributed in the hope that it will be useful,
+ ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+ ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ ;; GNU General Public License for more details.
+ 
+ ;; You should have received a copy of the GNU General Public License
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ (define_c_enum "unspec" [
+   UNSPEC_NDS_VFWCVTBF16
+   UNSPEC_NDS_VFNCVTBF16
+   UNSPEC_NDS_INTLOAD
+   UNSPEC_NDS_VFPMADT
+   UNSPEC_NDS_VFPMADB
+   UNSPEC_NDS_VD4DOT
+ ])
+ 
+ (define_int_iterator NDS_VFPMAD [UNSPEC_NDS_VFPMADT UNSPEC_NDS_VFPMADB])
+ (define_int_attr nds_tb [(UNSPEC_NDS_VFPMADT "t") (UNSPEC_NDS_VFPMADB "b")])
+ 
+ ;;  ....................
+ ;;
+ ;;    VECTOR BFLOAT16 CONVERSION
+ ;;
+ ;;  ....................
+ 
+ ;; Xandesvbfhcvt extension
+ (define_insn "@pred_nds_vfncvt_bf16<mode>"
+   [(set (match_operand:<NDS_V_DOUBLE_TRUNC_BF> 0 "register_operand" "=&vr, &vr")
+ 	(if_then_else:<NDS_V_DOUBLE_TRUNC_BF>
+ 	  (unspec:<VM>
+ 	    [(match_operand 3 "vector_length_operand"           "  rK,  rK")
+ 	     (match_operand 4 "const_int_operand"               "  i,    i")
+ 	     (match_operand 5 "const_int_operand"               "  i,    i")
+ 	     (match_operand 6 "const_int_operand"               "  i,    i")
+ 	     (reg:SI VL_REGNUM)
+ 	     (reg:SI VTYPE_REGNUM)
+ 	     (reg:SI FRM_REGNUM)] UNSPEC_NDS_VFWCVTBF16)
+ 	  (float_truncate:<NDS_V_DOUBLE_TRUNC_BF>
+ 	     (match_operand:NDS_VWEXTBF 2 "register_operand"              "vr, vr"))
+ 	  (match_operand:<NDS_V_DOUBLE_TRUNC_BF> 1 "vector_merge_operand" "vu,  0")))]
+   "TARGET_VECTOR && TARGET_XANDESVBFHCVT"
+   "nds.vfncvt.bf16.s\t%0,%2"
+   [(set_attr "type" "vfncvtbf16")
+    (set_attr "mode" "<NDS_V_DOUBLE_TRUNC_BF>")
+    (set_attr "merge_op_idx" "1")
+    (set_attr "vl_op_idx" "3")
+    (set (attr "ta") (symbol_ref "riscv_vector::get_ta(operands[4])"))
+    (set (attr "avl_type_idx") (const_int 5))
+    (set (attr "ma") (const_int INVALID_ATTRIBUTE))
+    (set (attr "frm_mode")
+         (symbol_ref "riscv_vector::get_frm_mode (operands[6])"))])
+ 
+ (define_insn "@pred_nds_vfwcvt_bf16<mode>"
+   [(set (match_operand:NDS_VWEXTBF 0 "register_operand"   "=&vr, &vr")
+ 	(if_then_else:NDS_VWEXTBF
+ 	  (unspec_volatile:<VM>
+ 	    [(match_operand 3 "vector_length_operand" "  rK,  rK")
+ 	     (match_operand 4 "const_int_operand"     "   i,   i")
+ 	     (match_operand 5 "const_int_operand"     "   i,   i")
+ 	     (reg:SI VL_REGNUM)
+ 	     (reg:SI VTYPE_REGNUM)] UNSPEC_NDS_VFNCVTBF16)
+ 	  (float_extend:NDS_VWEXTBF
+ 	     (match_operand:<NDS_V_DOUBLE_TRUNC_BF> 2 "register_operand" "vr, vr"))
+ 	  (match_operand:NDS_VWEXTBF 1 "vector_merge_operand"            "vu,  0")))]
+   "TARGET_VECTOR && TARGET_XANDESVBFHCVT"
+   "nds.vfwcvt.s.bf16\t%0,%2"
+   [(set_attr "type" "vfwcvtbf16")
+    (set_attr "merge_op_idx" "1")
+    (set_attr "vl_op_idx" "3")
+    (set (attr "ta") (symbol_ref "riscv_vector::get_ta(operands[4])"))
+    (set (attr "avl_type_idx") (const_int 5))
+    (set (attr "ma") (const_int INVALID_ATTRIBUTE))
+    (set_attr "mode" "<NDS_V_DOUBLE_TRUNC_BF>")])
+ 
+ ;; Vector INT4 Load Extension.
+ 
+ (define_insn "@pred_intload_mov<su><mode>"
+   [(set (match_operand:NDS_QVI 0 "nonimmediate_operand"       "=vr,  vr, vd")
+     (if_then_else:NDS_QVI
+       (unspec:<VM>
+ 	[(match_operand:<VM> 1 "vector_mask_operand"        "vmWc1, Wc1, vm")
+ 	 (match_operand 4 "vector_length_operand"           "   rK,  rK, rK")
+ 	 (match_operand 5 "const_int_operand"               "    i,   i,  i")
+ 	 (match_operand 6 "const_int_operand"               "    i,   i,  i")
+ 	 (match_operand 7 "const_int_operand"               "    i,   i,  i")
+ 	 (reg:SI VL_REGNUM)
+ 	 (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
+       (unspec:NDS_QVI
+ 	[(any_extend:NDS_QVI (match_operand:VOID 3 "memory_operand" "m,  m,  m"))]
+ 	  UNSPEC_NDS_INTLOAD)
+       (match_operand:NDS_QVI 2 "vector_merge_operand"               "0, vu, vu")))]
+   "(TARGET_VECTOR && TARGET_XANDESVSINTLOAD
+     && register_operand (operands[0], <MODE>mode))"
+   "@
+    nds.vln<u>8.v\t%0,%3%p1
+    nds.vln<u>8.v\t%0,%3
+    nds.vln<u>8.v\t%0,%3,%1.t"
+   [(set_attr "type" "vlde,vlde,vlde")
+    (set_attr "mode" "<MODE>")])
+ 
+ ;; Vector Packed FP16.
+ 
+ (define_insn "@pred_nds_vfpmad<nds_tb><mode>"
+   [(set (match_operand:VHF 0 "register_operand"               "=&vr, &vr")
+ 	(if_then_else:VHF
+ 	  (unspec:<VM>
+ 	    [(match_operand:<VM> 1 "vector_mask_operand"       "vmWc1, vmWc1")
+ 	     (match_operand 5 "vector_length_operand"          "   rK,    rK")
+ 	     (match_operand 6 "const_int_operand"              "    i,     i")
+ 	     (match_operand 7 "const_int_operand"              "    i,     i")
+ 	     (match_operand 8 "const_int_operand"              "    i,     i")
+ 	     (match_operand 9 "const_int_operand"              "    i,     i")
+ 	     (reg:SI VL_REGNUM)
+ 	     (reg:SI VTYPE_REGNUM)
+ 	     (reg:SI FRM_REGNUM)] UNSPEC_VPREDICATE)
+ 	  (unspec:VHF
+ 	    [(match_operand:VHF 3 "register_operand" "vr, vr")
+ 	     (match_operand:SF 4 "register_operand"   " f,  f")] NDS_VFPMAD)
+ 	  (match_operand:VHF 2 "vector_merge_operand"   "vu,  0")))]
+   "TARGET_VECTOR && TARGET_XANDESVPACKFPH"
+   "nds.vfpmad<nds_tb>.vf\t%0,%4,%3%p1"
+   [(set_attr "type" "vfmuladd")
+    (set_attr "mode" "<MODE>")
+    (set_attr "enabled" "yes")
+    (set (attr "frm_mode")
+ 	(symbol_ref "riscv_vector::get_frm_mode (operands[9])"))])
+ 
+ ;; Vector Dot Product Extension
+ 
+ (define_insn "@pred_nds_vd4dot<su><mode>"
+   [(set (match_operand:VQEXTI 0 "register_operand"                    "=&vr")
+ 	(if_then_else:VQEXTI
+ 	  (unspec:<VM>
+ 	    [(match_operand:<VM> 1 "vector_mask_operand"             "vmWc1")
+ 	     (match_operand 5 "vector_length_operand"                "   rK")
+ 	     (match_operand 6 "const_int_operand"                    "    i")
+ 	     (match_operand 7 "const_int_operand"                    "    i")
+ 	     (match_operand 8 "const_int_operand"                    "    i")
+ 	     (reg:SI VL_REGNUM)
+ 	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
+ 	  (unspec:VQEXTI
+ 	    [(any_extend:VQEXTI
+ 	       (match_operand:<NDS_QUAD_FIX> 3 "register_operand" " vr"))
+ 	     (any_extend:VQEXTI
+ 	       (match_operand:<NDS_QUAD_FIX> 4 "register_operand" " vr"))
+ 	     (any_extend:VQEXTI
+ 	       (match_operand:VQEXTI 2 "register_operand" " 0"))]
+ 	     UNSPEC_NDS_VD4DOT)
+ 	  (match_dup 2)))]
+   "TARGET_VECTOR && TARGET_XANDESVDOT"
+   "nds.vd4dot<su>.vv\t%0,%3,%4%p1"
+   [(set_attr "type" "viwmuladd")
+    (set_attr "mode" "<MODE>")])
+ 
+ (define_insn "@pred_nds_vd4dotsu<mode>"
+   [(set (match_operand:VQEXTI 0 "register_operand"                    "=&vr")
+ 	(if_then_else:VQEXTI
+ 	  (unspec:<VM>
+ 	    [(match_operand:<VM> 1 "vector_mask_operand"             "vmWc1")
+ 	     (match_operand 5 "vector_length_operand"                "   rK")
+ 	     (match_operand 6 "const_int_operand"                    "    i")
+ 	     (match_operand 7 "const_int_operand"                    "    i")
+ 	     (match_operand 8 "const_int_operand"                    "    i")
+ 	     (reg:SI VL_REGNUM)
+ 	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
+ 	  (unspec:VQEXTI
+ 	    [(sign_extend:VQEXTI
+ 	       (match_operand:<NDS_QUAD_FIX> 3 "register_operand" " vr"))
+ 	     (zero_extend:VQEXTI
+ 	       (match_operand:<NDS_QUAD_FIX> 4 "register_operand" " vr"))
+ 	     (sign_extend:VQEXTI
+ 	       (match_operand:VQEXTI 2 "register_operand" " 0"))]
+ 	    UNSPEC_NDS_VD4DOT)
+ 	  (match_dup 2)))]
+   "TARGET_VECTOR && TARGET_XANDESVDOT"
+   "nds.vd4dotsu.vv\t%0,%3,%4%p1"
+   [(set_attr "type" "viwmuladd")
+    (set_attr "mode" "<MODE>")])
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/andes.def gcc-16-20250907/gcc/config/riscv/andes.def
*** gcc-16-20250831/gcc/config/riscv/andes.def	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/config/riscv/andes.def	Sun Sep  7 22:32:58 2025
***************
*** 0 ****
--- 1,14 ----
+ // XANDESPERF
+ /* Andes Performance Extension */
+ RISCV_BUILTIN (nds_ffbsi, "nds_ffb_32", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_USI_USI, andesperf32),
+ RISCV_BUILTIN (nds_ffbdi, "nds_ffb_64", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_UDI_UDI, andesperf64),
+ RISCV_BUILTIN (nds_ffzmismsi, "nds_ffzmism_32", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_USI_USI, andesperf32),
+ RISCV_BUILTIN (nds_ffzmismdi, "nds_ffzmism_64", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_UDI_UDI, andesperf64),
+ RISCV_BUILTIN (nds_ffmismsi, "nds_ffmism_32", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_USI_USI, andesperf32),
+ RISCV_BUILTIN (nds_ffmismdi, "nds_ffmism_64", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_UDI_UDI, andesperf64),
+ RISCV_BUILTIN (nds_flmismsi, "nds_flmism_32", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_USI_USI, andesperf32),
+ RISCV_BUILTIN (nds_flmismdi, "nds_flmism_64", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_UDI_UDI, andesperf64),
+ 
+ /* Andes Scalar BFLOAT16 Conversion Extension */
+ RISCV_BUILTIN_NO_PREFIX (extendbfsf2, "nds_fcvt_s_bf16", RISCV_BUILTIN_DIRECT, RISCV_SF_FTYPE_BF, andesbfhcvt),
+ RISCV_BUILTIN_NO_PREFIX (truncsfbf2, "nds_fcvt_bf16_s", RISCV_BUILTIN_DIRECT, RISCV_BF_FTYPE_SF, andesbfhcvt),
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/andes.md gcc-16-20250907/gcc/config/riscv/andes.md
*** gcc-16-20250831/gcc/config/riscv/andes.md	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/config/riscv/andes.md	Sun Sep  7 22:32:58 2025
***************
*** 0 ****
--- 1,429 ----
+ ;; Machine description for Andes vendor extensions
+ ;; Copyright (C) 2025 Free Software Foundation, Inc.
+ 
+ ;; This file is part of GCC.
+ 
+ ;; GCC is free software; you can redistribute it and/or modify
+ ;; it under the terms of the GNU General Public License as published by
+ ;; the Free Software Foundation; either version 3, or (at your option)
+ ;; any later version.
+ 
+ ;; GCC is distributed in the hope that it will be useful,
+ ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+ ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ ;; GNU General Public License for more details.
+ 
+ ;; You should have received a copy of the GNU General Public License
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ (define_c_enum "unspec" [
+   ;; XANDESPERF string
+   UNSPEC_NDS_FFB
+   UNSPEC_NDS_FFZMISM
+   UNSPEC_NDS_FFMISM
+   UNSPEC_NDS_FLMISM
+ ])
+ 
+ ;; AndesPerf
+ ;;  ....................
+ ;;
+ ;;      BRANCH OPERATION
+ ;;
+ ;;  ....................
+ ;;
+ 
+ (define_insn "*nds_branch_imms7<mode>"
+   [(set (pc)
+ 	(if_then_else (any_eq (match_operand:X 1 "register_operand"        "r")
+ 			      (match_operand:X 2 "ads_branch_bimm_operand" "Ou07"))
+ 		      (label_ref (match_operand 0 "" ""))
+ 		      (pc)))]
+   "TARGET_XANDESPERF"
+ {
+   if (get_attr_length (insn) == 12)
+     return "nds.b<optab>c\t%1,%2,1f; jump\t%l0,ra; 1:";
+ 
+   return "nds.b<optab>c\t%1,%2,%l0";
+ }
+   [(set_attr "type" "branch")
+    (set_attr "mode" "none")])
+ 
+ (define_insn "*nds_branch_on_bit<X:mode>"
+   [(set (pc)
+ 	(if_then_else (any_eq (zero_extract:X (match_operand:X 1 "register_operand" "r")
+ 			      (const_int 1)
+ 			      (match_operand 2 "ads_branch_bbcs_operand"))
+ 		      (const_int 0))
+ 		      (label_ref (match_operand 0))
+ 		      (pc)))
+ 	(clobber (match_scratch:X 3 "=&r"))]
+    "TARGET_XANDESPERF"
+ {
+   if (get_attr_length (insn) == 12)
+     return "nds.bb<any_eq:cs>\t%1,%2,%1f; jump\t%l0,ra; 1:";
+ 
+   return "nds.bb<any_eq:cs>\t%1,%2,%l0";
+ }
+   [(set_attr "type" "branch")
+    (set_attr "mode" "none")])
+ 
+ ;;
+ ;;  ....................
+ ;;
+ ;;      EXTENSION OPERATION
+ ;;
+ ;;  ....................
+ ;;
+ 
+ (define_insn "*nds_zero_extendsidi2_internal"
+   [(set (match_operand:DI     0 "register_operand"     "=r,r")
+ 	(zero_extend:DI
+ 	    (match_operand:SI 1 "nonimmediate_operand" " r,m")))]
+   "TARGET_64BIT && TARGET_XANDESPERF"
+   "@
+    nds.bfoz\t%0,%1,31,0
+    lwu\t%0,%1"
+   [(set_attr "move_type" "arith,load")
+    (set_attr "type" "arith,load")
+    (set_attr "mode" "DI")])
+ 
+ (define_insn "*nds_zero_extendhi<GPR:mode>2"
+   [(set (match_operand:GPR    0 "register_operand"     "=r,r")
+ 	(zero_extend:GPR
+ 	  (match_operand:HI 1 "nonimmediate_operand" " r,m")))]
+   "TARGET_XANDESPERF"
+   "@
+    nds.bfoz\t%0,%1,15,0
+    lhu\t%0,%1"
+   [(set_attr "move_type" "arith,load")
+    (set_attr "type" "arith,load")
+    (set_attr "mode" "<GPR:MODE>, HI")])
+ 
+ (define_insn "*nds_extendsidi2_internal"
+   [(set (match_operand:DI     0 "register_operand"     "=r,r")
+ 	(sign_extend:DI
+ 	  (match_operand:SI 1 "nonimmediate_operand" " r,m")))]
+   "TARGET_64BIT && TARGET_XANDESPERF"
+   "@
+    nds.bfos\t%0,%1,31,0
+    lw\t%0,%1"
+   [(set_attr "move_type" "arith,load")
+    (set_attr "type" "arith,load")
+    (set_attr "mode" "DI")])
+ 
+ (define_insn "*nds_extend<SHORT:mode><SUPERQI:mode>2"
+   [(set (match_operand:SUPERQI   0 "register_operand"     "=r,r")
+ 	(sign_extend:SUPERQI
+ 	  (match_operand:SHORT 1 "nonimmediate_operand" " r,m")))]
+   "TARGET_XANDESPERF"
+   "@
+    nds.bfos\t%0,%1,<SHORT:sh_limit>,0
+    l<SHORT:size>\t%0,%1"
+   [(set_attr "move_type" "arith,load")
+    (set_attr "type" "arith,load")
+    (set_attr "mode" "<SHORT:MODE>")])
+ 
+ ;;
+ ;;  ....................
+ ;;
+ ;;      BIT FIELD OPERATION
+ ;;
+ ;;  ....................
+ ;;
+ 
+ ;; BFO[SZ]: msb >= lsb: Extract sequence tail bits.
+ (define_insn "*nds_bfo_<sz>extra<mode>4"
+   [(set (match_operand:GPR 0 "register_operand"                          "=r")
+ 	(any_extract:GPR (match_operand:GPR 1 "register_operand"         " r")
+ 			  (match_operand 2 "ads_extract_size_imm_<mode>" " n")
+ 			  (match_operand 3 "const_int<sh_bit>_operand"   " n")))]
+   "TARGET_XANDESPERF
+    && IN_RANGE (INTVAL (operands[2]) + INTVAL (operands[3]),
+ 		1, GET_MODE_BITSIZE (<MODE>mode))"
+   {
+     operands[2] = GEN_INT (INTVAL (operands[2]) + INTVAL (operands[3]) - 1);
+     return "nds.bfo<sz>\t%0,%1,%2,%3";
+   }
+   [(set_attr "type" "shift")
+    (set_attr "mode" "<GPR:MODE>")])
+ 
+ ;; BFOZ: msb >= lsb: Mask sequence bits.
+ (define_insn "*nds_bfoz_and<mode>3"
+   [(set (match_operand:GPR 0 "register_operand"          "=r")
+ 	(and:GPR (match_operand:GPR 1 "register_operand" " r")
+ 		 (match_operand:GPR 2 "ads_imm_extract_operand"  " ads_Bext")))]
+   "TARGET_XANDESPERF"
+   {
+     operands[2] = GEN_INT (__builtin_popcountll (INTVAL (operands[2])) - 1);
+     return "nds.bfoz\t%0,%1,%2,0";
+   }
+   [(set_attr "type" "shift")
+    (set_attr "mode" "<GPR:MODE>")])
+ 
+ ;; BFOZ: msb >= lsb: Extract sequence bits.
+ (define_insn "*nds_zero_extend<GPR:mode>_lshr<SHORT:mode>"
+   [(set (match_operand:GPR 0 "register_operand"                                    "=r")
+ 	(zero_extend:GPR (lshiftrt:SHORT (match_operand:SHORT 1 "register_operand" " r")
+ 			 (match_operand 2 "const_int_operand"                      " n"))))]
+   "TARGET_XANDESPERF
+    && UINTVAL (operands[2]) < GET_MODE_BITSIZE (<SHORT:MODE>mode)"
+   "nds.bfoz\t%0, %1, <SHORT:sh_limit>, %2"
+   [(set_attr "type" "shift")
+    (set_attr "mode" "<GPR:MODE>")])
+ 
+ ;; BFOS: msb >= lsb
+ (define_insn "*nds_extend<GPR:mode>_ashr<SHORT:mode>"
+   [(set (match_operand:GPR 0 "register_operand"                                    "=r")
+ 	(sign_extend:GPR (ashiftrt:SHORT (match_operand:SHORT 1 "register_operand" " r")
+ 					 (match_operand 2 "const_int_operand"      " n"))))]
+   "TARGET_XANDESPERF
+    && UINTVAL (operands[2]) < GET_MODE_BITSIZE (<SHORT:MODE>mode)"
+   "nds.bfos\t%0, %1, <SHORT:sh_limit>, %2"
+   [(set_attr "type" "shift")
+    (set_attr "mode" "<GPR:MODE>")])
+ 
+ ;; BFO[SZ]: msb < lsb: The pattern doesn't match zero_extract when
+ ;; exact_log2 (Y + 1) < 0 of (and (ashift) Y).
+ (define_insn "*nds_bfoz<mode>4"
+   [(set (match_operand:GPR 0 "register_operand"                           "=r")
+ 	(and:GPR (ashift:GPR (match_operand:GPR 1 "register_operand"      " r")
+ 			     (match_operand 2 "const_int<sh_bit>_operand" " n"))
+ 		 (match_operand 3 "const_int_operand"                     " i")))]
+   "TARGET_XANDESPERF
+    && (UINTVAL (operands[2]) != 0)
+    && (exact_log2 ((UINTVAL (operands[3]) >> UINTVAL (operands[2])) + 1) > 1)
+    && ((UINTVAL (operands[3]) & ((1 << UINTVAL (operands[2])) - 1)) == 0)"
+   {
+     operands[3] =
+       GEN_INT (exact_log2 ((UINTVAL (operands[3]) >> UINTVAL (operands[2])) + 1)
+ 	       + UINTVAL (operands[2]) - 1) ;
+     return "nds.bfoz\t%0,%1,%2,%3";
+   }
+   [(set_attr "type" "shift")
+    (set_attr "mode" "<GPR:MODE>")])
+ 
+ ;; BFOZ: msb = 0.
+ (define_insn "*nds_bfoz0<mode>4"
+   [(set (match_operand:GPR 0 "register_operand"                           "=r")
+ 	(and:GPR (ashift:GPR (match_operand:GPR 1 "register_operand"      " r")
+ 			     (match_operand 2 "const_int<sh_bit>_operand" " n"))
+ 		 (match_operand 3 "const_int_operand"                     " i")))]
+   "TARGET_XANDESPERF
+    && (UINTVAL (operands[2]) != 0)
+    && (exact_log2 ((UINTVAL (operands[3]) >> UINTVAL (operands[2])) + 1) == 1)
+    && ((UINTVAL (operands[3]) & ((1 << UINTVAL (operands[2])) - 1)) == 0)"
+   {
+     return "nds.bfoz\t%0,%1,0,%2";
+   }
+   [(set_attr "type" "shift")
+    (set_attr "mode" "<GPR:MODE>")])
+ 
+ ;; BFO: msb = 0.
+ (define_insn "*nds_bfos0<mode>4"
+   [(set (match_operand:GPR 0 "register_operand"                                 "=r")
+ 	(ashift:GPR (any_extract:GPR (match_operand:GPR 1 "register_operand"    " r")
+ 				     (const_int 1)
+ 				     (const_int 0))
+ 		    (match_operand 2 "const_int<sh_bit>_operand"                " n")))]
+   "TARGET_XANDESPERF"
+   {
+     return "nds.bfo<sz>\t%0,%1,0,%2";
+   }
+   [(set_attr "type" "shift")
+    (set_attr "mode" "<GPR:MODE>")])
+ 
+ ;; BFO: msb < lsb.
+ (define_insn "*nds_bfos_<sz>extra_<mode>4"
+   [(set (match_operand:GPR 0 "register_operand"                                     "=r")
+ 	(ashift:GPR (any_extract:GPR (match_operand:GPR 1 "register_operand"        " r")
+ 				     (match_operand 2 "ads_extract_size_imm_<mode>" " n")
+ 				     (const_int 0))
+ 		    (match_operand 3 "const_int<sh_bit>_operand"                    " n")))]
+   "TARGET_XANDESPERF
+    && UINTVAL (operands[2]) != 1"
+   {
+     operands[2] =  GEN_INT (UINTVAL (operands[2]) + UINTVAL (operands[3]) - 1);
+     return "nds.bfo<sz>\t%0,%1,%3,%2";
+   }
+   [(set_attr "type" "shift")
+    (set_attr "mode" "<GPR:MODE>")])
+ 
+ ;; BFO: msb < lsb
+ (define_insn "*nds_<optab><ANYLE32:mode>_shft_<GPR:mode>"
+   [(set (match_operand:GPR 0 "register_operand"               "=r")
+ 	(ashift:GPR (any_extend:GPR
+ 		    (match_operand:ANYLE32 1 "register_operand" " r"))
+ 		    (match_operand 2 "const_int_operand"      " n")))]
+   "TARGET_XANDESPERF
+    && (UINTVAL (operands[2]) < <ANYLE32:sizen>)
+    && ((INTVAL (operands[2]) + <ANYLE32:sizen>) <= <GPR:sizen>)"
+ {
+   operands[3] = GEN_INT (<ANYLE32:sizen> + INTVAL (operands[2]) - 1);
+   return "nds.bfo<sz>\t%0, %1, %2, %3";
+ }
+   [(set_attr "type" "shift")])
+ 
+ ;; BFO: msb < lsb
+ (define_insn "*nds_<optab><GPR:mode>_ashl<ANYLE32:mode>"
+   [(set (match_operand:GPR 0 "register_operand"                 "=r")
+ 	(any_extend:GPR
+ 	(ashift:ANYLE32 (match_operand:ANYLE32 1 "register_operand" " r")
+ 		      (match_operand 2 "const_int_operand"      " n"))))]
+   "TARGET_XANDESPERF
+    && UINTVAL (operands[2]) < ((<ANYLE32:sizen>) - 1)"
+ {
+   operands[3] = GEN_INT (<ANYLE32:sizen> - 1);
+   return "nds.bfo<sz>\t%0, %1, %2, %3";
+ }
+   [(set_attr "type" "shift")
+    (set_attr "mode" "<GPR:MODE>")])
+ 
+ ;;
+ ;;  ....................
+ ;;
+ ;;	LOAD ADDRESS
+ ;;
+ ;;  ....................
+ ;;
+ 
+ (define_insn "lea_h<mode>"
+   [(set (match_operand:P                   0 "register_operand" "=r")
+ 	(plus:P (ashift:P (match_operand:P 1 "register_operand" " r")
+ 			  (const_int 1))
+ 		(match_operand:P           2 "register_operand" " r")))]
+   "TARGET_XANDESPERF"
+   { return "nds.lea.h\t%0,%2,%1"; }
+   [(set_attr "type" "arith")
+    (set_attr "mode" "<MODE>")])
+ 
+ (define_insn "lea_w<mode>"
+   [(set (match_operand:P                   0 "register_operand" "=r")
+ 	(plus:P (ashift:P (match_operand:P 1 "register_operand" " r")
+ 			  (const_int 2))
+ 		(match_operand:P           2 "register_operand" " r")))]
+   "TARGET_XANDESPERF"
+   { return "nds.lea.w\t%0,%2,%1"; }
+   [(set_attr "type" "arith")
+    (set_attr "mode" "<MODE>")])
+ 
+ (define_insn "lea_d<mode>"
+   [(set (match_operand:P                   0 "register_operand" "=r")
+ 	(plus:P (ashift:P (match_operand:P 1 "register_operand" " r")
+ 			  (const_int 3))
+ 		(match_operand:P           2 "register_operand" " r")))]
+   "TARGET_XANDESPERF"
+   { return "nds.lea.d\t%0,%2,%1"; }
+   [(set_attr "type" "arith")
+    (set_attr "mode" "<MODE>")])
+ 
+ (define_insn "lea_b_ze"
+   [(set (match_operand:DI 0 "register_operand"                          "=r")
+ 	(plus:DI (zero_extend:DI (match_operand:SI 1 "register_operand" " r"))
+ 		 (match_operand:DI 2 "register_operand"                 " r")))]
+   "TARGET_64BIT && TARGET_XANDESPERF"
+   { return "nds.lea.b.ze\t%0,%2,%1"; }
+   [(set_attr "type" "arith")
+    (set_attr "mode" "DI")])
+ 
+ (define_insn "lea_h_ze"
+   [(set (match_operand:DI 0 "register_operand"                                     "=r")
+ 	(plus:DI (ashift:DI (zero_extend:DI (match_operand:SI 1 "register_operand" " r"))
+ 			    (const_int 1))
+ 		 (match_operand:DI 2 "register_operand"                            " r")))]
+   "TARGET_64BIT && TARGET_XANDESPERF"
+   { return "nds.lea.h.ze\t%0,%2,%1"; }
+   [(set_attr "type" "arith")
+    (set_attr "mode" "DI")])
+ 
+ (define_insn "lea_w_ze"
+   [(set (match_operand:DI 0 "register_operand"                                     "=r")
+ 	(plus:DI (ashift:DI (zero_extend:DI (match_operand:SI 1 "register_operand" " r"))
+ 			    (const_int 2))
+ 		 (match_operand:DI 2 "register_operand"                            " r")))]
+   "TARGET_64BIT && TARGET_XANDESPERF"
+   { return "nds.lea.w.ze\t%0,%2,%1"; }
+   [(set_attr "type" "arith")
+    (set_attr "mode" "DI")])
+ 
+ (define_insn "lea_d_ze"
+   [(set (match_operand:DI 0 "register_operand"                                     "=r")
+ 	(plus:DI (ashift:DI (zero_extend:DI (match_operand:SI 1 "register_operand" " r"))
+ 			    (const_int 3))
+ 		 (match_operand:DI 2 "register_operand"                            " r")))]
+   "TARGET_64BIT && TARGET_XANDESPERF"
+   { return "nds.lea.d.ze\t%0,%2,%1"; }
+   [(set_attr "type" "arith")
+    (set_attr "mode" "DI")])
+ 
+ (define_insn "lea_andim_ashift"
+   [(set (match_operand:DI 0 "register_operand"				   "=r")
+ 	(plus:DI (and:DI (ashift:DI (match_operand:DI 1 "register_operand" " r")
+ 				    (match_operand 2 "const_int_operand"   " i"))
+ 			 (match_operand 3 "const_int_operand"		   " i"))
+ 	(match_operand:DI 4 "register_operand"				   " r")))]
+   "TARGET_64BIT && TARGET_XANDESPERF
+    && IN_RANGE (UINTVAL (operands[2]), 0, 3)
+    && exact_log2 ((INTVAL (operands[3]) >> INTVAL (operands[2])) + 1) == 32
+    && (INTVAL (operands[3]) & ((1 << INTVAL (operands[2])) - 1)) == 0"
+   {
+   switch (UINTVAL (operands[2]))
+     {
+     case 0:
+       return "nds.lea.b.ze %0, %4, %1";
+     case 1:
+       return "nds.lea.h.ze %0, %4, %1";
+     case 2:
+       return "nds.lea.w.ze %0, %4, %1";
+     case 3:
+       return "nds.lea.d.ze %0, %4, %1";
+     default:
+       gcc_unreachable ();
+     }
+   }
+   [(set_attr "type" "arith")
+    (set_attr "mode" "DI")])
+ 
+ ;;
+ ;;  ....................
+ ;;
+ ;;    String Extension
+ ;;
+ ;;  ....................
+ ;;
+ 
+ (define_insn "riscv_nds_ffb<mode>"
+   [(set (match_operand:GPR 0 "register_operand" "=r")
+ 	(unspec:GPR [(match_operand:GPR 1 "reg_or_0_operand" "rJ")
+ 		     (match_operand:GPR 2 "nonmemory_operand" "rJ")] UNSPEC_NDS_FFB))]
+   ""
+   "nds.ffb\t%0, %z1, %z2"
+   [(set_attr "mode" "<MODE>")
+    (set_attr "type" "arith")])
+ 
+ (define_insn "riscv_nds_ffzmism<mode>"
+   [(set (match_operand:GPR 0 "register_operand" "=r")
+ 	(unspec:GPR [(match_operand:GPR 1 "reg_or_0_operand" "rJ")
+ 		     (match_operand:GPR 2 "reg_or_0_operand" "rJ")] UNSPEC_NDS_FFZMISM))]
+   ""
+   "nds.ffzmism\t%0, %z1, %z2"
+   [(set_attr "mode" "<MODE>")
+    (set_attr "type" "arith")])
+ 
+ (define_insn "riscv_nds_ffmism<mode>"
+   [(set (match_operand:GPR 0 "register_operand" "=r")
+ 	(unspec:GPR [(match_operand:GPR 1 "reg_or_0_operand" "rJ")
+ 		     (match_operand:GPR 2 "reg_or_0_operand" "rJ")] UNSPEC_NDS_FFMISM))]
+   ""
+   "nds.ffmism\t%0, %z1, %z2"
+   [(set_attr "mode" "<MODE>")
+    (set_attr "type" "arith")])
+ 
+ (define_insn "riscv_nds_flmism<mode>"
+   [(set (match_operand:GPR 0 "register_operand" "=r")
+ 	(unspec:GPR [(match_operand:GPR 1 "reg_or_0_operand" "rJ")
+ 		     (match_operand:GPR 2 "reg_or_0_operand" "rJ")] UNSPEC_NDS_FLMISM))]
+   ""
+   "nds.flmism\t%0, %z1, %z2"
+   [(set_attr "mode" "<MODE>")
+    (set_attr "type" "arith")])
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/andes_vector.h gcc-16-20250907/gcc/config/riscv/andes_vector.h
*** gcc-16-20250831/gcc/config/riscv/andes_vector.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/config/riscv/andes_vector.h	Sun Sep  7 22:32:58 2025
***************
*** 0 ****
--- 1,32 ----
+ /* Andes Vector Extension intrinsics include file.
+    Copyright (C) 2025 Free Software Foundation, Inc.
+ 
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it
+    under the terms of the GNU General Public License as published
+    by the Free Software Foundation; either version 3, or (at your
+    option) any later version.
+ 
+    GCC is distributed in the hope that it will be useful, but WITHOUT
+    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+    License for more details.
+ 
+    Under Section 7 of GPL version 3, you are granted additional
+    permissions described in the GCC Runtime Library Exception, version
+    3.1, as published by the Free Software Foundation.
+ 
+    You should have received a copy of the GNU General Public License and
+    a copy of the GCC Runtime Library Exception along with this program;
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+ #ifndef __ANDES_VECTOR_H
+ #define __ANDES_VECTOR_H
+ 
+ /* TODO: This should have a separate pragma to include only the Andes
+ 	 vector intrinsics.  For now, we are including riscv_vector.h.  */
+ #include <riscv_vector.h>
+ 
+ #endif // __ANDES_VECTOR_H
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/autovec-opt.md gcc-16-20250907/gcc/config/riscv/autovec-opt.md
*** gcc-16-20250831/gcc/config/riscv/autovec-opt.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/autovec-opt.md	Sun Sep  7 22:32:58 2025
***************
*** 1824,1830 ****
    }
    [(set_attr "type" "vimerge")])
  
! (define_insn_and_split "*vmacc_vx_<mode>"
   [(set (match_operand:V_VLSI 0 "register_operand")
     (plus:V_VLSI
      (mult:V_VLSI
--- 1824,1830 ----
    }
    [(set_attr "type" "vimerge")])
  
! (define_insn_and_split "*mul_plus_vx_<mode>"
   [(set (match_operand:V_VLSI 0 "register_operand")
     (plus:V_VLSI
      (mult:V_VLSI
***************
*** 1838,1855 ****
    [(const_int 0)]
    {
      insn_code icode = code_for_pred_mul_plus_vx (<MODE>mode);
!     rtx ops[] = {operands[0], operands[1], operands[2], operands[3],
! 		 RVV_VUNDEF(<MODE>mode)};
      riscv_vector::emit_vlmax_insn (icode, riscv_vector::TERNARY_OP, ops);
  
      DONE;
    }
    [(set_attr "type" "vimuladd")])
  
! (define_insn_and_split "*vnmsac_vx_<mode>"
   [(set (match_operand:V_VLSI 0 "register_operand")
     (minus:V_VLSI
!     (match_operand:V_VLSI   3 "register_operand")
      (mult:V_VLSI
       (vec_duplicate:V_VLSI
        (match_operand:<VEL>   1 "register_operand"))
--- 1838,1855 ----
    [(const_int 0)]
    {
      insn_code icode = code_for_pred_mul_plus_vx (<MODE>mode);
!     rtx v_undef = RVV_VUNDEF(<MODE>mode);
!     rtx ops[] = {operands[0], operands[1], operands[2], operands[3], v_undef};
      riscv_vector::emit_vlmax_insn (icode, riscv_vector::TERNARY_OP, ops);
  
      DONE;
    }
    [(set_attr "type" "vimuladd")])
  
! (define_insn_and_split "*mul_minus_vx_<mode>"
   [(set (match_operand:V_VLSI 0 "register_operand")
     (minus:V_VLSI
!     (match_operand:V_VLSI    3 "register_operand")
      (mult:V_VLSI
       (vec_duplicate:V_VLSI
        (match_operand:<VEL>   1 "register_operand"))
***************
*** 1859,1867 ****
    "&& 1"
    [(const_int 0)]
    {
!     insn_code icode = code_for_pred_vnmsac_vx (<MODE>mode);
!     rtx ops[] = {operands[0], operands[1], operands[2], operands[3],
! 		 RVV_VUNDEF(<MODE>mode)};
      riscv_vector::emit_vlmax_insn (icode, riscv_vector::TERNARY_OP, ops);
  
      DONE;
--- 1859,1867 ----
    "&& 1"
    [(const_int 0)]
    {
!     insn_code icode = code_for_pred_mul_minus_vx (<MODE>mode);
!     rtx v_undef = RVV_VUNDEF(<MODE>mode);
!     rtx ops[] = {operands[0], operands[1], operands[2], operands[3], v_undef};
      riscv_vector::emit_vlmax_insn (icode, riscv_vector::TERNARY_OP, ops);
  
      DONE;
***************
*** 2088,2097 ****
    [(set_attr "type" "vfdiv")]
  )
  
! ;; vfmin.vf
! (define_insn_and_split "*vfmin_vf_<mode>"
    [(set (match_operand:V_VLSF 0 "register_operand")
!     (smin:V_VLSF
        (vec_duplicate:V_VLSF
  	(match_operand:<VEL> 2 "register_operand"))
        (match_operand:V_VLSF 1 "register_operand")))]
--- 2088,2097 ----
    [(set_attr "type" "vfdiv")]
  )
  
! ;; vfmin.vf, vfmax.vf
! (define_insn_and_split "*vf<optab>_vf_<mode>"
    [(set (match_operand:V_VLSF 0 "register_operand")
!     (commutative_float_binop_nofrm:V_VLSF
        (vec_duplicate:V_VLSF
  	(match_operand:<VEL> 2 "register_operand"))
        (match_operand:V_VLSF 1 "register_operand")))]
***************
*** 2100,2106 ****
    "&& 1"
    [(const_int 0)]
    {
!     riscv_vector::emit_vlmax_insn (code_for_pred_scalar (SMIN, <MODE>mode),
  				   riscv_vector::BINARY_OP, operands);
      DONE;
    }
--- 2100,2106 ----
    "&& 1"
    [(const_int 0)]
    {
!     riscv_vector::emit_vlmax_insn (code_for_pred_scalar (<CODE>, <MODE>mode),
  				   riscv_vector::BINARY_OP, operands);
      DONE;
    }
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/constraints.md gcc-16-20250907/gcc/config/riscv/constraints.md
*** gcc-16-20250831/gcc/config/riscv/constraints.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/constraints.md	Sun Sep  7 22:32:58 2025
***************
*** 334,336 ****
--- 334,346 ----
  (define_address_constraint "ZD"
    "An address operand that is valid for a mips prefetch instruction"
    (match_test "riscv_prefetch_offset_address_p (op, mode)"))
+ 
+ (define_constraint "Ou07"
+   "A 7-bit unsigned immediate."
+   (and (match_code "const_int")
+        (match_test "IN_RANGE (ival, 0, 127)")))
+ 
+ (define_constraint "ads_Bext"
+   "Sequence bit extract."
+   (and (match_code "const_int")
+        (match_test "(ival & (ival + 1)) == 0")))
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/gen-riscv-ext-opt.cc gcc-16-20250907/gcc/config/riscv/gen-riscv-ext-opt.cc
*** gcc-16-20250831/gcc/config/riscv/gen-riscv-ext-opt.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/gen-riscv-ext-opt.cc	Sun Sep  7 22:32:58 2025
***************
*** 4,53 ****
  #include <stdio.h>
  #include "riscv-opts.h"
  
- struct version_t
- {
-   int major;
-   int minor;
-   version_t (int major, int minor,
- 	     enum riscv_isa_spec_class spec = ISA_SPEC_CLASS_NONE)
-     : major (major), minor (minor)
-   {}
-   bool operator<(const version_t &other) const
-   {
-     if (major != other.major)
-       return major < other.major;
-     return minor < other.minor;
-   }
- 
-   bool operator== (const version_t &other) const
-   {
-     return major == other.major && minor == other.minor;
-   }
- };
- 
- static void
- print_ext_doc_entry (const std::string &ext_name, const std::string &full_name,
- 		     const std::string &desc,
- 		     const std::vector<version_t> &supported_versions)
- {
-   // Implementation of the function to print the documentation entry
-   // for the extension.
-   std::set<version_t> unique_versions;
-   for (const auto &version : supported_versions)
-     unique_versions.insert (version);
-   printf ("@item %s\n", ext_name.c_str ());
-   printf ("@tab");
-   for (const auto &version : unique_versions)
-     {
-       printf (" %d.%d", version.major, version.minor);
-     }
-   printf ("\n");
-   printf ("@tab %s", full_name.c_str ());
-   if (desc.size ())
-     printf (", %s", desc.c_str ());
-   printf ("\n\n");
- }
- 
  int
  main ()
  {
--- 4,9 ----
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/genrvv-type-indexer.cc gcc-16-20250907/gcc/config/riscv/genrvv-type-indexer.cc
*** gcc-16-20250831/gcc/config/riscv/genrvv-type-indexer.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/genrvv-type-indexer.cc	Sun Sep  7 22:32:58 2025
*************** main (int argc, const char **argv)
*** 364,374 ****
  	    fprintf (fp, "  /*QUAD_EMUL_UNSIGNED*/ %s,\n",
  		     inttype (8, lmul_log2 - 1, true).c_str ());
  	    fprintf (fp, "  /*QUAD_FIX*/ %s,\n",
! 		     inttype (8, lmul_log2, unsigned_p).c_str ());
  	    fprintf (fp, "  /*QUAD_FIX_SIGNED*/ %s,\n",
! 		     inttype (8, lmul_log2, false).c_str ());
  	    fprintf (fp, "  /*QUAD_FIX_UNSIGNED*/ %s,\n",
! 		     inttype (8, lmul_log2, true).c_str ());
  	    fprintf (fp, "  /*OCT_TRUNC*/ %s,\n",
  		     same_ratio_eew_type (sew, lmul_log2, sew / 8, unsigned_p,
  					  false)
--- 364,374 ----
  	    fprintf (fp, "  /*QUAD_EMUL_UNSIGNED*/ %s,\n",
  		     inttype (8, lmul_log2 - 1, true).c_str ());
  	    fprintf (fp, "  /*QUAD_FIX*/ %s,\n",
! 		     inttype (sew / 4, lmul_log2, unsigned_p).c_str ());
  	    fprintf (fp, "  /*QUAD_FIX_SIGNED*/ %s,\n",
! 		     inttype (sew / 4, lmul_log2, false).c_str ());
  	    fprintf (fp, "  /*QUAD_FIX_UNSIGNED*/ %s,\n",
! 		     inttype (sew / 4, lmul_log2, true).c_str ());
  	    fprintf (fp, "  /*OCT_TRUNC*/ %s,\n",
  		     same_ratio_eew_type (sew, lmul_log2, sew / 8, unsigned_p,
  					  false)
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/iterators.md gcc-16-20250907/gcc/config/riscv/iterators.md
*** gcc-16-20250831/gcc/config/riscv/iterators.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/iterators.md	Sun Sep  7 22:32:58 2025
***************
*** 71,76 ****
--- 71,79 ----
  ;; Iterator for hardware integer modes narrower than XLEN, same as ANYI.
  (define_mode_iterator ANYI1 [QI HI SI (DI "TARGET_64BIT")])
  
+ ;; Iterator for integer modes less than or equal to 32bit.
+ (define_mode_iterator ANYLE32 [QI HI SI])
+ 
  (define_mode_iterator ANYI_DOUBLE_TRUNC [HI SI (DI "TARGET_64BIT")])
  
  (define_mode_iterator ANYI_QUAD_TRUNC [SI (DI "TARGET_64BIT")])
***************
*** 169,178 ****
--- 172,190 ----
  ;; the controlling mode.
  (define_mode_attr HALFMODE [(DF "SI") (DI "SI") (TF "DI")])
  
+ ;; Give the number of bits in the mode
+ (define_mode_attr sizen [(QI "8") (HI "16") (SI "32") (DI "64")])
+ 
  ; bitmanip mode attribute
  (define_mode_attr shiftm1 [(SI "const_si_mask_operand") (DI "const_di_mask_operand")])
  (define_mode_attr shiftm1p [(SI "DsS") (DI "DsD")])
  
+ ; mode shift limit attribute
+ (define_mode_attr sh_limit [(QI "7") (HI "15")])
+ 
+ ; mode shift bit limit attribute
+ (define_mode_attr sh_bit [(SI "5") (DI "6")])
+ 
  ; zcmp mode attribute
  (define_mode_attr slot0_offset  [(SI "-4")  (DI "-8")])
  (define_mode_attr slot1_offset  [(SI "-8")  (DI "-16")])
***************
*** 284,289 ****
--- 296,304 ----
  ;; <su> is like <u>, but the signed form expands to "s" rather than "".
  (define_code_attr su [(sign_extend "s") (zero_extend "u")])
  
+ ;; eq expand to "c" and ne expand to "s".
+ (define_code_attr cs [(eq "c") (ne "s")])
+ 
  ;; <optab> expands to the name of the optab for a particular code.
  (define_code_attr optab [(ashift "ashl")
  			 (ashiftrt "ashr")
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/predicates.md gcc-16-20250907/gcc/config/riscv/predicates.md
*** gcc-16-20250831/gcc/config/riscv/predicates.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/predicates.md	Sun Sep  7 22:32:58 2025
***************
*** 483,488 ****
--- 483,492 ----
    (ior (match_operand 0 "const_int6_operand")
         (match_operand 0 "register_operand")))
  
+ (define_predicate "const_int5_operand"
+   (and (match_code "const_int")
+        (match_test "IN_RANGE (INTVAL (op), 0, 31)")))
+ 
  (define_predicate "const_int5s_operand"
    (and (match_code "const_int")
         (match_test "IN_RANGE (INTVAL (op), -16, 15)")))
***************
*** 728,730 ****
--- 732,772 ----
  (define_predicate "reg_or_const_int_operand"
    (ior (match_operand 0 "const_int_operand")
         (match_operand 0 "register_operand")))
+ 
+ ;; Branch-on-bit for AndesPerf.
+ (define_predicate "ads_branch_bbcs_operand"
+   (match_code "const_int")
+ {
+   if (TARGET_XANDESPERF && (INTVAL (op) >= 0))
+     {
+       if (TARGET_64BIT && INTVAL (op) <= 63)
+ 	return true;
+       else if (INTVAL (op) <=31)
+ 	return true;
+       else
+ 	return false;
+     }
+ 
+   return false;
+ })
+ 
+ ;; Branch on small immediate range.
+ (define_predicate "ads_branch_bimm_operand"
+   (match_code "const_int")
+ {
+   if (TARGET_XANDESPERF)
+     return satisfies_constraint_Ou07 (op);
+   else
+     return false;
+ })
+ 
+ (define_predicate "ads_imm_extract_operand"
+   (match_test "satisfies_constraint_ads__Bext (op)"))
+ 
+ (define_predicate "ads_extract_size_imm_si"
+   (and (match_code "const_int")
+ 	   (match_test "IN_RANGE (INTVAL (op), 1, 32)")))
+ 
+ (define_predicate "ads_extract_size_imm_di"
+   (and (match_code "const_int")
+ 	   (match_test "IN_RANGE (INTVAL (op), 1, 64)")))
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-avlprop.cc gcc-16-20250907/gcc/config/riscv/riscv-avlprop.cc
*** gcc-16-20250831/gcc/config/riscv/riscv-avlprop.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-avlprop.cc	Sun Sep  7 22:32:58 2025
*************** pass_avlprop::execute (function *fn)
*** 535,541 ****
  	      && !m_avl_propagations->get (candidate.second)
  	      && imm_avl_p (vtype_mode))
  	    {
! 	      rtx new_avl = gen_int_mode (GET_MODE_NUNITS (vtype_mode), Pmode);
  	      simplify_replace_vlmax_avl (rinsn, new_avl);
  	    }
  	}
--- 535,548 ----
  	      && !m_avl_propagations->get (candidate.second)
  	      && imm_avl_p (vtype_mode))
  	    {
! 	      /* For segmented operations AVL refers to a single register and
! 		 not all NF registers.  Therefore divide the mode size by NF
! 		 to obtain the proper AVL.  */
! 	      int nf = 1;
! 	      if (riscv_v_ext_tuple_mode_p (vtype_mode))
! 		nf = get_nf (vtype_mode);
! 	      rtx new_avl = gen_int_mode
! 	      (GET_MODE_NUNITS (vtype_mode).to_constant () / nf, Pmode);
  	      simplify_replace_vlmax_avl (rinsn, new_avl);
  	    }
  	}
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-builtins.cc gcc-16-20250907/gcc/config/riscv/riscv-builtins.cc
*** gcc-16-20250831/gcc/config/riscv/riscv-builtins.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-builtins.cc	Sun Sep  7 22:32:58 2025
*************** AVAIL (cvalu, TARGET_XCVALU && !TARGET_6
*** 137,142 ****
--- 137,147 ----
  AVAIL (cvelw, TARGET_XCVELW && !TARGET_64BIT)
  AVAIL (cvsimd, TARGET_XCVSIMD && !TARGET_64BIT)
  
+ /* ANDES AVAIL.  */
+ AVAIL (andesperf32, !TARGET_64BIT && TARGET_XANDESPERF)
+ AVAIL (andesperf64, TARGET_64BIT && TARGET_XANDESPERF)
+ AVAIL (andesbfhcvt, TARGET_XANDESBFHCVT)
+ 
  /* Construct a riscv_builtin_description from the given arguments.
  
     INSN is the name of the associated instruction pattern, without the
*************** AVAIL (cvsimd, TARGET_XCVSIMD && !TARGET
*** 191,198 ****
--- 196,206 ----
  #define RISCV_ATYPE_QI intQI_type_node
  #define RISCV_ATYPE_HI intHI_type_node
  #define RISCV_ATYPE_SI intSI_type_node
+ #define RISCV_ATYPE_DI intDI_type_node
  #define RISCV_ATYPE_VOID_PTR ptr_type_node
  #define RISCV_ATYPE_INT_PTR integer_ptr_type_node
+ #define RISCV_ATYPE_BF bfloat16_type_node
+ #define RISCV_ATYPE_SF float_type_node
  
  /* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists
     their associated RISCV_ATYPEs.  */
*************** static const struct riscv_builtin_descri
*** 212,217 ****
--- 220,226 ----
    #include "riscv-cmo.def"
    #include "riscv-scalar-crypto.def"
    #include "corev.def"
+   #include "andes.def"
  
    DIRECT_BUILTIN (frflags, RISCV_USI_FTYPE, hard_float),
    DIRECT_NO_TARGET_BUILTIN (fsflags, RISCV_VOID_FTYPE_USI, hard_float),
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-c.cc gcc-16-20250907/gcc/config/riscv/riscv-c.cc
*** gcc-16-20250831/gcc/config/riscv/riscv-c.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-c.cc	Sun Sep  7 22:32:58 2025
*************** along with GCC; see the file COPYING3.
*** 34,110 ****
  
  #define builtin_define(TXT) cpp_define (pfile, TXT)
  
- struct pragma_intrinsic_flags
- {
-   int intrinsic_riscv_isa_flags;
- 
-   int intrinsic_riscv_vector_elen_flags;
-   int intrinsic_riscv_zvl_subext;
-   int intrinsic_riscv_zvb_subext;
-   int intrinsic_riscv_zvk_subext;
- };
- 
- static void
- riscv_pragma_intrinsic_flags_pollute (struct pragma_intrinsic_flags *flags)
- {
-   flags->intrinsic_riscv_isa_flags = riscv_isa_flags;
-   flags->intrinsic_riscv_vector_elen_flags = riscv_vector_elen_flags;
-   flags->intrinsic_riscv_zvl_subext = riscv_zvl_subext;
-   flags->intrinsic_riscv_zvb_subext = riscv_zvb_subext;
-   flags->intrinsic_riscv_zvk_subext = riscv_zvk_subext;
- 
-   riscv_isa_flags = riscv_isa_flags
-     | MASK_VECTOR;
- 
-   riscv_zvl_subext = riscv_zvl_subext
-     | MASK_ZVL32B
-     | MASK_ZVL64B
-     | MASK_ZVL128B
-     | MASK_ZVL256B
-     | MASK_ZVL512B
-     | MASK_ZVL1024B
-     | MASK_ZVL2048B
-     | MASK_ZVL4096B;
- 
-   riscv_vector_elen_flags = riscv_vector_elen_flags
-     | MASK_VECTOR_ELEN_32
-     | MASK_VECTOR_ELEN_64
-     | MASK_VECTOR_ELEN_FP_16
-     | MASK_VECTOR_ELEN_FP_32
-     | MASK_VECTOR_ELEN_FP_64;
- 
-   riscv_zvb_subext = riscv_zvb_subext
-     | MASK_ZVBB
-     | MASK_ZVBC
-     | MASK_ZVKB;
- 
-   riscv_zvk_subext = riscv_zvk_subext
-     | MASK_ZVKG
-     | MASK_ZVKNED
-     | MASK_ZVKNHA
-     | MASK_ZVKNHB
-     | MASK_ZVKSED
-     | MASK_ZVKSH
-     | MASK_ZVKN
-     | MASK_ZVKNC
-     | MASK_ZVKNG
-     | MASK_ZVKS
-     | MASK_ZVKSC
-     | MASK_ZVKSG
-     | MASK_ZVKT;
- }
- 
- static void
- riscv_pragma_intrinsic_flags_restore (struct pragma_intrinsic_flags *flags)
- {
-   riscv_isa_flags = flags->intrinsic_riscv_isa_flags;
- 
-   riscv_vector_elen_flags = flags->intrinsic_riscv_vector_elen_flags;
-   riscv_zvl_subext = flags->intrinsic_riscv_zvl_subext;
-   riscv_zvb_subext = flags->intrinsic_riscv_zvb_subext;
-   riscv_zvk_subext = flags->intrinsic_riscv_zvk_subext;
- }
- 
  static int
  riscv_ext_version_value (unsigned major, unsigned minor)
  {
--- 34,39 ----
*************** riscv_pragma_intrinsic (cpp_reader *)
*** 278,297 ****
        || strcmp (name, "xtheadvector") == 0
        || strcmp (name, "xsfvcp") == 0)
      {
-       struct pragma_intrinsic_flags backup_flags;
- 
-       riscv_pragma_intrinsic_flags_pollute (&backup_flags);
- 
-       riscv_option_override ();
-       init_adjust_machine_modes ();
-       riscv_vector::reinit_builtins ();
        riscv_vector::handle_pragma_vector ();
- 
-       riscv_pragma_intrinsic_flags_restore (&backup_flags);
- 
-       /* Re-initialize after the flags are restored.  */
-       riscv_option_override ();
-       init_adjust_machine_modes ();
      }
    else
      error ("unknown %<#pragma riscv intrinsic%> option %qs", name);
--- 207,213 ----
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-cores.def gcc-16-20250907/gcc/config/riscv/riscv-cores.def
*** gcc-16-20250831/gcc/config/riscv/riscv-cores.def	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-cores.def	Sun Sep  7 22:32:58 2025
*************** RISCV_TUNE("sifive-5-series", generic, r
*** 40,46 ****
  RISCV_TUNE("sifive-7-series", sifive_7, sifive_7_tune_info)
  RISCV_TUNE("sifive-p400-series", sifive_p400, sifive_p400_tune_info)
  RISCV_TUNE("sifive-p600-series", sifive_p600, sifive_p600_tune_info)
! RISCV_TUNE("tt-ascalon-d8", generic_ooo, tt_ascalon_d8_tune_info)
  RISCV_TUNE("thead-c906", generic, thead_c906_tune_info)
  RISCV_TUNE("xt-c908", generic, generic_ooo_tune_info)
  RISCV_TUNE("xt-c908v", generic, generic_ooo_tune_info)
--- 40,46 ----
  RISCV_TUNE("sifive-7-series", sifive_7, sifive_7_tune_info)
  RISCV_TUNE("sifive-p400-series", sifive_p400, sifive_p400_tune_info)
  RISCV_TUNE("sifive-p600-series", sifive_p600, sifive_p600_tune_info)
! RISCV_TUNE("tt-ascalon-d8", tt_ascalon_d8, tt_ascalon_d8_tune_info)
  RISCV_TUNE("thead-c906", generic, thead_c906_tune_info)
  RISCV_TUNE("xt-c908", generic, generic_ooo_tune_info)
  RISCV_TUNE("xt-c908v", generic, generic_ooo_tune_info)
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-ext-andes.def gcc-16-20250907/gcc/config/riscv/riscv-ext-andes.def
*** gcc-16-20250831/gcc/config/riscv/riscv-ext-andes.def	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/config/riscv/riscv-ext-andes.def	Sun Sep  7 22:32:58 2025
***************
*** 0 ****
--- 1,100 ----
+ /* Andes extension definition file for RISC-V.
+    Copyright (C) 2025 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+ 
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING3.  If not see
+ <http://www.gnu.org/licenses/>.
+ 
+ Please run `make riscv-regen` in build folder to make sure updated anything.
+ 
+ Format of DEFINE_RISCV_EXT, please refer to riscv-ext.def.  */
+ 
+ DEFINE_RISCV_EXT(
+   /* NAME */ xandesperf,
+   /* UPPERCASE_NAME */ XANDESPERF,
+   /* FULL_NAME */ "Andes performace extension",
+   /* DESC */ "",
+   /* URL */ ,
+   /* DEP_EXTS */ ({}),
+   /* SUPPORTED_VERSIONS */ ({{5, 0}}),
+   /* FLAG_GROUP */ xandes,
+   /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+   /* EXTRA_EXTENSION_FLAGS */ 0)
+ 
+ DEFINE_RISCV_EXT(
+   /* NAME */ xandesbfhcvt,
+   /* UPPERCASE_NAME */ XANDESBFHCVT,
+   /* FULL_NAME */ "Andes bfloat16 conversion extension",
+   /* DESC */ "",
+   /* URL */ ,
+   /* DEP_EXTS */ ({}),
+   /* SUPPORTED_VERSIONS */ ({{5, 0}}),
+   /* FLAG_GROUP */ xandes,
+   /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+   /* EXTRA_EXTENSION_FLAGS */ 0)
+ 
+ DEFINE_RISCV_EXT(
+   /* NAME */ xandesvbfhcvt,
+   /* UPPERCASE_NAME */ XANDESVBFHCVT,
+   /* FULL_NAME */ "Andes vector bfloat16 conversion extension",
+   /* DESC */ "",
+   /* URL */ ,
+   /* DEP_EXTS */ ({}),
+   /* SUPPORTED_VERSIONS */ ({{5, 0}}),
+   /* FLAG_GROUP */ xandes,
+   /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+   /* EXTRA_EXTENSION_FLAGS */ 0)
+ 
+ DEFINE_RISCV_EXT(
+   /* NAME */ xandesvsintload,
+   /* UPPERCASE_NAME */ XANDESVSINTLOAD,
+   /* FULL_NAME */ "Andes vector INT4 load extension",
+   /* DESC */ "",
+   /* URL */ ,
+   /* DEP_EXTS */ ({}),
+   /* SUPPORTED_VERSIONS */ ({{5, 0}}),
+   /* FLAG_GROUP */ xandes,
+   /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+   /* EXTRA_EXTENSION_FLAGS */ 0)
+ 
+ DEFINE_RISCV_EXT(
+   /* NAME */ xandesvpackfph,
+   /* UPPERCASE_NAME */ XANDESVPACKFPH,
+   /* FULL_NAME */ "Andes vector packed FP16 extension",
+   /* DESC */ "",
+   /* URL */ ,
+   /* DEP_EXTS */ ({}),
+   /* SUPPORTED_VERSIONS */ ({{5, 0}}),
+   /* FLAG_GROUP */ xandes,
+   /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+   /* EXTRA_EXTENSION_FLAGS */ 0)
+ 
+ DEFINE_RISCV_EXT(
+   /* NAME */ xandesvdot,
+   /* UPPERCASE_NAME */ XANDESVDOT,
+   /* FULL_NAME */ "Andes vector dot product extension",
+   /* DESC */ "",
+   /* URL */ ,
+   /* DEP_EXTS */ ({}),
+   /* SUPPORTED_VERSIONS */ ({{5, 0}}),
+   /* FLAG_GROUP */ xandes,
+   /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED,
+   /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED,
+   /* EXTRA_EXTENSION_FLAGS */ 0)
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-ext.def gcc-16-20250907/gcc/config/riscv/riscv-ext.def
*** gcc-16-20250831/gcc/config/riscv/riscv-ext.def	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-ext.def	Sun Sep  7 22:32:58 2025
*************** DEFINE_RISCV_EXT(
*** 2083,2085 ****
--- 2083,2086 ----
  #include "riscv-ext-thead.def"
  #include "riscv-ext-ventana.def"
  #include "riscv-ext-mips.def"
+ #include "riscv-ext-andes.def"
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-ext.opt gcc-16-20250907/gcc/config/riscv/riscv-ext.opt
*** gcc-16-20250831/gcc/config/riscv/riscv-ext.opt	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-ext.opt	Sun Sep  7 22:32:58 2025
*************** TargetVariable
*** 44,49 ****
--- 44,52 ----
  int riscv_sv_subext
  
  TargetVariable
+ int riscv_xandes_subext
+ 
+ TargetVariable
  int riscv_xcv_subext
  
  TargetVariable
*************** Mask(SVADE) Var(riscv_sv_subext)
*** 400,405 ****
--- 403,420 ----
  
  Mask(SVBARE) Var(riscv_sv_subext)
  
+ Mask(XANDESPERF) Var(riscv_xandes_subext)
+ 
+ Mask(XANDESBFHCVT) Var(riscv_xandes_subext)
+ 
+ Mask(XANDESVBFHCVT) Var(riscv_xandes_subext)
+ 
+ Mask(XANDESVSINTLOAD) Var(riscv_xandes_subext)
+ 
+ Mask(XANDESVPACKFPH) Var(riscv_xandes_subext)
+ 
+ Mask(XANDESVDOT) Var(riscv_xandes_subext)
+ 
  Mask(XCVALU) Var(riscv_xcv_subext)
  
  Mask(XCVBI) Var(riscv_xcv_subext)
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-ftypes.def gcc-16-20250907/gcc/config/riscv/riscv-ftypes.def
*** gcc-16-20250831/gcc/config/riscv/riscv-ftypes.def	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-ftypes.def	Sun Sep  7 22:32:58 2025
*************** DEF_RISCV_FTYPE (1, (USI, UQI))
*** 37,42 ****
--- 37,44 ----
  DEF_RISCV_FTYPE (1, (USI, UHI))
  DEF_RISCV_FTYPE (1, (SI, QI))
  DEF_RISCV_FTYPE (1, (SI, HI))
+ DEF_RISCV_FTYPE (1, (BF, SF))
+ DEF_RISCV_FTYPE (1, (SF, BF))
  DEF_RISCV_FTYPE (2, (USI, UQI, UQI))
  DEF_RISCV_FTYPE (2, (USI, USI, UHI))
  DEF_RISCV_FTYPE (2, (USI, USI, QI))
*************** DEF_RISCV_FTYPE (2, (UDI, UDI, USI))
*** 52,57 ****
--- 54,60 ----
  DEF_RISCV_FTYPE (2, (UDI, UDI, UDI))
  DEF_RISCV_FTYPE (2, (SI, USI, USI))
  DEF_RISCV_FTYPE (2, (SI, SI, SI))
+ DEF_RISCV_FTYPE (2, (DI, UDI, UDI))
  DEF_RISCV_FTYPE (3, (USI, USI, USI, UQI))
  DEF_RISCV_FTYPE (3, (USI, USI, USI, QI))
  DEF_RISCV_FTYPE (3, (USI, USI, UQI, USI))
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-opts.h gcc-16-20250907/gcc/config/riscv/riscv-opts.h
*** gcc-16-20250831/gcc/config/riscv/riscv-opts.h	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-opts.h	Sun Sep  7 22:32:58 2025
*************** enum riscv_microarchitecture_type {
*** 60,65 ****
--- 60,66 ----
    xiangshan,
    generic_ooo,
    mips_p8700,
+   tt_ascalon_d8,
  };
  extern enum riscv_microarchitecture_type riscv_microarchitecture;
  
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-v.cc gcc-16-20250907/gcc/config/riscv/riscv-v.cc
*** gcc-16-20250831/gcc/config/riscv/riscv-v.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-v.cc	Sun Sep  7 22:32:58 2025
*************** imm_avl_p (machine_mode mode)
*** 63,82 ****
  {
    poly_uint64 nunits = GET_MODE_NUNITS (mode);
  
    return nunits.is_constant ()
  	   /* The vsetivli can only hold register 0~31.  */
! 	   ? (IN_RANGE (nunits.to_constant (), 0, 31))
  	   /* Only allowed in VLS-VLMAX mode.  */
  	   : false;
  }
  
! /* Return true if LEN is equal to NUNITS that out of the range [0, 31].  */
  static bool
  is_vlmax_len_p (machine_mode mode, rtx len)
  {
    poly_int64 value;
    return poly_int_rtx_p (len, &value)
! 	 && known_eq (value, GET_MODE_NUNITS (mode));
  }
  
  /* Helper functions for insn_flags && insn_types */
--- 63,99 ----
  {
    poly_uint64 nunits = GET_MODE_NUNITS (mode);
  
+   /* For segmented operations AVL refers to a single register and not all NF
+      registers.  Therefore divide the mode size by NF before checking if it is
+      in range.  */
+   int nf = 1;
+   if (riscv_v_ext_tuple_mode_p (mode))
+     nf = get_nf (mode);
+ 
    return nunits.is_constant ()
  	   /* The vsetivli can only hold register 0~31.  */
! 	   ? (IN_RANGE (nunits.to_constant () / nf, 0, 31))
  	   /* Only allowed in VLS-VLMAX mode.  */
  	   : false;
  }
  
! /* Return true if LEN equals the number of units in MODE if MODE is either a
!    VLA mode or MODE is a VLS mode its size equals the vector size.
!    In that case we can emit a VLMAX insn which can be optimized more easily
!    by the vsetvl pass.  */
! 
  static bool
  is_vlmax_len_p (machine_mode mode, rtx len)
  {
    poly_int64 value;
+   if (poly_int_rtx_p (len, &value)
+       && known_eq (value, GET_MODE_NUNITS (mode))
+       && known_eq (GET_MODE_UNIT_SIZE (mode) * value, BYTES_PER_RISCV_VECTOR))
+     return true;
+ 
    return poly_int_rtx_p (len, &value)
!     && !GET_MODE_NUNITS (mode).is_constant ()
!     && known_eq (value, GET_MODE_NUNITS (mode));
  }
  
  /* Helper functions for insn_flags && insn_types */
*************** expand_vec_perm (rtx target, rtx op0, rt
*** 3313,3327 ****
    mask_mode = get_mask_mode (data_mode);
    rtx mask = gen_reg_rtx (mask_mode);
    rtx max_sel = gen_const_vector_dup (sel_mode, nunits);
  
    /* Step 1: generate a mask that should select everything >= nunits into the
     * mask.  */
    expand_vec_cmp (mask, GEU, sel_mod, max_sel);
  
!   /* Step2: gather every op0 values indexed by sel into target,
  	    we don't need to care about the result of the element
  	    whose index >= nunits.  */
!   emit_vlmax_gather_insn (target, op0, sel_mod);
  
    /* Step3: shift the range from (nunits, max_of_mode] to
  	    [0, max_of_mode - nunits].  */
--- 3330,3346 ----
    mask_mode = get_mask_mode (data_mode);
    rtx mask = gen_reg_rtx (mask_mode);
    rtx max_sel = gen_const_vector_dup (sel_mode, nunits);
+   bool overlap = reg_overlap_mentioned_p (target, op1);
+   rtx tmp_target = overlap ? gen_reg_rtx (data_mode) : target;
  
    /* Step 1: generate a mask that should select everything >= nunits into the
     * mask.  */
    expand_vec_cmp (mask, GEU, sel_mod, max_sel);
  
!   /* Step2: gather every op0 values indexed by sel into TMP_TARGET,
  	    we don't need to care about the result of the element
  	    whose index >= nunits.  */
!   emit_vlmax_gather_insn (tmp_target, op0, sel_mod);
  
    /* Step3: shift the range from (nunits, max_of_mode] to
  	    [0, max_of_mode - nunits].  */
*************** expand_vec_perm (rtx target, rtx op0, rt
*** 3331,3337 ****
  
    /* Step4: gather those into the previously masked-out elements
  	    of target.  */
!   emit_vlmax_masked_gather_mu_insn (target, op1, tmp, mask);
  }
  
  /* Implement TARGET_VECTORIZE_VEC_PERM_CONST for RVV.  */
--- 3350,3359 ----
  
    /* Step4: gather those into the previously masked-out elements
  	    of target.  */
!   emit_vlmax_masked_gather_mu_insn (tmp_target, op1, tmp, mask);
! 
!   if (overlap)
!     emit_move_insn (target, tmp_target);
  }
  
  /* Implement TARGET_VECTORIZE_VEC_PERM_CONST for RVV.  */
*************** expand_strided_load (machine_mode mode,
*** 4465,4477 ****
    int idx = 4;
    get_else_operand (ops[idx++]);
    rtx len = ops[idx];
-   poly_int64 len_val;
  
    insn_code icode = code_for_pred_strided_load (mode);
    rtx emit_ops[] = {v_reg, mask, gen_rtx_MEM (mode, base), stride};
  
!   if (poly_int_rtx_p (len, &len_val)
!       && known_eq (len_val, GET_MODE_NUNITS (mode)))
      emit_vlmax_insn (icode, BINARY_OP_TAMA, emit_ops);
    else
      {
--- 4487,4497 ----
    int idx = 4;
    get_else_operand (ops[idx++]);
    rtx len = ops[idx];
  
    insn_code icode = code_for_pred_strided_load (mode);
    rtx emit_ops[] = {v_reg, mask, gen_rtx_MEM (mode, base), stride};
  
!   if (is_vlmax_len_p (mode, len))
      emit_vlmax_insn (icode, BINARY_OP_TAMA, emit_ops);
    else
      {
*************** expand_strided_store (machine_mode mode,
*** 4489,4499 ****
    rtx stride = ops[1];
    rtx mask = ops[3];
    rtx len = ops[4];
-   poly_int64 len_val;
    rtx vl_type;
  
!   if (poly_int_rtx_p (len, &len_val)
!       && known_eq (len_val, GET_MODE_NUNITS (mode)))
      {
        len = gen_reg_rtx (Pmode);
        emit_vlmax_vsetvl (mode, len);
--- 4509,4517 ----
    rtx stride = ops[1];
    rtx mask = ops[3];
    rtx len = ops[4];
    rtx vl_type;
  
!   if (is_vlmax_len_p (mode, len))
      {
        len = gen_reg_rtx (Pmode);
        emit_vlmax_vsetvl (mode, len);
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins-shapes.cc gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins-shapes.cc
*** gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins-shapes.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins-shapes.cc	Sun Sep  7 22:32:58 2025
*************** build_all (function_builder &b, const fu
*** 127,133 ****
    static CONSTEXPR const DEF##_def VAR##_obj; \
    namespace shapes { const function_shape *const VAR = &VAR##_obj; }
  
! #define BASE_NAME_MAX_LEN 17
  
  /* Base class for build.  */
  struct build_base : public function_shape
--- 127,133 ----
    static CONSTEXPR const DEF##_def VAR##_obj; \
    namespace shapes { const function_shape *const VAR = &VAR##_obj; }
  
! #define BASE_NAME_MAX_LEN 20
  
  /* Base class for build.  */
  struct build_base : public function_shape
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins-types.def gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins-types.def
*** gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins-types.def	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins-types.def	Sun Sep  7 22:32:58 2025
*************** along with GCC; see the file COPYING3. I
*** 381,386 ****
--- 381,404 ----
  #define DEF_RVV_X2_WU_OPS(TYPE, REQUIRE)
  #endif
  
+ /* Use "DEF_RVV_Q_OPS" macro include all quad signed integer which will be
+    iterated and registered as intrinsic functions.  */
+ #ifndef DEF_RVV_Q_OPS
+ #define DEF_RVV_Q_OPS(TYPE, REQUIRE)
+ #endif
+ 
+ /* Use "DEF_RVV_QU_OPS" macro include all quad unsigned integer which will be
+    iterated and registered as intrinsic functions.  */
+ #ifndef DEF_RVV_QU_OPS
+ #define DEF_RVV_QU_OPS(TYPE, REQUIRE)
+ #endif
+ 
+ /* Use "DEF_RVV_F16_OPS" macro include all types for vfloat16
+    which will be iterated and registered as intrinsic functions.  */
+ #ifndef DEF_RVV_F16_OPS
+ #define DEF_RVV_F16_OPS(TYPE, REQUIRE)
+ #endif
+ 
  DEF_RVV_I_OPS (vint8mf8_t, RVV_REQUIRE_ELEN_64)
  DEF_RVV_I_OPS (vint8mf4_t, 0)
  DEF_RVV_I_OPS (vint8mf2_t, 0)
*************** DEF_RVV_X2_WU_OPS (vuint32m1_t, 0)
*** 1501,1506 ****
--- 1519,1547 ----
  DEF_RVV_X2_WU_OPS (vuint32m2_t, 0)
  DEF_RVV_X2_WU_OPS (vuint32m4_t, 0)
  
+ DEF_RVV_Q_OPS (vint8mf8_t, RVV_REQUIRE_ELEN_64)
+ DEF_RVV_Q_OPS (vint8mf4_t, 0)
+ DEF_RVV_Q_OPS (vint8mf2_t, 0)
+ DEF_RVV_Q_OPS (vint8m1_t, 0)
+ DEF_RVV_Q_OPS (vint8m2_t, 0)
+ DEF_RVV_Q_OPS (vint8m4_t, 0)
+ DEF_RVV_Q_OPS (vint8m8_t, 0)
+ 
+ DEF_RVV_QU_OPS (vuint8mf8_t, RVV_REQUIRE_ELEN_64)
+ DEF_RVV_QU_OPS (vuint8mf4_t, 0)
+ DEF_RVV_QU_OPS (vuint8mf2_t, 0)
+ DEF_RVV_QU_OPS (vuint8m1_t, 0)
+ DEF_RVV_QU_OPS (vuint8m2_t, 0)
+ DEF_RVV_QU_OPS (vuint8m4_t, 0)
+ DEF_RVV_QU_OPS (vuint8m8_t, 0)
+ 
+ DEF_RVV_F16_OPS (vfloat16mf4_t, RVV_REQUIRE_ELEN_FP_16 | RVV_REQUIRE_ELEN_64)
+ DEF_RVV_F16_OPS (vfloat16mf2_t, RVV_REQUIRE_ELEN_FP_16)
+ DEF_RVV_F16_OPS (vfloat16m1_t, RVV_REQUIRE_ELEN_FP_16)
+ DEF_RVV_F16_OPS (vfloat16m2_t, RVV_REQUIRE_ELEN_FP_16)
+ DEF_RVV_F16_OPS (vfloat16m4_t, RVV_REQUIRE_ELEN_FP_16)
+ DEF_RVV_F16_OPS (vfloat16m8_t, RVV_REQUIRE_ELEN_FP_16)
+ 
  #undef DEF_RVV_I_OPS
  #undef DEF_RVV_U_OPS
  #undef DEF_RVV_F_OPS
*************** DEF_RVV_X2_WU_OPS (vuint32m4_t, 0)
*** 1559,1561 ****
--- 1600,1605 ----
  #undef DEF_RVV_XFQF_OPS
  #undef DEF_RVV_X2_U_OPS
  #undef DEF_RVV_X2_WU_OPS
+ #undef DEF_RVV_Q_OPS
+ #undef DEF_RVV_QU_OPS
+ #undef DEF_RVV_F16_OPS
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins.cc gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins.cc
*** gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins.cc	Sun Sep  7 22:32:58 2025
***************
*** 52,57 ****
--- 52,58 ----
  #include "riscv-vector-builtins-shapes.h"
  #include "riscv-vector-builtins-bases.h"
  #include "sifive-vector-builtins-bases.h"
+ #include "andes-vector-builtins-bases.h"
  
  using namespace riscv_vector;
  
*************** static const rvv_type_info xfqf_ops[] =
*** 571,576 ****
--- 572,595 ----
  #include "riscv-vector-builtins-types.def"
    {NUM_VECTOR_TYPES, 0}};
  
+ /* A list of all vint8m_t will be registered for intrinsic functions.  */
+ static const rvv_type_info q_ops[] = {
+ #define DEF_RVV_Q_OPS(TYPE, REQUIRE) {VECTOR_TYPE_##TYPE, REQUIRE},
+ #include "riscv-vector-builtins-types.def"
+   {NUM_VECTOR_TYPES, 0}};
+ 
+ /* A list of all vuint8m_t will be registered for intrinsic functions.  */
+ static const rvv_type_info qu_ops[] = {
+ #define DEF_RVV_QU_OPS(TYPE, REQUIRE) {VECTOR_TYPE_##TYPE, REQUIRE},
+ #include "riscv-vector-builtins-types.def"
+   {NUM_VECTOR_TYPES, 0}};
+ 
+ /* A list of FP16 will be registered for intrinsic functions.  */
+ static const rvv_type_info f16_ops[] = {
+ #define DEF_RVV_F16_OPS(TYPE, REQUIRE) {VECTOR_TYPE_##TYPE, REQUIRE},
+ #include "riscv-vector-builtins-types.def"
+   {NUM_VECTOR_TYPES, 0}};
+ 
  static CONSTEXPR const rvv_arg_type_info rvv_arg_type_info_end
    = rvv_arg_type_info (NUM_BASE_TYPES);
  
*************** static CONSTEXPR const rvv_arg_type_info
*** 678,683 ****
--- 697,715 ----
  
  /* A list of args for vector_type func (vector_type, vector_type, vector_type)
   * function.  */
+ static CONSTEXPR const rvv_arg_type_info vqq_args[]
+   = {rvv_arg_type_info (RVV_BASE_vector),
+      rvv_arg_type_info (RVV_BASE_quad_fixed_vector),
+      rvv_arg_type_info (RVV_BASE_quad_fixed_vector), rvv_arg_type_info_end};
+ 
+ static CONSTEXPR const rvv_arg_type_info su_vqq_args[]
+   = {rvv_arg_type_info (RVV_BASE_vector),
+      rvv_arg_type_info (RVV_BASE_quad_fixed_vector),
+      rvv_arg_type_info (RVV_BASE_quad_fixed_unsigned_vector),
+      rvv_arg_type_info_end};
+ 
+ /* A list of args for vector_type func (vector_type, vector_type, vector_type)
+  * function.  */
  static CONSTEXPR const rvv_arg_type_info vxv_args[]
    = {rvv_arg_type_info (RVV_BASE_vector), rvv_arg_type_info (RVV_BASE_scalar),
       rvv_arg_type_info (RVV_BASE_vector), rvv_arg_type_info_end};
*************** static CONSTEXPR const rvv_arg_type_info
*** 1224,1229 ****
--- 1256,1271 ----
       rvv_arg_type_info (RVV_BASE_scalar_float),
       rvv_arg_type_info_end};
  
+ /* A list of args for vector_type func (const void_type *) function.  */
+ static CONSTEXPR const rvv_arg_type_info void_const_ptr_args[]
+   = {rvv_arg_type_info (RVV_BASE_void_const_ptr), rvv_arg_type_info_end};
+ 
+ /* A list of args for vector_type func (vector_type, widen_lmul1_scalar)
+    function.  */
+ static CONSTEXPR const rvv_arg_type_info vw_args[]
+   = {rvv_arg_type_info (RVV_BASE_vector),
+      rvv_arg_type_info (RVV_BASE_float32), rvv_arg_type_info_end};
+ 
  /* A list of none preds that will be registered for intrinsic functions.  */
  static CONSTEXPR const predication_type_index none_preds[]
    = {PRED_TYPE_none, NUM_PRED_TYPES};
*************** static CONSTEXPR const rvv_op_info all_v
*** 3080,3085 ****
--- 3122,3183 ----
       rvv_arg_type_info (RVV_BASE_void), /* Return type  */
       scalar_ptr_index_args /* Args */};
  
+ /* A static operand information for vector_type func (vector_type)
+  * function registration.  */
+ static CONSTEXPR const rvv_op_info f32_to_bf16_nf_w_ops
+   = {f32_ops,						      /* Types */
+      OP_TYPE_s,						      /* Suffix */
+      rvv_arg_type_info (RVV_BASE_double_trunc_bfloat_vector), /* Return type */
+      v_args /* Args */};
+ 
+ /* A static operand information for vector_type func (vector_type)
+  * function registration.  */
+ static CONSTEXPR const rvv_op_info bf16_to_f32_wf_v_ops
+   = {f32_ops,				  /* Types */
+      OP_TYPE_bf16,			  /* Suffix */
+      rvv_arg_type_info (RVV_BASE_vector), /* Return type */
+      bf_w_v_args /* Args */};
+ 
+ /* A static operand information for vector_type func (const void_type *)
+  * function registration. */
+ static CONSTEXPR const rvv_op_info q_v_void_const_ptr_ops
+   = {q_ops,				  /* Types */
+      OP_TYPE_v,				  /* Suffix */
+      rvv_arg_type_info (RVV_BASE_vector), /* Return type */
+      void_const_ptr_args /* Args */};
+ 
+ /* A static operand information for vector_type func (const void_type *)
+  * function registration. */
+ static CONSTEXPR const rvv_op_info qu_v_void_const_ptr_ops
+   = {qu_ops,				  /* Types */
+      OP_TYPE_v,				  /* Suffix */
+      rvv_arg_type_info (RVV_BASE_vector), /* Return type */
+      void_const_ptr_args /* Args */};
+ 
+ static CONSTEXPR const rvv_op_info f16_vvw_ops
+   = {f16_ops,				  /* Types */
+      OP_TYPE_vf,			  /* Suffix */
+      rvv_arg_type_info (RVV_BASE_vector), /* Return type */
+      vw_args /* Args */};
+ 
+ static CONSTEXPR const rvv_op_info qexti_vvvv_ops
+   = {qexti_ops,				  /* Types */
+      OP_TYPE_vv,			  /* Suffix */
+      rvv_arg_type_info (RVV_BASE_vector), /* Return type */
+      vqq_args /* Args */};
+ 
+ static CONSTEXPR const rvv_op_info qexti_su_vvvv_ops
+   = {qexti_ops,				  /* Types */
+      OP_TYPE_vv,			  /* Suffix */
+      rvv_arg_type_info (RVV_BASE_vector), /* Return type */
+      su_vqq_args /* Args */};
+ 
+ static CONSTEXPR const rvv_op_info qextu_vvvv_ops
+   = {qextu_ops,				  /* Types */
+      OP_TYPE_vv,			  /* Suffix */
+      rvv_arg_type_info (RVV_BASE_vector), /* Return type */
+      vqq_args /* Args */};
+ 
  /* A static operand information for vector_type func (vector_type).
     Some insns just supports SEW=32, such as the crypto vector Zvkg extension.
   * function registration.  */
*************** static CONSTEXPR const function_type_inf
*** 3376,3381 ****
--- 3474,3480 ----
      VECTOR_TYPE_INVALID,                                                       \
      VECTOR_TYPE_INVALID,                                                       \
      VECTOR_TYPE_INVALID,                                                       \
+     VECTOR_TYPE_INVALID,                                                       \
      VECTOR_TYPE_##SIGNED_EEW8_INDEX,                                           \
      VECTOR_TYPE_##EEW8_INDEX,                                                  \
      VECTOR_TYPE_##EEW16_INDEX,                                                 \
*************** static function_group_info function_grou
*** 3449,3454 ****
--- 3548,3557 ----
  #define DEF_RVV_FUNCTION(NAME, SHAPE, PREDS, OPS_INFO)                         \
    {#NAME, &bases::NAME, &shapes::SHAPE, PREDS, OPS_INFO, REQUIRED_EXTENSIONS},
  #include "sifive-vector-builtins-functions.def"
+ #define DEF_RVV_FUNCTION(NAME, SHAPE, PREDS, OPS_INFO)                         \
+   {#NAME, &bases::NAME, &shapes::SHAPE, PREDS, OPS_INFO, REQUIRED_EXTENSIONS},
+ #include "andes-vector-builtins-functions.def"
+ 
  };
  
  /* The RVV types, with their built-in
*************** static hash_table<registered_function_ha
*** 3474,3479 ****
--- 3577,3647 ----
  static hash_table<non_overloaded_registered_function_hasher>
    *non_overloaded_function_table;
  
+ struct pragma_intrinsic_flags
+ {
+   int intrinsic_riscv_isa_flags;
+   int intrinsic_riscv_base_subext;
+ 
+   int intrinsic_riscv_vector_elen_flags;
+   int intrinsic_riscv_zvl_subext;
+   int intrinsic_riscv_zvf_subext;
+ };
+ 
+ static void
+ riscv_pragma_intrinsic_flags_pollute (struct pragma_intrinsic_flags *flags)
+ {
+   /* We already defer the required extension checking to expantion time, so we
+      only need to pollute those flags that might affect the type registration.
+ 
+      e.g. zvfbmin and zvfhmin are required to define the vector bf16 and f16,
+ 	  and VECTOR_ELEN* also required for vector interger and floating
+ 	  type.  */
+   flags->intrinsic_riscv_isa_flags = riscv_isa_flags;
+   flags->intrinsic_riscv_base_subext = riscv_base_subext;
+   flags->intrinsic_riscv_vector_elen_flags = riscv_vector_elen_flags;
+   flags->intrinsic_riscv_zvl_subext = riscv_zvl_subext;
+   flags->intrinsic_riscv_zvf_subext = riscv_zvf_subext;
+ 
+   riscv_zvf_subext = riscv_zvf_subext
+     | MASK_ZVFBFMIN
+     | MASK_ZVFHMIN;
+ 
+   riscv_isa_flags = riscv_isa_flags
+     | MASK_VECTOR;
+ 
+   riscv_base_subext = riscv_base_subext
+     | MASK_MUL;
+ 
+   riscv_zvl_subext = riscv_zvl_subext
+     | MASK_ZVL32B
+     | MASK_ZVL64B
+     | MASK_ZVL128B
+     | MASK_ZVL256B
+     | MASK_ZVL512B
+     | MASK_ZVL1024B
+     | MASK_ZVL2048B
+     | MASK_ZVL4096B;
+ 
+   riscv_vector_elen_flags = riscv_vector_elen_flags
+     | MASK_VECTOR_ELEN_32
+     | MASK_VECTOR_ELEN_64
+     | MASK_VECTOR_ELEN_FP_16
+     | MASK_VECTOR_ELEN_FP_32
+     | MASK_VECTOR_ELEN_FP_64
+     | MASK_VECTOR_ELEN_BF_16;
+ }
+ 
+ static void
+ riscv_pragma_intrinsic_flags_restore (struct pragma_intrinsic_flags *flags)
+ {
+   riscv_isa_flags = flags->intrinsic_riscv_isa_flags;
+   riscv_base_subext = flags->intrinsic_riscv_base_subext;
+ 
+   riscv_vector_elen_flags = flags->intrinsic_riscv_vector_elen_flags;
+   riscv_zvl_subext = flags->intrinsic_riscv_zvl_subext;
+   riscv_zvf_subext = flags->intrinsic_riscv_zvf_subext;
+ }
+ 
  /* RAII class for enabling enough RVV features to define the built-in
     types and implement the riscv_vector.h pragma.
  
*************** static hash_table<non_overloaded_registe
*** 3486,3506 ****
  class rvv_switcher
  {
  public:
!   rvv_switcher ();
    ~rvv_switcher ();
  
  private:
    bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
  };
  
! rvv_switcher::rvv_switcher ()
  {
    /* Set have_regs_of_mode before targetm.init_builtins ().  */
    memcpy (m_old_have_regs_of_mode, have_regs_of_mode,
  	  sizeof (have_regs_of_mode));
    for (int i = 0; i < NUM_MACHINE_MODES; ++i)
      if (riscv_v_ext_vector_mode_p ((machine_mode) i))
        have_regs_of_mode[i] = true;
  }
  
  rvv_switcher::~rvv_switcher ()
--- 3654,3695 ----
  class rvv_switcher
  {
  public:
!   rvv_switcher (bool pollute_flags = true);
    ~rvv_switcher ();
  
  private:
    bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
+   struct pragma_intrinsic_flags backup_flags;
+   bool m_pollute_flags;
  };
  
! static void
! register_builtin_types_on_null ();
! 
! rvv_switcher::rvv_switcher (bool pollute_flags)
!   : m_pollute_flags (pollute_flags)
  {
+   if (m_pollute_flags)
+     {
+       riscv_pragma_intrinsic_flags_pollute (&backup_flags);
+       riscv_option_override ();
+     }
+ 
    /* Set have_regs_of_mode before targetm.init_builtins ().  */
    memcpy (m_old_have_regs_of_mode, have_regs_of_mode,
  	  sizeof (have_regs_of_mode));
    for (int i = 0; i < NUM_MACHINE_MODES; ++i)
      if (riscv_v_ext_vector_mode_p ((machine_mode) i))
        have_regs_of_mode[i] = true;
+ 
+   /* Not necessary to adjust mode and register type if we don't pollute
+      flags.  */
+   if (m_pollute_flags)
+     {
+       init_adjust_machine_modes ();
+ 
+       register_builtin_types_on_null ();
+     }
  }
  
  rvv_switcher::~rvv_switcher ()
*************** rvv_switcher::~rvv_switcher ()
*** 3508,3513 ****
--- 3697,3711 ----
    /* Recover back have_regs_of_mode.  */
    memcpy (have_regs_of_mode, m_old_have_regs_of_mode,
  	  sizeof (have_regs_of_mode));
+ 
+   if (m_pollute_flags)
+     {
+       riscv_pragma_intrinsic_flags_restore (&backup_flags);
+ 
+       /* Re-initialize after the flags are restored.  */
+       riscv_option_override ();
+       init_adjust_machine_modes ();
+     }
  }
  
  /* Add attribute NAME to ATTRS.  */
*************** register_tuple_type (vector_type_index t
*** 3664,3689 ****
  static void
  register_builtin_types ()
  {
!   /* Get type node from get_typenode_from_name to prevent we have different type
!      node define in different target libraries, e.g. int32_t defined as
!      `long` in RV32/newlib-stdint, but `int` for RV32/glibc-stdint.h.
!      NOTE: uint[16|32|64]_type_node already defined in tree.h.  */
!   tree int8_type_node = get_typenode_from_name (INT8_TYPE);
!   tree uint8_type_node = get_typenode_from_name (UINT8_TYPE);
!   tree int16_type_node = get_typenode_from_name (INT16_TYPE);
!   tree int32_type_node = get_typenode_from_name (INT32_TYPE);
!   tree int64_type_node = get_typenode_from_name (INT64_TYPE);
! 
!   machine_mode mode;
! #define DEF_RVV_TYPE(NAME, NCHARS, ABI_NAME, SCALAR_TYPE, VECTOR_MODE,         \
! 		     ARGS...)                                                  \
!   mode = VECTOR_MODE##mode;                                                    \
!   register_builtin_type (VECTOR_TYPE_##NAME, SCALAR_TYPE##_type_node, mode);
! #define DEF_RVV_TUPLE_TYPE(NAME, NCHARS, ABI_NAME, SUBPART_TYPE, SCALAR_TYPE,  \
! 			   NF, VECTOR_SUFFIX)                                  \
!   register_tuple_type (VECTOR_TYPE_##NAME, VECTOR_TYPE_##SUBPART_TYPE,         \
! 		       SCALAR_TYPE##_type_node, NF);
! #include "riscv-vector-builtins.def"
  }
  
  /* Similar as register_builtin_types but perform the registration if and
--- 3862,3871 ----
  static void
  register_builtin_types ()
  {
!   /* Don't pollute flags at this stage to make sure we only register type with
!      what we want so far, we will register all type if necessary later.   */
!   rvv_switcher rvv (/* pollute_flags */ false);
!   register_builtin_types_on_null ();
  }
  
  /* Similar as register_builtin_types but perform the registration if and
*************** required_extensions_p (enum rvv_base_typ
*** 3795,3819 ****
    gcc_unreachable ();
  }
  
- static uint64_t
- get_required_extensions (vector_type_index type_idx)
- {
-   for (unsigned int i = 0; all_ops[i].index != NUM_VECTOR_TYPES; i++)
-     if (type_idx == all_ops[i].index)
-       return all_ops[i].required_extensions;
-   for (unsigned int i = 0; b_ops[i].index != NUM_VECTOR_TYPES; i++)
-     if (type_idx == b_ops[i].index)
-       return b_ops[i].required_extensions;
-   gcc_unreachable ();
- }
- 
  /* Check whether all the RVV_REQUIRE_* values in REQUIRED_EXTENSIONS are
!    enabled.  */
  static bool
  check_required_extensions (const function_instance &instance)
  {
    rvv_type_info type_info = instance.type;
-   uint64_t required_extensions = type_info.required_extensions;
    const rvv_op_info *op_info = instance.op_info;
  
    if (required_extensions_p (op_info->ret.base_type))
--- 3977,3991 ----
    gcc_unreachable ();
  }
  
  /* Check whether all the RVV_REQUIRE_* values in REQUIRED_EXTENSIONS are
!    enabled.
!    TODO: We defer the required extensions to expantion time, this function is
! 	 only doing the legality now, and we may rename this function and moving
! 	 to another layer.  */
  static bool
  check_required_extensions (const function_instance &instance)
  {
    rvv_type_info type_info = instance.type;
    const rvv_op_info *op_info = instance.op_info;
  
    if (required_extensions_p (op_info->ret.base_type))
*************** check_required_extensions (const functio
*** 3822,3869 ****
  	= op_info->ret.get_function_type_index (type_info.index);
        if (ret_type_idx == NUM_VECTOR_TYPES)
  	return false;
-       required_extensions |= get_required_extensions (ret_type_idx);
      }
  
    for (unsigned i = 0; op_info->args[i].base_type != NUM_BASE_TYPES; ++i)
      {
        if (!required_extensions_p (op_info->args[i].base_type))
  	continue;
- 
        enum vector_type_index vector_type
  	= op_info->args[i].get_function_type_index (type_info.index);
        if (vector_type == NUM_VECTOR_TYPES)
  	return false;
-       required_extensions |= get_required_extensions (vector_type);
- 
-       /* According to RVV ISA, EEW=64 index of indexed loads/stores require
- 	 XLEN = 64.  */
-       if (op_info->args[i].base_type == RVV_BASE_eew64_index)
- 	required_extensions |= RVV_REQUIRE_RV64BIT;
      }
  
-   uint64_t isa_flags = 0;
- 
-   if (TARGET_VECTOR_ELEN_BF_16)
-     isa_flags |= RVV_REQUIRE_ELEN_BF_16;
-   if (TARGET_VECTOR_ELEN_FP_16)
-     isa_flags |= RVV_REQUIRE_ELEN_FP_16;
-   if (TARGET_VECTOR_ELEN_FP_32)
-     isa_flags |= RVV_REQUIRE_ELEN_FP_32;
-   if (TARGET_VECTOR_ELEN_FP_64)
-     isa_flags |= RVV_REQUIRE_ELEN_FP_64;
-   if (TARGET_VECTOR_ELEN_64)
-     isa_flags |= RVV_REQUIRE_ELEN_64;
-   if (TARGET_64BIT)
-     isa_flags |= RVV_REQUIRE_RV64BIT;
-   if (TARGET_FULL_V)
-     isa_flags |= RVV_REQUIRE_FULL_V;
-   if (TARGET_MIN_VLEN > 32)
-     isa_flags |= RVV_REQUIRE_MIN_VLEN_64;
- 
-   uint64_t missing_extensions = required_extensions & ~isa_flags;
-   if (missing_extensions != 0)
-     return false;
    return true;
  }
  
--- 3994,4011 ----
*************** function_instance::get_return_type () co
*** 4044,4049 ****
--- 4186,4197 ----
    return op_info->ret.get_tree_type (type.index);
  }
  
+ bool
+ function_instance::function_returns_void_p () const
+ {
+   return get_return_type () == void_type_node;
+ }
+ 
  tree
  function_instance::get_arg_type (unsigned opno) const
  {
*************** function_builder::add_function (const fu
*** 4316,4322 ****
       nodes and remove the target hook. For now, however, we need to appease the
       validation and return a non-NULL, non-error_mark_node node, so we
       arbitrarily choose integer_zero_node.  */
!   tree decl = placeholder_p
  		? integer_zero_node
  		: simulate_builtin_function_decl (input_location, name, fntype,
  						  code, NULL, attrs);
--- 4464,4470 ----
       nodes and remove the target hook. For now, however, we need to appease the
       validation and return a non-NULL, non-error_mark_node node, so we
       arbitrarily choose integer_zero_node.  */
!   tree decl = placeholder_p || in_lto_p
  		? integer_zero_node
  		: simulate_builtin_function_decl (input_location, name, fntype,
  						  code, NULL, attrs);
*************** builtin_type_p (const_tree type)
*** 5094,5121 ****
  void
  init_builtins ()
  {
-   rvv_switcher rvv;
-   if (!TARGET_VECTOR)
-     return;
-   register_builtin_types ();
-   if (in_lto_p)
-     handle_pragma_vector ();
- }
- 
- /* Reinitialize builtins similar to init_builtins,  but only the null
-    builtin types will be registered.  */
- void
- reinit_builtins ()
- {
-   rvv_switcher rvv;
- 
-   if (!TARGET_VECTOR)
-     return;
- 
-   register_builtin_types_on_null ();
- 
    if (in_lto_p)
      handle_pragma_vector ();
  }
  
  /* Implement TARGET_VERIFY_TYPE_CONTEXT for RVV types.  */
--- 5242,5256 ----
  void
  init_builtins ()
  {
    if (in_lto_p)
+     /* "pragma vector" will register type during the process. */
      handle_pragma_vector ();
+   else
+     {
+       if (!TARGET_VECTOR)
+ 	return;
+       register_builtin_types ();
+     }
  }
  
  /* Implement TARGET_VERIFY_TYPE_CONTEXT for RVV types.  */
*************** handle_pragma_vector ()
*** 5281,5290 ****
    function_table = new hash_table<registered_function_hasher> (1023);
    function_builder builder;
    for (unsigned int i = 0; i < ARRAY_SIZE (function_groups); ++i)
!   {
!     if (function_groups[i].match (function_groups[i].required_extensions))
!       builder.register_function_group (function_groups[i]);
!   }
  }
  
  /* Return the function decl with RVV function subcode CODE, or error_mark_node
--- 5416,5422 ----
    function_table = new hash_table<registered_function_hasher> (1023);
    function_builder builder;
    for (unsigned int i = 0; i < ARRAY_SIZE (function_groups); ++i)
!     builder.register_function_group (function_groups[i]);
  }
  
  /* Return the function decl with RVV function subcode CODE, or error_mark_node
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins.def gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins.def
*** gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins.def	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins.def	Sun Sep  7 22:32:58 2025
*************** DEF_RVV_OP_TYPE (v_vvw)
*** 663,668 ****
--- 663,669 ----
  DEF_RVV_OP_TYPE (v_xvw)
  DEF_RVV_OP_TYPE (v_ivw)
  DEF_RVV_OP_TYPE (v_fvw)
+ DEF_RVV_OP_TYPE (bf16)
  
  DEF_RVV_PRED_TYPE (ta)
  DEF_RVV_PRED_TYPE (tu)
*************** DEF_RVV_BASE_TYPE (size, size_type_node)
*** 698,703 ****
--- 699,705 ----
  DEF_RVV_BASE_TYPE (ptrdiff, ptrdiff_type_node)
  DEF_RVV_BASE_TYPE (unsigned_long, long_unsigned_type_node)
  DEF_RVV_BASE_TYPE (long, long_integer_type_node)
+ DEF_RVV_BASE_TYPE (float32, float32_type_node)
  DEF_RVV_BASE_TYPE (signed_eew8_index, get_vector_type (type_idx))
  DEF_RVV_BASE_TYPE (eew8_index, get_vector_type (type_idx))
  DEF_RVV_BASE_TYPE (eew16_index, get_vector_type (type_idx))
*************** DEF_RVV_BASE_TYPE (size_ptr, build_point
*** 757,762 ****
--- 759,765 ----
  DEF_RVV_BASE_TYPE (tuple_subpart, get_tuple_subpart_type (type_idx))
  DEF_RVV_BASE_TYPE (xfqf_float, get_xfqf_float_type (type_idx))
  DEF_RVV_BASE_TYPE (scalar_float, get_scalar_float_type (type_idx))
+ DEF_RVV_BASE_TYPE (void_const_ptr, const_ptr_type_node)
  
  DEF_RVV_VXRM_ENUM (RNU, VXRM_RNU)
  DEF_RVV_VXRM_ENUM (RNE, VXRM_RNE)
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins.h gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins.h
*** gcc-16-20250831/gcc/config/riscv/riscv-vector-builtins.h	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv-vector-builtins.h	Sun Sep  7 22:32:58 2025
*************** enum required_ext
*** 131,136 ****
--- 131,140 ----
    XSFVQMACCDOD_EXT,	/* XSFVQMACCDOD extension */
    XSFVFNRCLIPXFQF_EXT,	/* XSFVFNRCLIPXFQF extension */
    XSFVCP_EXT, /* XSFVCP extension*/
+   XANDESVBFHCVT_EXT,    /* XANDESVBFHCVT extension */
+   XANDESVSINTLOAD_EXT,  /* XANDESVSINTLOAD extension */
+   XANDESVPACKFPH_EXT,   /* XANDESVPACKFPH extension */
+   XANDESVDOT_EXT,       /* XANDESVDOT extension */
    /* Please update below to isa_name func when add or remove enum type(s).  */
  };
  
*************** static inline const char * required_ext_
*** 172,177 ****
--- 176,189 ----
        return "xsfvfnrclipxfqf";
      case XSFVCP_EXT:
        return "xsfvcp";
+     case XANDESVBFHCVT_EXT:
+       return "xandesvbfhcvt";
+     case XANDESVSINTLOAD_EXT:
+       return "xandesvsintload";
+     case XANDESVPACKFPH_EXT:
+       return "xandesvpackfph";
+     case XANDESVDOT_EXT:
+       return "xandesvdot";
      default:
        gcc_unreachable ();
    }
*************** static inline bool required_extensions_s
*** 217,222 ****
--- 229,242 ----
        return TARGET_XSFVFNRCLIPXFQF;
      case XSFVCP_EXT:
        return TARGET_XSFVCP;
+     case XANDESVBFHCVT_EXT:
+       return TARGET_XANDESVBFHCVT;
+     case XANDESVSINTLOAD_EXT:
+       return TARGET_XANDESVSINTLOAD;
+     case XANDESVPACKFPH_EXT:
+       return TARGET_XANDESVPACKFPH;
+     case XANDESVDOT_EXT:
+       return TARGET_XANDESVDOT;
      default:
        gcc_unreachable ();
    }
*************** public:
*** 377,382 ****
--- 397,403 ----
    bool any_type_float_p () const;
  
    tree get_return_type () const;
+   bool function_returns_void_p () const;
    tree get_arg_type (unsigned opno) const;
  
    /* The properties of the function.  (The explicit "enum"s are required
*************** class function_call_info : public functi
*** 432,439 ****
  public:
    function_call_info (location_t, const function_instance &, tree);
  
-   bool function_returns_void_p ();
- 
    /* The location of the call.  */
    location_t location;
  
--- 453,458 ----
*************** public:
*** 441,453 ****
    tree fndecl;
  };
  
- /* Return true if the function has no return value.  */
- inline bool
- function_call_info::function_returns_void_p ()
- {
-   return TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node;
- }
- 
  /* A class for folding a gimple function call.  */
  class gimple_folder : public function_call_info
  {
--- 460,465 ----
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv.cc gcc-16-20250907/gcc/config/riscv/riscv.cc
*** gcc-16-20250831/gcc/config/riscv/riscv.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv.cc	Sun Sep  7 22:32:58 2025
*************** riscv_legitimize_move (machine_mode mode
*** 3686,3692 ****
  	 not enabled.  In that case we just want to let the standard
  	 expansion path run.  */
        if (riscv_vector::get_vector_mode (smode, nunits).exists (&vmode)
! 	  && gen_lowpart_common (vmode, SUBREG_REG (src)))
  	{
  	  rtx v = gen_lowpart (vmode, SUBREG_REG (src));
  	  rtx int_reg = dest;
--- 3686,3693 ----
  	 not enabled.  In that case we just want to let the standard
  	 expansion path run.  */
        if (riscv_vector::get_vector_mode (smode, nunits).exists (&vmode)
! 	  && gen_lowpart_common (vmode, SUBREG_REG (src))
! 	  && convert_optab_handler (vec_extract_optab, vmode, smode))
  	{
  	  rtx v = gen_lowpart (vmode, SUBREG_REG (src));
  	  rtx int_reg = dest;
*************** riscv_extend_cost (rtx op, bool unsigned
*** 3933,3938 ****
--- 3934,3943 ----
    if (MEM_P (op))
      return 0;
  
+   /* Andes bfo patterns.  */
+   if (TARGET_XANDESPERF)
+     return COSTS_N_INSNS (1);
+ 
    if (unsigned_p && GET_MODE (op) == QImode)
      /* We can use ANDI.  */
      return COSTS_N_INSNS (1);
*************** riscv_rtx_costs (rtx x, machine_mode mod
*** 4162,4167 ****
--- 4167,4178 ----
        return false;
  
      case AND:
+       /* Andes bfo patterns.  */
+       if (TARGET_XANDESPERF && GET_CODE (XEXP (x, 0)) == ASHIFT)
+ 	{
+ 	  *total = COSTS_N_INSNS (1);
+ 	  return true;
+ 	}
        /* slli.uw pattern for zba.  */
        if (TARGET_ZBA && TARGET_64BIT && mode == DImode
  	  && GET_CODE (XEXP (x, 0)) == ASHIFT)
*************** riscv_rtx_costs (rtx x, machine_mode mod
*** 4221,4226 ****
--- 4232,4244 ----
        return false;
  
      case ZERO_EXTRACT:
+       /* Andes bbcs patterns.  */
+       if (TARGET_XANDESPERF
+ 	  && (outer_code == NE || outer_code == EQ))
+ 	{
+ 	  *total = 0;
+ 	  return true;
+ 	}
        /* This is an SImode shift.  */
        if (outer_code == SET
  	  && CONST_INT_P (XEXP (x, 1))
*************** riscv_rtx_costs (rtx x, machine_mode mod
*** 4248,4253 ****
--- 4266,4277 ----
  	  *total = COSTS_N_INSNS (SINGLE_SHIFT_COST);
  	  return true;
  	}
+       /* Andes bfo patterns.  */
+       if (TARGET_XANDESPERF)
+ 	{
+ 	  *total = COSTS_N_INSNS (1);
+ 	  return true;
+ 	}
        return false;
  
      case ASHIFT:
*************** riscv_rtx_costs (rtx x, machine_mode mod
*** 4416,4421 ****
--- 4440,4454 ----
  	  } while (false);
  	}
  
+       /* Andes lea patterns.  */
+       if (TARGET_XANDESPERF
+ 	  && ((TARGET_64BIT && GET_CODE (XEXP (x, 0)) == AND)
+ 	      || GET_CODE (XEXP (x, 0)) == ASHIFT))
+ 	{
+ 	  *total = COSTS_N_INSNS (1);
+ 	  return true;
+ 	}
+ 
        if (float_mode_p)
  	*total = tune_param->fp_add[mode == DFmode];
        else
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/riscv.md gcc-16-20250907/gcc/config/riscv/riscv.md
*** gcc-16-20250831/gcc/config/riscv/riscv.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/riscv.md	Sun Sep  7 22:32:58 2025
***************
*** 672,678 ****
  ;; Microarchitectures we know how to tune for.
  ;; Keep this in sync with enum riscv_microarchitecture.
  (define_attr "tune"
!   "generic,sifive_7,sifive_p400,sifive_p600,xiangshan,generic_ooo,mips_p8700"
    (const (symbol_ref "((enum attr_tune) riscv_microarchitecture)")))
  
  ;; Describe a user's asm statement.
--- 672,678 ----
  ;; Microarchitectures we know how to tune for.
  ;; Keep this in sync with enum riscv_microarchitecture.
  (define_attr "tune"
!   "generic,sifive_7,sifive_p400,sifive_p600,xiangshan,generic_ooo,mips_p8700,tt_ascalon_d8"
    (const (symbol_ref "((enum attr_tune) riscv_microarchitecture)")))
  
  ;; Describe a user's asm statement.
***************
*** 1864,1871 ****
    [(set (match_operand:BF    0 "register_operand" "=f")
  	(float_truncate:BF
  	   (match_operand:SF 1 "register_operand" " f")))]
!   "TARGET_ZFBFMIN"
!   "fcvt.bf16.s\t%0,%1"
    [(set_attr "type" "fcvt")
     (set_attr "mode" "BF")])
  
--- 1864,1876 ----
    [(set (match_operand:BF    0 "register_operand" "=f")
  	(float_truncate:BF
  	   (match_operand:SF 1 "register_operand" " f")))]
!   "TARGET_ZFBFMIN || TARGET_XANDESBFHCVT"
! {
!   if (TARGET_ZFBFMIN)
!     return "fcvt.bf16.s\t%0,%1";
!   else
!     return "nds.fcvt.bf16.s\t%0,%1";
! }
    [(set_attr "type" "fcvt")
     (set_attr "mode" "BF")])
  
***************
*** 1912,1917 ****
--- 1917,1923 ----
  	(zero_extend:DI
  	    (match_operand:SI 1 "nonimmediate_operand" " r,m")))]
    "TARGET_64BIT && !TARGET_ZBA && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX
+    && !TARGET_XANDESPERF
     && !(REG_P (operands[1]) && VL_REG_P (REGNO (operands[1])))"
    "@
     #
***************
*** 1938,1944 ****
    [(set (match_operand:GPR    0 "register_operand"     "=r,r")
  	(zero_extend:GPR
  	    (match_operand:HI 1 "nonimmediate_operand" " r,m")))]
!   "!TARGET_ZBB && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX"
    "@
     #
     lhu\t%0,%1"
--- 1944,1951 ----
    [(set (match_operand:GPR    0 "register_operand"     "=r,r")
  	(zero_extend:GPR
  	    (match_operand:HI 1 "nonimmediate_operand" " r,m")))]
!   "!TARGET_ZBB && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX
!    && !TARGET_XANDESPERF"
    "@
     #
     lhu\t%0,%1"
***************
*** 2000,2006 ****
    [(set (match_operand:DI     0 "register_operand"     "=r,r")
  	(sign_extend:DI
  	    (match_operand:SI 1 "nonimmediate_operand" " r,m")))]
!   "TARGET_64BIT && !TARGET_XTHEADMEMIDX"
    "@
     sext.w\t%0,%1
     lw\t%0,%1"
--- 2007,2013 ----
    [(set (match_operand:DI     0 "register_operand"     "=r,r")
  	(sign_extend:DI
  	    (match_operand:SI 1 "nonimmediate_operand" " r,m")))]
!   "TARGET_64BIT && !TARGET_XTHEADMEMIDX && !TARGET_XANDESPERF"
    "@
     sext.w\t%0,%1
     lw\t%0,%1"
***************
*** 2017,2023 ****
    [(set (match_operand:SUPERQI   0 "register_operand"     "=r,r")
  	(sign_extend:SUPERQI
  	    (match_operand:SHORT 1 "nonimmediate_operand" " r,m")))]
!   "!TARGET_ZBB && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX"
    "@
     #
     l<SHORT:size>\t%0,%1"
--- 2024,2031 ----
    [(set (match_operand:SUPERQI   0 "register_operand"     "=r,r")
  	(sign_extend:SUPERQI
  	    (match_operand:SHORT 1 "nonimmediate_operand" " r,m")))]
!   "!TARGET_ZBB && !TARGET_XTHEADBB && !TARGET_XTHEADMEMIDX
!    && !TARGET_XANDESPERF"
    "@
     #
     l<SHORT:size>\t%0,%1"
***************
*** 2049,2056 ****
    [(set (match_operand:SF    0 "register_operand" "=f")
  	(float_extend:SF
  	   (match_operand:BF 1 "register_operand" " f")))]
!   "TARGET_ZFBFMIN"
!   "fcvt.s.bf16\t%0,%1"
    [(set_attr "type" "fcvt")
     (set_attr "mode" "SF")])
  
--- 2057,2069 ----
    [(set (match_operand:SF    0 "register_operand" "=f")
  	(float_extend:SF
  	   (match_operand:BF 1 "register_operand" " f")))]
!   "TARGET_ZFBFMIN || TARGET_XANDESBFHCVT"
! {
!   if (TARGET_ZFBFMIN)
!     return "fcvt.s.bf16\t%0,%1";
!   else
!     return "nds.fcvt.s.bf16\t%0,%1";
! }
    [(set_attr "type" "fcvt")
     (set_attr "mode" "SF")])
  
***************
*** 3109,3114 ****
--- 3122,3128 ----
        || TARGET_XVENTANACONDOPS || TARGET_SFB_ALU)
       && (INTVAL (operands[2]) == 1))
     && !TARGET_XTHEADBB
+    && !TARGET_XANDESPERF
     && !(TARGET_64BIT
          && (INTVAL (operands[3]) > 0)
          && (INTVAL (operands[2]) + INTVAL (operands[3]) == 32))"
***************
*** 3494,3502 ****
  	    (label_ref (match_operand 1))
  	    (pc)))
     (clobber (match_scratch:X 4 "=&r"))]
!   ""
!   "#"
!   "reload_completed"
    [(set (match_dup 4)
  	(ashift:X (match_dup 2) (match_dup 3)))
     (set (pc)
--- 3508,3516 ----
  	    (label_ref (match_operand 1))
  	    (pc)))
     (clobber (match_scratch:X 4 "=&r"))]
!    "!TARGET_XANDESPERF"
!    "#"
!    "&& reload_completed"
    [(set (match_dup 4)
  	(ashift:X (match_dup 2) (match_dup 3)))
     (set (pc)
***************
*** 4932,4937 ****
--- 4946,4952 ----
  ;; Vendor extensions
  (include "thead.md")
  (include "corev.md")
+ (include "andes.md")
  ;; Pipeline models
  (include "generic.md")
  (include "xiangshan.md")
***************
*** 4941,4943 ****
--- 4956,4959 ----
  (include "sifive-p600.md")
  (include "generic-vector-ooo.md")
  (include "generic-ooo.md")
+ (include "tt-ascalon-d8.md")
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/sync.md gcc-16-20250907/gcc/config/riscv/sync.md
*** gcc-16-20250831/gcc/config/riscv/sync.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/sync.md	Sun Sep  7 22:32:58 2025
***************
*** 376,382 ****
     (match_operand:SI 3 "const_int_operand")] ;; model
    "TARGET_ZAAMO || TARGET_ZALRSC"
    {
!     if (TARGET_ZAAMO)
        emit_insn (gen_amo_atomic_exchange<mode> (operands[0], operands[1],
  					    operands[2], operands[3]));
      else
--- 376,394 ----
     (match_operand:SI 3 "const_int_operand")] ;; model
    "TARGET_ZAAMO || TARGET_ZALRSC"
    {
!     if (TARGET_ZAAMO && TARGET_64BIT && <MODE>mode == SImode)
!       {
! 	rtx t = gen_reg_rtx (DImode);
! 	emit_insn (gen_amo_atomic_exchange_extended (t,
! 						     operands[1],
! 						     operands[2],
! 						     operands[3]));
! 	t = gen_lowpart (SImode, t);
! 	SUBREG_PROMOTED_VAR_P (t) = 1;
! 	SUBREG_PROMOTED_SET (t, SRP_SIGNED);
! 	emit_move_insn (operands[0], t);
!       }
!     else if (TARGET_ZAAMO)
        emit_insn (gen_amo_atomic_exchange<mode> (operands[0], operands[1],
  					    operands[2], operands[3]));
      else
***************
*** 398,403 ****
--- 410,428 ----
    [(set_attr "type" "atomic")
     (set (attr "length") (const_int 4))])
  
+ (define_insn "amo_atomic_exchange_extended"
+   [(set (match_operand:DI 0 "register_operand" "=r")
+     (sign_extend:DI (unspec_volatile:SI
+       [(match_operand:SI 1 "memory_operand" "+A")
+        (match_operand:SI 3 "const_int_operand")] ;; model
+       UNSPEC_SYNC_EXCHANGE)))
+    (set (match_dup 1)
+     (match_operand:SI 2 "reg_or_0_operand" "rJ"))]
+   "TARGET_64BIT && TARGET_ZAAMO"
+   "amoswap.w%A3\t%0,%z2,%1"
+   [(set_attr "type" "atomic")
+    (set (attr "length") (const_int 4))])
+ 
  (define_insn "lrsc_atomic_exchange<mode>"
    [(set (match_operand:GPR 0 "register_operand" "=&r")
  	(unspec_volatile:GPR
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/t-riscv gcc-16-20250907/gcc/config/riscv/t-riscv
*** gcc-16-20250831/gcc/config/riscv/t-riscv	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/t-riscv	Sun Sep  7 22:32:58 2025
*************** RISCV_BUILTINS_H = $(srcdir)/config/risc
*** 3,8 ****
--- 3,9 ----
  		   $(srcdir)/config/riscv/riscv-vector-builtins-functions.def \
         $(srcdir)/config/riscv/thead-vector-builtins-functions.def \
         $(srcdir)/config/riscv/sifive-vector-builtins-functions.def \
+        $(srcdir)/config/riscv/andes-vector-builtins-functions.def \
  		   riscv-vector-type-indexer.gen.def
  
  riscv-builtins.o: $(srcdir)/config/riscv/riscv-builtins.cc $(CONFIG_H) \
*************** riscv-vector-builtins.o: $(srcdir)/confi
*** 26,31 ****
--- 27,33 ----
    $(srcdir)/config/riscv/riscv-vector-builtins-shapes.h \
    $(srcdir)/config/riscv/riscv-vector-builtins-bases.h \
    $(srcdir)/config/riscv/sifive-vector-builtins-bases.h \
+   $(srcdir)/config/riscv/andes-vector-builtins-bases.h \
    $(srcdir)/config/riscv/riscv-vector-builtins-types.def \
    $(srcdir)/config/riscv/sifive-vector-builtins-functions.def \
    $(RISCV_BUILTINS_H)
*************** sifive-vector-builtins-bases.o: \
*** 69,74 ****
--- 71,89 ----
  	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
  		$(srcdir)/config/riscv/sifive-vector-builtins-bases.cc
  
+ andes-vector-builtins-bases.o: \
+   $(srcdir)/config/riscv/andes-vector-builtins-bases.cc \
+   $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) $(RTL_H) \
+   $(TM_P_H) memmodel.h insn-codes.h $(OPTABS_H) $(RECOG_H) \
+   $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) fold-const.h $(GIMPLE_H) \
+   gimple-iterator.h gimplify.h explow.h $(EMIT_RTL_H) tree-vector-builder.h \
+   rtx-vector-builder.h \
+   $(srcdir)/config/riscv/riscv-vector-builtins-shapes.h \
+   $(srcdir)/config/riscv/andes-vector-builtins-bases.h \
+   $(RISCV_BUILTINS_H)
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+ 		$(srcdir)/config/riscv/andes-vector-builtins-bases.cc
+ 
  riscv-sr.o: $(srcdir)/config/riscv/riscv-sr.cc $(CONFIG_H) \
    $(SYSTEM_H) $(TM_H)
  	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
*************** RISCV_EXT_DEFS = \
*** 195,201 ****
    $(srcdir)/config/riscv/riscv-ext-sifive.def \
    $(srcdir)/config/riscv/riscv-ext-thead.def \
    $(srcdir)/config/riscv/riscv-ext-ventana.def \
!   $(srcdir)/config/riscv/riscv-ext-mips.def
  
  $(srcdir)/config/riscv/riscv-ext.opt: $(RISCV_EXT_DEFS)
  
--- 210,217 ----
    $(srcdir)/config/riscv/riscv-ext-sifive.def \
    $(srcdir)/config/riscv/riscv-ext-thead.def \
    $(srcdir)/config/riscv/riscv-ext-ventana.def \
!   $(srcdir)/config/riscv/riscv-ext-mips.def \
!   $(srcdir)/config/riscv/riscv-ext-andes.def
  
  $(srcdir)/config/riscv/riscv-ext.opt: $(RISCV_EXT_DEFS)
  
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/tt-ascalon-d8.md gcc-16-20250907/gcc/config/riscv/tt-ascalon-d8.md
*** gcc-16-20250831/gcc/config/riscv/tt-ascalon-d8.md	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/config/riscv/tt-ascalon-d8.md	Sun Sep  7 22:32:58 2025
***************
*** 0 ****
--- 1,353 ----
+ ;; Tenstorrent Ascalon 8 wide code scheduling model.
+ ;; Copyright (C) 2023-2025 Free Software Foundation, Inc.
+ ;;
+ ;; This file is part of GCC.
+ ;;
+ ;; GCC is free software; you can redistribute it and/or modify it
+ ;; under the terms of the GNU General Public License as published by
+ ;; the Free Software Foundation; either version 3, or (at your option)
+ ;; any later version.
+ ;;
+ ;; GCC is distributed in the hope that it will be useful, but
+ ;; WITHOUT ANY WARRANTY; without even the implied warranty of
+ ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ ;; General Public License for more details.
+ ;;
+ ;; You should have received a copy of the GNU General Public License
+ ;; along with GCC; see the file COPYING3.  If not see
+ ;; <http://www.gnu.org/licenses/>.
+ 
+ (define_automaton "tt_ascalon_d8")
+ 
+ ;; Ascalon has more issue/execution bandwidth than decode/retire bandwidth,
+ ;; so we model decode to place an upper limit on throughput.
+ (define_cpu_unit "asc-decode0,asc-decode1,asc-decode2,asc-decode3,asc-decode4,asc-decode5,asc-decode6,asc-decode7" "tt_ascalon_d8")
+ 
+ (define_cpu_unit "asc-lsu0,asc-lsu1,asc-lsu2" "tt_ascalon_d8")
+ (define_cpu_unit "asc-fxu0,asc-fxu1,asc-fxu2,asc-fxu3,asc-fxu4,asc-fxu5" "tt_ascalon_d8")
+ (define_cpu_unit "asc-fpu0,asc-fpu1" "tt_ascalon_d8")
+ (define_cpu_unit "asc-vec0,asc-vec1" "tt_ascalon_d8")
+ 
+ ;; Shortcuts
+ (define_reservation "tt_ascalon_d8_decode" "asc-decode0|asc-decode1|asc-decode2|asc-decode3|asc-decode4|asc-decode5|asc-decode6|asc-decode7")
+ (define_reservation "tt_ascalon_d8_ls" "asc-lsu0|asc-lsu1|asc-lsu2")
+ (define_reservation "tt_ascalon_d8_alu" "asc-fxu0|asc-fxu1|asc-fxu2|asc-fxu3|asc-fxu4|asc-fxu5")
+ (define_reservation "tt_ascalon_d8_mul" "asc-fxu0")
+ (define_reservation "tt_ascalon_d8_div" "asc-fxu0")
+ (define_reservation "tt_ascalon_d8_br" "asc-fxu2|asc-fxu3")
+ (define_reservation "tt_ascalon_d8_fp0" "asc-fpu0")
+ (define_reservation "tt_ascalon_d8_fp1" "asc-fpu1")
+ (define_reservation "tt_ascalon_d8_fp" "asc-fpu0|asc-fpu1")
+ (define_reservation "tt_ascalon_d8_vec0" "asc-vec0")
+ (define_reservation "tt_ascalon_d8_vec1" "asc-vec1")
+ (define_reservation "tt_ascalon_d8_vec" "asc-vec0|asc-vec1")
+ 
+ ;; Integer/float load/store
+ (define_insn_reservation "tt_ascalon_d8_int_load" 4
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "load,store,fpload,fpstore"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_ls")
+ 
+ ;; Generic integer instructions.
+ (define_insn_reservation "tt_ascalon_d8_alu" 1
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "unknown,const,arith,shift,slt,multi,auipc,nop,logical,\
+ 			move,bitmanip,rotate,min,max,minu,maxu,clz,ctz,atomic,\
+ 			condmove,mvpair,zicond"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_alu")
+ 
+ ;; Short forward branch
+ (define_insn_reservation "tt_ascalon_d8_sfb" 1
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "sfb_alu"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_br")
+ 
+ ;; Branch instructions
+ (define_insn_reservation "tt_ascalon_d8_branch" 1
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "branch,jump,call,jalr,ret,trap"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_br")
+ 
+ ;; Float move, convert and compare.
+ ;; INT -> FP moves are executed by the FXU and FP -> INT moves
+ ;; are executed by the FPU, but we can't model that at the moment.
+ (define_insn_reservation "tt_ascalon_d8_float_move" 4
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "fmove"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_fp")
+ 
+ (define_insn_reservation "tt_ascalon_d8_fcvt" 3
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "fcvt,fcvt_i2f,fcvt_f2i"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_fp")
+ 
+ (define_insn_reservation "tt_ascalon_d8_fcmp" 2
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "fcmp"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_fp")
+ 
+ ;; Integer multiplication.
+ (define_insn_reservation "tt_ascalon_d8_imul" 3
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "imul"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_mul")
+ 
+ ;; Integer division is not pipelined.  Do not block the unit for more than
+ ;; three cycles so the DFA does not get too large.  Similar for other
+ ;; non-pipelined instructions. Division is variable cycles so pick a value
+ ;; in the middle.
+ (define_insn_reservation "tt_ascalon_d8_idiv" 15
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "idiv"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_div,tt_ascalon_d8_div*3")
+ 
+ ;; Float addition.
+ (define_insn_reservation "tt_ascalon_d8_fadd" 2
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "fadd"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_fp")
+ 
+ ;; Float multiplication.
+ (define_insn_reservation "tt_ascalon_d8_mul" 3
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "fmul"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_fp")
+ 
+ ;; Float FMA.
+ (define_insn_reservation "tt_ascalon_d8_float_fma" 3
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "fmadd"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_fp")
+ 
+ ;; Float division.
+ (define_insn_reservation "tt_ascalon_d8_float_div_half" 6
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (and (eq_attr "type" "fdiv,fsqrt")
+ 	    (eq_attr "mode" "HF")))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_fp0*3 | tt_ascalon_d8_fp1*3)")
+ 
+ (define_insn_reservation "tt_ascalon_d8_float_div_single" 9
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (and (eq_attr "type" "fdiv,fsqrt")
+ 	    (eq_attr "mode" "SF")))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_fp0*3 | tt_ascalon_d8_fp1*3)")
+ 
+ (define_insn_reservation "tt_ascalon_d8_float_div_double" 16
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (and (eq_attr "type" "fdiv,fsqrt")
+ 	    (eq_attr "mode" "DF")))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_fp0*3 | tt_ascalon_d8_fp1*3)")
+ 
+ ;; Popcount and clmul.
+ (define_insn_reservation "tt_ascalon_d8_popcount" 1
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "cpop,clmul"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_alu")
+ 
+ ;; Vector loads and stores
+ (define_insn_reservation "tt_ascalon_d8_vec_load" 5
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vlde,vldm,vldff,vldr"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_ls")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_store" 5
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vste,vstm,vstr"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_ls")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_load_strided" 16
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vlds"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_ls")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_store_strided" 16
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vsts"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_ls")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_load_indexed" 16
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vldux,vldox"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_ls")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_store_indexed" 16
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vstux,vstox"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_ls")
+ 
+ ;; Vector segment loads/stores.
+ (define_insn_reservation "tt_ascalon_d8_vec_loadstore_seg" 11
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vlsegde,vlsegds,vlsegdux,vlsegdox,vlsegdff,\
+ 			vssegte,vssegts,vssegtux,vssegtox"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Regular vector operations and integer comparisons.
+ (define_insn_reservation "tt_ascalon_d8_vec_alu_1" 1
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vector,vialu,vicalu,viminmax,vimov,vmov,vfmov,\
+ 			vandn,vbrev,vbrev8,vrev8,vclz,vctz,vrol,vror"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_alu_2" 2
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vshift,vsshift,vsalu,vaalu,vext"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_alu_3" 3
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "viwalu,vnshift,vwsll,vicmp"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_alu_4" 4
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vnclip"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector float comparison, conversion etc.
+ (define_insn_reservation "tt_ascalon_d8_vec_fcmp" 3
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vfrecp,vfminmax,vfcmp,vfsgnj,vfclass,vfcvtitof,\
+ 			vfcvtftoi,vfwcvtitof,vfwcvtftoi,vfwcvtftof,vfncvtitof,\
+ 			vfncvtftoi,vfncvtftof,vfncvtbf16,vfwcvtbf16"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector integer multiplication.
+ (define_insn_reservation "tt_ascalon_d8_vec_imul" 4
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vimul,viwmul,vimuladd,viwmuladd,vsmul,vclmul,vclmulh,\
+ 			vghsh,vgmul"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector float addition.
+ (define_insn_reservation "tt_ascalon_d8_vec_fadd" 2
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vfalu,vfwalu"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector float multiplication and FMA.
+ (define_insn_reservation "tt_ascalon_d8_vec_fmul" 4
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vfmul,vfwmul,vfmuladd,vfwmuladd,vfwmaccbf16"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector population count.
+ (define_insn_reservation "tt_ascalon_d8_vec_pop" 2
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vcpop"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector crypto, AES.
+ (define_insn_reservation "tt_ascalon_d8_vec_crypto_aes" 3
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "crypto,vaesef,vaesem,vaesdf,vaesdm,vaeskf1,vaeskf2,vaesz"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector SHA.
+ (define_insn_reservation "tt_ascalon_d8_vec_crypto_sha" 4
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vsha2ms,vsha2ch,vsha2cl"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector permute.
+ (define_insn_reservation "tt_ascalon_d8_vec_perm_1" 1
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vimerge,vfmerge"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_perm_3" 3
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vislide1up,vislide1down,vfslide1up,vfslide1down,\
+ 			vgather,vcompress"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_perm_4" 4
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vslideup,vslidedown"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector reduction.
+ (define_insn_reservation "tt_ascalon_d8_vec_reduction" 4
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vired,viwred,vfredu,vfwredu"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector ordered reduction, assume the latency number is for
+ ;; a 256-bit vector.  We'll need to scale it similar to
+ ;; riscv_sched_adjust_cost for larger vectors.
+ ;; NOTE: The latency depends on the SEW, we should be checking it
+ (define_insn_reservation "tt_ascalon_d8_vec_ordered_reduction" 10
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vfredo,vfwredo"))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_vec0*3 | tt_ascalon_d8_vec1*3)")
+ 
+ ;; Vector integer division
+ (define_insn_reservation "tt_ascalon_d8_vec_idiv_half" 16
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vidiv")
+        (eq_attr "mode" "HF"))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_vec0*3 | tt_ascalon_d8_vec1*3)")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_idiv_single" 13
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vidiv")
+        (eq_attr "mode" "SF"))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_vec0*3 | tt_ascalon_d8_vec1*3)")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_idiv_double" 20
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vidiv")
+        (eq_attr "mode" "DF"))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_vec0*3 | tt_ascalon_d8_vec1*3)")
+ 
+ ;; Vector float divisions and sqrt
+ (define_insn_reservation "tt_ascalon_d8_vec_float_divsqrt_half" 11
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vfdiv,vfsqrt")
+        (eq_attr "mode" "HF"))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_vec0*3 | tt_ascalon_d8_vec1*3)")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_float_divsqrt_single" 10
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vfdiv,vfsqrt")
+        (eq_attr "mode" "SF"))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_vec0*3 | tt_ascalon_d8_vec1*3)")
+ 
+ (define_insn_reservation "tt_ascalon_d8_vec_float_divsqrt_double" 17
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vfdiv,vfsqrt")
+        (eq_attr "mode" "DF"))
+   "tt_ascalon_d8_decode,(tt_ascalon_d8_vec0*3 | tt_ascalon_d8_vec1*3)")
+ 
+ ;; Vector mask operations.
+ (define_insn_reservation "tt_ascalon_d8_vec_mask" 3
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vmalu,vmpop,vmffs,vmsfs,vmiota,vmidx,vimovvx,vimovxv,\
+ 			vfmovvf,vfmovfv"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector vsetvl.
+ (define_insn_reservation "tt_ascalon_d8_vec_vesetvl" 1
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "vsetvl,vsetvl_pre"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector rounding mode setters, assume pipeline barrier.
+ (define_insn_reservation "tt_ascalon_d8_vec_setrm" 20
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "wrvxrm,wrfrm"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec*3")
+ 
+ ;; Vector read vlen/vlenb.
+ (define_insn_reservation "tt_ascalon_d8_vec_readlen" 4
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "rdvlenb,rdvl"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
+ 
+ ;; Vector unknown.
+ (define_insn_reservation "tt_ascalon_d8_vec_unknown" 1
+   (and (eq_attr "tune" "tt_ascalon_d8")
+        (eq_attr "type" "sf_vc,sf_vc_se,sf_vqmacc,sf_vfnrclip,\
+ 			vsm3me,vsm4r,vsm4k,vsm3c,ghost,\
+ 			mfc,mtc,rdfrm"))
+   "tt_ascalon_d8_decode,tt_ascalon_d8_vec")
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/vector-iterators.md gcc-16-20250907/gcc/config/riscv/vector-iterators.md
*** gcc-16-20250831/gcc/config/riscv/vector-iterators.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/vector-iterators.md	Sun Sep  7 22:32:58 2025
***************
*** 4364,4370 ****
  			      (umax "%3,%4")
  			      (mult "%3,%4")])
  
! (define_code_attr sz [(sign_extend "s") (zero_extend "z")])
  
  ;; VLS modes that has NUNITS < 32.
  (define_mode_iterator VLS_AVL_IMM [
--- 4364,4370 ----
  			      (umax "%3,%4")
  			      (mult "%3,%4")])
  
! (define_code_attr sz [(sign_extend "s") (zero_extend "z") (sign_extract "s") (zero_extract "z")])
  
  ;; VLS modes that has NUNITS < 32.
  (define_mode_iterator VLS_AVL_IMM [
***************
*** 4987,4989 ****
--- 4987,5025 ----
    (RVVM4HI "HF") (RVVM2HI "HF") (RVVM1HI "HF") (RVVMF2HI "HF") (RVVMF4HI "HF")
    (RVVM4SI "SF") (RVVM2SI "SF") (RVVM1SI "SF") (RVVMF2SI "SF")
  ])
+ 
+ (define_mode_iterator NDS_VWEXTBF [
+   (RVVM8SF "TARGET_VECTOR_ELEN_FP_32")
+   (RVVM4SF "TARGET_VECTOR_ELEN_FP_32")
+   (RVVM2SF "TARGET_VECTOR_ELEN_FP_32")
+   (RVVM1SF "TARGET_VECTOR_ELEN_FP_32")
+   (RVVMF2SF "TARGET_VECTOR_ELEN_FP_32 && TARGET_MIN_VLEN > 32")
+ ])
+ 
+ (define_mode_attr NDS_V_DOUBLE_TRUNC_BF [
+   (RVVM8SF "RVVM4BF") (RVVM4SF "RVVM2BF") (RVVM2SF "RVVM1BF")
+   (RVVM1SF "RVVMF2BF") (RVVMF2SF "RVVMF4BF")
+ ])
+ 
+ (define_mode_iterator NDS_QVI [
+   RVVM8QI RVVM4QI RVVM2QI RVVM1QI
+   RVVMF2QI RVVMF4QI (RVVMF8QI "TARGET_MIN_VLEN > 32")
+ ])
+ 
+ (define_mode_iterator VHF [
+   RVVM8HF RVVM4HF RVVM2HF RVVM1HF RVVMF2HF
+   (RVVMF4HF "TARGET_MIN_VLEN > 32")
+ ])
+ 
+ (define_mode_attr NDS_QUAD_FIX [
+   (RVVM8SI "RVVM8QI") (RVVM4SI "RVVM4QI") (RVVM2SI "RVVM2QI")
+   (RVVM1SI "RVVM1QI") (RVVMF2SI "RVVMF2QI") (RVVM8DI "RVVM8HI")
+   (RVVM4DI "RVVM4HI") (RVVM2DI "RVVM2HI") (RVVM1DI "RVVM1HI")
+ 
+   (V1SI "V1QI") (V2SI "V2QI") (V4SI "V4QI") (V8SI "V8QI") (V16SI "V16QI")
+   (V32SI "V32QI") (V64SI "V64QI") (V128SI "V128QI") (V256SI "V256QI")
+   (V512SI "V512QI") (V1024SI "V1024QI")
+   (V1DI "V1HI") (V2DI "V2HI") (V4DI "V4HI") (V8DI "V8HI") (V16DI "V16HI")
+   (V32DI "V32HI") (V64DI "V64HI") (V128DI "V128HI") (V256DI "V256HI")
+   (V512DI "V512HI")
+ ])
diff -Nrcpad gcc-16-20250831/gcc/config/riscv/vector.md gcc-16-20250907/gcc/config/riscv/vector.md
*** gcc-16-20250831/gcc/config/riscv/vector.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/riscv/vector.md	Sun Sep  7 22:32:58 2025
***************
*** 5493,5545 ****
    "TARGET_VECTOR"
  {})
  
! (define_expand "@pred_mul_plus_vx_<mode>"
!   [(set (match_operand:V_VLSI_QHS       0 "register_operand")
! 	(if_then_else:V_VLSI_QHS
! 	  (unspec:<VM>
! 	    [(match_operand:<VM>        1 "vector_mask_operand")
! 	     (match_operand             6 "vector_length_operand")
! 	     (match_operand             7 "const_int_operand")
! 	     (match_operand             8 "const_int_operand")
! 	     (match_operand             9 "const_int_operand")
! 	     (reg:SI VL_REGNUM)
! 	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (plus:V_VLSI_QHS
! 	    (mult:V_VLSI_QHS
! 	      (vec_duplicate:V_VLSI_QHS
! 	        (match_operand:<VEL>    2 "register_operand"))
! 	      (match_operand:V_VLSI_QHS 3 "register_operand"))
! 	    (match_operand:V_VLSI_QHS   4 "register_operand"))
! 	  (match_operand:V_VLSI_QHS     5 "vector_merge_operand")))]
!   "TARGET_VECTOR"
! {
!   riscv_vector::prepare_ternary_operands (operands);
! })
! 
! (define_expand "@pred_mul_plus_vx_<mode>"
!   [(set (match_operand:V_VLSI_D       0 "register_operand")
! 	(if_then_else:V_VLSI_D
! 	  (unspec:<VM>
! 	    [(match_operand:<VM>      1 "vector_mask_operand")
! 	     (match_operand           6 "vector_length_operand")
! 	     (match_operand           7 "const_int_operand")
! 	     (match_operand           8 "const_int_operand")
! 	     (match_operand           9 "const_int_operand")
! 	     (reg:SI VL_REGNUM)
! 	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (plus:V_VLSI_D
! 	    (mult:V_VLSI_D
! 	      (vec_duplicate:V_VLSI_D
! 		(match_operand:<VEL>  2 "register_operand"))
! 	      (match_operand:V_VLSI_D 3 "register_operand"))
! 	    (match_operand:V_VLSI_D   4 "register_operand"))
! 	  (match_operand:V_VLSI_D     5 "vector_merge_operand")))]
!   "TARGET_VECTOR && TARGET_64BIT"
! {
!   riscv_vector::prepare_ternary_operands (operands);
! })
! 
! (define_expand "@pred_vnmsac_vx_<mode>"
    [(set (match_operand:V_VLSI_QHS       0 "register_operand")
  	(if_then_else:V_VLSI_QHS
  	  (unspec:<VM>
--- 5493,5499 ----
    "TARGET_VECTOR"
  {})
  
! (define_expand "@pred_mul_minus_vx_<mode>"
    [(set (match_operand:V_VLSI_QHS       0 "register_operand")
  	(if_then_else:V_VLSI_QHS
  	  (unspec:<VM>
***************
*** 5562,5568 ****
    riscv_vector::prepare_ternary_operands (operands);
  })
  
! (define_expand "@pred_vnmsac_vx_<mode>"
    [(set (match_operand:V_VLSI_D       0 "register_operand")
  	(if_then_else:V_VLSI_D
  	  (unspec:<VM>
--- 5516,5522 ----
    riscv_vector::prepare_ternary_operands (operands);
  })
  
! (define_expand "@pred_mul_minus_vx_<mode>"
    [(set (match_operand:V_VLSI_D       0 "register_operand")
  	(if_then_else:V_VLSI_D
  	  (unspec:<VM>
***************
*** 8934,9039 ****
    [(set_attr "type" "vssegt<order>x")
     (set_attr "mode" "<V32T:MODE>")])
  
! (define_insn "*pred_macc_<mode>_scalar_undef"
!   [(set (match_operand:V_VLSI_QHS       0 "register_operand"      "=vd,  vr")
  	(if_then_else:V_VLSI_QHS
  	  (unspec:<VM>
! 	    [(match_operand:<VM>        1 "vector_mask_operand"   " vm, Wc1")
! 	     (match_operand             6 "vector_length_operand" "rvl, rvl")
! 	     (match_operand             7 "const_int_operand"     "  i,   i")
! 	     (match_operand             8 "const_int_operand"     "  i,   i")
! 	     (match_operand             9 "const_int_operand"     "  i,   i")
  	     (reg:SI VL_REGNUM)
  	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (plus:V_VLSI_QHS
  	    (mult:V_VLSI_QHS
  	      (vec_duplicate:V_VLSI_QHS
! 		(match_operand:<VEL>    3 "reg_or_0_operand"     "  rJ,  rJ"))
! 	      (match_operand:V_VLSI_QHS 4 "register_operand"     "  vr,  vr"))
! 	    (match_operand:V_VLSI_QHS   5 "register_operand"     "   0,   0"))
  	  (match_operand:V_VLSI_QHS     2 "vector_undef_operand")))]
    "TARGET_VECTOR"
    "@
!    vmacc.vx\t%0,%z3,%4%p1
!    vmacc.vx\t%0,%z3,%4%p1"
    [(set_attr "type" "vimuladd")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*pred_macc_<mode>_scalar_undef"
!   [(set (match_operand:V_VLSI_D       0 "register_operand"      "=vd,  vr")
  	(if_then_else:V_VLSI_D
  	  (unspec:<VM>
! 	    [(match_operand:<VM>      1 "vector_mask_operand"   " vm, Wc1")
! 	     (match_operand           6 "vector_length_operand" "rvl, rvl")
! 	     (match_operand           7 "const_int_operand"     "  i,   i")
! 	     (match_operand           8 "const_int_operand"     "  i,   i")
! 	     (match_operand           9 "const_int_operand"     "  i,   i")
  	     (reg:SI VL_REGNUM)
  	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (plus:V_VLSI_D
  	    (mult:V_VLSI_D
  	      (vec_duplicate:V_VLSI_D
! 		(match_operand:<VEL>  3 "reg_or_0_operand"     "  rJ,  rJ"))
! 	      (match_operand:V_VLSI_D 4 "register_operand"     "  vr,  vr"))
! 	    (match_operand:V_VLSI_D   5 "register_operand"     "   0,   0"))
  	  (match_operand:V_VLSI_D     2 "vector_undef_operand")))]
    "TARGET_VECTOR && TARGET_64BIT"
    "@
!    vmacc.vx\t%0,%z3,%4%p1
!    vmacc.vx\t%0,%z3,%4%p1"
    [(set_attr "type" "vimuladd")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*pred_nmsac_<mode>_scalar_undef"
!   [(set (match_operand:V_VLSI_QHS       0 "register_operand"      "=vd,  vr")
  	(if_then_else:V_VLSI_QHS
  	  (unspec:<VM>
! 	    [(match_operand:<VM>        1 "vector_mask_operand"   " vm, Wc1")
! 	     (match_operand             6 "vector_length_operand" "rvl, rvl")
! 	     (match_operand             7 "const_int_operand"     "  i,   i")
! 	     (match_operand             8 "const_int_operand"     "  i,   i")
! 	     (match_operand             9 "const_int_operand"     "  i,   i")
  	     (reg:SI VL_REGNUM)
  	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (minus:V_VLSI_QHS
! 	    (match_operand:V_VLSI_QHS   5 "register_operand"     "   0,   0")
  	    (mult:V_VLSI_QHS
  	      (vec_duplicate:V_VLSI_QHS
! 		(match_operand:<VEL>    3 "reg_or_0_operand"     "  rJ,  rJ"))
! 	      (match_operand:V_VLSI_QHS 4 "register_operand"     "  vr,  vr")))
  	  (match_operand:V_VLSI_QHS     2 "vector_undef_operand")))]
    "TARGET_VECTOR"
    "@
!    vnmsac.vx\t%0,%z3,%4%p1
!    vnmsac.vx\t%0,%z3,%4%p1"
    [(set_attr "type" "vimuladd")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*pred_nmsac_<mode>_scalar_undef"
!   [(set (match_operand:V_VLSI_D       0 "register_operand"      "=vd,  vr")
  	(if_then_else:V_VLSI_D
  	  (unspec:<VM>
! 	    [(match_operand:<VM>      1 "vector_mask_operand"   " vm, Wc1")
! 	     (match_operand           6 "vector_length_operand" "rvl, rvl")
! 	     (match_operand           7 "const_int_operand"     "  i,   i")
! 	     (match_operand           8 "const_int_operand"     "  i,   i")
! 	     (match_operand           9 "const_int_operand"     "  i,   i")
  	     (reg:SI VL_REGNUM)
  	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (minus:V_VLSI_D
! 	    (match_operand:V_VLSI_D   5 "register_operand"     "   0,   0")
  	    (mult:V_VLSI_D
  	      (vec_duplicate:V_VLSI_D
! 		(match_operand:<VEL>  3 "reg_or_0_operand"     "  rJ,  rJ"))
! 	      (match_operand:V_VLSI_D 4 "register_operand"     "  vr,  vr")))
  	  (match_operand:V_VLSI_D     2 "vector_undef_operand")))]
    "TARGET_VECTOR && TARGET_64BIT"
    "@
!    vnmsac.vx\t%0,%z3,%4%p1
!    vnmsac.vx\t%0,%z3,%4%p1"
    [(set_attr "type" "vimuladd")
     (set_attr "mode" "<MODE>")])
  
  (include "autovec.md")
  (include "autovec-opt.md")
  (include "sifive-vector.md")
--- 8888,9048 ----
    [(set_attr "type" "vssegt<order>x")
     (set_attr "mode" "<V32T:MODE>")])
  
! (define_insn "*pred_mul_minus_vx<mode>_undef"
!   [(set (match_operand:V_VLSI_QHS       0 "register_operand"      "=vd,  vd,  vr,  vr")
  	(if_then_else:V_VLSI_QHS
  	  (unspec:<VM>
! 	    [(match_operand:<VM>        1 "vector_mask_operand"   " vm,  vm, Wc1, Wc1")
! 	     (match_operand             6 "vector_length_operand" "rvl, rvl, rvl, rvl")
! 	     (match_operand             7 "const_int_operand"     "  i,   i,   i,   i")
! 	     (match_operand             8 "const_int_operand"     "  i,   i,   i,   i")
! 	     (match_operand             9 "const_int_operand"     "  i,   i,   i,   i")
  	     (reg:SI VL_REGNUM)
  	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (minus:V_VLSI_QHS
! 	    (match_operand:V_VLSI_QHS   5 "register_operand"     "  vr,   0,  vr,   0")
  	    (mult:V_VLSI_QHS
  	      (vec_duplicate:V_VLSI_QHS
! 		(match_operand:<VEL>    3 "reg_or_0_operand"     "  rJ,  rJ,  rJ,  rJ"))
! 	      (match_operand:V_VLSI_QHS 4 "register_operand"     "   0,  vr,   0,  vr")))
  	  (match_operand:V_VLSI_QHS     2 "vector_undef_operand")))]
    "TARGET_VECTOR"
    "@
!    vnmsub.vx\t%0,%z3,%5%p1
!    vnmsac.vx\t%0,%z3,%4%p1
!    vnmsub.vx\t%0,%z3,%5%p1
!    vnmsac.vx\t%0,%z3,%4%p1"
    [(set_attr "type" "vimuladd")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*pred_mul_minus_vx<mode>_undef"
!   [(set (match_operand:V_VLSI_D       0 "register_operand"      "=vd,  vd,  vr,  vr")
  	(if_then_else:V_VLSI_D
  	  (unspec:<VM>
! 	    [(match_operand:<VM>      1 "vector_mask_operand"   " vm,  vm, Wc1, Wc1")
! 	     (match_operand           6 "vector_length_operand" "rvl, rvl, rvl, rvl")
! 	     (match_operand           7 "const_int_operand"     "  i,   i,   i,   i")
! 	     (match_operand           8 "const_int_operand"     "  i,   i,   i,   i")
! 	     (match_operand           9 "const_int_operand"     "  i,   i,   i,   i")
  	     (reg:SI VL_REGNUM)
  	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (minus:V_VLSI_D
! 	    (match_operand:V_VLSI_D   5 "register_operand"     "  vr,   0,  vr,   0")
  	    (mult:V_VLSI_D
  	      (vec_duplicate:V_VLSI_D
! 		(match_operand:<VEL>  3 "reg_or_0_operand"     "  rJ,  rJ,  rJ,  rJ"))
! 	      (match_operand:V_VLSI_D 4 "register_operand"     "   0,  vr,   0,  vr")))
  	  (match_operand:V_VLSI_D     2 "vector_undef_operand")))]
    "TARGET_VECTOR && TARGET_64BIT"
    "@
!    vnmsub.vx\t%0,%z3,%5%p1
!    vnmsac.vx\t%0,%z3,%4%p1
!    vnmsub.vx\t%0,%z3,%5%p1
!    vnmsac.vx\t%0,%z3,%4%p1"
    [(set_attr "type" "vimuladd")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*pred_mul_plus_vx<mode>_undef"
!   [(set (match_operand:V_VLSI_QHS       0 "register_operand"      "=vd,  vd, vr,  vr")
  	(if_then_else:V_VLSI_QHS
  	  (unspec:<VM>
! 	    [(match_operand:<VM>        1 "vector_mask_operand"   " vm,  vm, Wc1, Wc1")
! 	     (match_operand             6 "vector_length_operand" "rvl, rvl, rvl, rvl")
! 	     (match_operand             7 "const_int_operand"     "  i,   i,   i,   i")
! 	     (match_operand             8 "const_int_operand"     "  i,   i,   i,   i")
! 	     (match_operand             9 "const_int_operand"     "  i,   i,   i,   i")
  	     (reg:SI VL_REGNUM)
  	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (plus:V_VLSI_QHS
  	    (mult:V_VLSI_QHS
  	      (vec_duplicate:V_VLSI_QHS
! 		(match_operand:<VEL>    3 "reg_or_0_operand"      " rJ,  rJ,  rJ,  rJ"))
! 	      (match_operand:V_VLSI_QHS 4 "register_operand"      "  0,  vr,   0,  vr"))
! 	    (match_operand:V_VLSI_QHS   5 "register_operand"      " vr,   0,  vr,   0"))
  	  (match_operand:V_VLSI_QHS     2 "vector_undef_operand")))]
    "TARGET_VECTOR"
    "@
!    vmadd.vx\t%0,%z3,%5%p1
!    vmacc.vx\t%0,%z3,%4%p1
!    vmadd.vx\t%0,%z3,%5%p1
!    vmacc.vx\t%0,%z3,%4%p1"
    [(set_attr "type" "vimuladd")
     (set_attr "mode" "<MODE>")])
  
! (define_insn "*pred_mul_plus_vx<mode>_undef"
!   [(set (match_operand:V_VLSI_D       0 "register_operand"      "=vd,  vd, vr,  vr")
  	(if_then_else:V_VLSI_D
  	  (unspec:<VM>
! 	    [(match_operand:<VM>      1 "vector_mask_operand"   " vm,  vm, Wc1, Wc1")
! 	     (match_operand           6 "vector_length_operand" "rvl, rvl, rvl, rvl")
! 	     (match_operand           7 "const_int_operand"     "  i,   i,   i,   i")
! 	     (match_operand           8 "const_int_operand"     "  i,   i,   i,   i")
! 	     (match_operand           9 "const_int_operand"     "  i,   i,   i,   i")
  	     (reg:SI VL_REGNUM)
  	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
! 	  (plus:V_VLSI_D
  	    (mult:V_VLSI_D
  	      (vec_duplicate:V_VLSI_D
! 		(match_operand:<VEL>  3 "reg_or_0_operand"      " rJ,  rJ,  rJ,  rJ"))
! 	      (match_operand:V_VLSI_D 4 "register_operand"      "  0,  vr,   0,  vr"))
! 	    (match_operand:V_VLSI_D   5 "register_operand"      " vr,   0,  vr,   0"))
  	  (match_operand:V_VLSI_D     2 "vector_undef_operand")))]
    "TARGET_VECTOR && TARGET_64BIT"
    "@
!    vmadd.vx\t%0,%z3,%5%p1
!    vmacc.vx\t%0,%z3,%4%p1
!    vmadd.vx\t%0,%z3,%5%p1
!    vmacc.vx\t%0,%z3,%4%p1"
    [(set_attr "type" "vimuladd")
     (set_attr "mode" "<MODE>")])
  
+ (define_expand "@pred_mul_plus_vx<mode>"
+   [(set (match_operand:V_VLSI_QHS       0 "register_operand")
+ 	(if_then_else:V_VLSI_QHS
+ 	  (unspec:<VM>
+ 	    [(match_operand:<VM>        1 "vector_mask_operand")
+ 	     (match_operand             6 "vector_length_operand")
+ 	     (match_operand             7 "const_int_operand")
+ 	     (match_operand             8 "const_int_operand")
+ 	     (match_operand             9 "const_int_operand")
+ 	     (reg:SI VL_REGNUM)
+ 	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
+ 	  (plus:V_VLSI_QHS
+ 	    (mult:V_VLSI_QHS
+ 	      (vec_duplicate:V_VLSI_QHS
+ 		(match_operand:<VEL>    2 "reg_or_0_operand"))
+ 	      (match_operand:V_VLSI_QHS 3 "register_operand"))
+ 	    (match_operand:V_VLSI_QHS   4 "register_operand"))
+ 	  (match_operand:V_VLSI_QHS     5 "vector_merge_operand")))]
+   "TARGET_VECTOR"
+   {
+     riscv_vector::prepare_ternary_operands (operands);
+   })
+ 
+ (define_expand "@pred_mul_plus_vx<mode>"
+   [(set (match_operand:V_VLSI_D       0 "register_operand")
+ 	(if_then_else:V_VLSI_D
+ 	  (unspec:<VM>
+ 	    [(match_operand:<VM>      1 "vector_mask_operand")
+ 	     (match_operand           6 "vector_length_operand")
+ 	     (match_operand           7 "const_int_operand")
+ 	     (match_operand           8 "const_int_operand")
+ 	     (match_operand           9 "const_int_operand")
+ 	     (reg:SI VL_REGNUM)
+ 	     (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE)
+ 	  (plus:V_VLSI_D
+ 	    (mult:V_VLSI_D
+ 	      (vec_duplicate:V_VLSI_D
+ 		(match_operand:<VEL>  2 "reg_or_0_operand"))
+ 	      (match_operand:V_VLSI_D 3 "register_operand"))
+ 	    (match_operand:V_VLSI_D   4 "register_operand"))
+ 	  (match_operand:V_VLSI_D     5 "vector_merge_operand")))]
+   "TARGET_VECTOR && TARGET_64BIT"
+   {
+     riscv_vector::prepare_ternary_operands (operands);
+   })
+ 
  (include "autovec.md")
  (include "autovec-opt.md")
  (include "sifive-vector.md")
+ (include "andes-vector.md")
diff -Nrcpad gcc-16-20250831/gcc/config/rx/rx.cc gcc-16-20250907/gcc/config/rx/rx.cc
*** gcc-16-20250831/gcc/config/rx/rx.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/rx/rx.cc	Sun Sep  7 22:32:59 2025
*************** mark_frame_related (rtx insn)
*** 1648,1663 ****
  static void
  add_pop_cfi_notes (rtx_insn *insn, unsigned int high, unsigned int low)
  {
!   rtx t = plus_constant (Pmode, stack_pointer_rtx,
!                         (high - low + 1) * UNITS_PER_WORD);
    t = gen_rtx_SET (stack_pointer_rtx, t);
    add_reg_note (insn, REG_CFA_ADJUST_CFA, t);
    RTX_FRAME_RELATED_P (insn) = 1;
-   for (unsigned int i = low; i <= high; i++)
-     add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (word_mode, i));
  }
  
- 
  static bool
  ok_for_max_constant (HOST_WIDE_INT val)
  {
--- 1648,1667 ----
  static void
  add_pop_cfi_notes (rtx_insn *insn, unsigned int high, unsigned int low)
  {
!   rtx src = stack_pointer_rtx;
!   rtx t;
!   for (unsigned int i = low; i <= high; i++)
!     {
!       add_reg_note (insn, REG_CFA_RESTORE, gen_rtx_REG (word_mode, i));
!       if (i == FRAME_POINTER_REGNUM && frame_pointer_needed)
! 	src = frame_pointer_rtx;
!     }
!   t = plus_constant (Pmode, src, (high - low + 1) * UNITS_PER_WORD);
    t = gen_rtx_SET (stack_pointer_rtx, t);
    add_reg_note (insn, REG_CFA_ADJUST_CFA, t);
    RTX_FRAME_RELATED_P (insn) = 1;
  }
  
  static bool
  ok_for_max_constant (HOST_WIDE_INT val)
  {
*************** rx_expand_prologue (void)
*** 1816,1851 ****
  	}
      }
  
!   /* If needed, set up the frame pointer.  */
!   if (frame_pointer_needed)
!     gen_safe_add (frame_pointer_rtx, stack_pointer_rtx,
! 		  GEN_INT (- (HOST_WIDE_INT) frame_size), true);
! 
!   /* Allocate space for the outgoing args.
!      If the stack frame has not already been set up then handle this as well.  */
!   if (stack_size)
      {
!       if (frame_size)
! 	{
! 	  if (frame_pointer_needed)
! 	    gen_safe_add (stack_pointer_rtx, frame_pointer_rtx,
! 			  GEN_INT (- (HOST_WIDE_INT) stack_size), true);
! 	  else
! 	    gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
! 			  GEN_INT (- (HOST_WIDE_INT) (frame_size + stack_size)),
! 			  true);
! 	}
!       else
! 	gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
! 		      GEN_INT (- (HOST_WIDE_INT) stack_size), true);
      }
!   else if (frame_size)
      {
!       if (! frame_pointer_needed)
! 	gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
! 		      GEN_INT (- (HOST_WIDE_INT) frame_size), true);
!       else
! 	gen_safe_add (stack_pointer_rtx, frame_pointer_rtx, NULL_RTX, true);
      }
  }
  
--- 1820,1836 ----
  	}
      }
  
!   if (stack_size || frame_size)
      {
!       gen_safe_add (stack_pointer_rtx, stack_pointer_rtx,
! 		    GEN_INT (- (HOST_WIDE_INT) (stack_size + frame_size)),
! 		    true);
      }
!   if (frame_pointer_needed)
      {
!       gen_safe_add (frame_pointer_rtx, stack_pointer_rtx,
! 		    GEN_INT ((HOST_WIDE_INT) stack_size),
! 		    true);
      }
  }
  
diff -Nrcpad gcc-16-20250831/gcc/config/xtensa/predicates.md gcc-16-20250907/gcc/config/xtensa/predicates.md
*** gcc-16-20250831/gcc/config/xtensa/predicates.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/xtensa/predicates.md	Sun Sep  7 22:32:59 2025
***************
*** 189,194 ****
--- 189,197 ----
  (define_predicate "ubranch_operator"
    (match_code "ltu,geu"))
  
+ (define_predicate "alt_ubranch_operator"
+   (match_code "gtu,leu"))
+ 
  (define_predicate "boolean_operator"
    (match_code "eq,ne"))
  
diff -Nrcpad gcc-16-20250831/gcc/config/xtensa/xtensa.md gcc-16-20250907/gcc/config/xtensa/xtensa.md
*** gcc-16-20250831/gcc/config/xtensa/xtensa.md	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/config/xtensa/xtensa.md	Sun Sep  7 22:32:59 2025
***************
*** 3313,3318 ****
--- 3313,3354 ----
  				    (const_int 8)
  				    (const_int 9))))])
  
+ (define_insn_and_split "*eqne_in_range"
+   [(set (pc)
+ 	(if_then_else (match_operator 4 "alt_ubranch_operator"
+ 			[(plus:SI (match_operand:SI 0 "register_operand" "r")
+ 				  (match_operand:SI 1 "const_int_operand" "i"))
+ 			 (match_operand:SI 2 "const_int_operand" "i")])
+ 		      (label_ref (match_operand 3 ""))
+ 		      (pc)))
+    (clobber (match_scratch:SI 5 "=&a"))]
+   "TARGET_MINMAX && TARGET_CLAMPS
+    && INTVAL (operands[1]) * 2 - INTVAL (operands[2]) == 1
+    && IN_RANGE (exact_log2 (INTVAL (operands[1])), 7, 22)"
+   "#"
+   "&& 1"
+   [(set (match_dup 5)
+ 	(smin:SI (smax:SI (match_dup 0)
+ 			  (match_dup 1))
+ 		 (match_dup 2)))
+    (set (pc)
+ 	(if_then_else (match_op_dup 4
+ 			[(match_dup 0)
+ 			 (match_dup 5)])
+ 		      (label_ref (match_dup 3))
+ 		      (pc)))]
+ {
+   HOST_WIDE_INT v = INTVAL (operands[1]);
+   operands[1] = GEN_INT (-v);
+   operands[2] = GEN_INT (v - 1);
+   PUT_CODE (operands[4], GET_CODE (operands[4]) == GTU ? NE : EQ);
+   if (GET_CODE (operands[5]) == SCRATCH)
+     operands[5] = gen_reg_rtx (SImode);
+ }
+   [(set_attr "type"	"jump")
+    (set_attr "mode"	"none")
+    (set_attr "length"	"6")])
+ 
  (define_split
    [(clobber (match_operand 0 "register_operand"))]
    "HARD_REGISTER_P (operands[0])
diff -Nrcpad gcc-16-20250831/gcc/config.gcc gcc-16-20250907/gcc/config.gcc
*** gcc-16-20250831/gcc/config.gcc	Sun Aug 31 22:32:11 2025
--- gcc-16-20250907/gcc/config.gcc	Sun Sep  7 22:32:58 2025
*************** riscv*)
*** 549,558 ****
  	cpu_type=riscv
  	extra_objs="riscv-builtins.o riscv-c.o riscv-sr.o riscv-shorten-memrefs.o riscv-selftests.o riscv-string.o"
  	extra_objs="${extra_objs} riscv-v.o riscv-vsetvl.o riscv-vector-costs.o riscv-avlprop.o riscv-vect-permconst.o"
! 	extra_objs="${extra_objs} riscv-vector-builtins.o riscv-vector-builtins-shapes.o riscv-vector-builtins-bases.o sifive-vector-builtins-bases.o"
  	extra_objs="${extra_objs} thead.o riscv-target-attr.o riscv-zicfilp.o"
  	d_target_objs="riscv-d.o"
! 	extra_headers="riscv_vector.h riscv_crypto.h riscv_bitmanip.h riscv_th_vector.h sifive_vector.h"
  	target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.cc"
  	target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.h"
  	extra_options="${extra_options} riscv/riscv-ext.opt"
--- 549,558 ----
  	cpu_type=riscv
  	extra_objs="riscv-builtins.o riscv-c.o riscv-sr.o riscv-shorten-memrefs.o riscv-selftests.o riscv-string.o"
  	extra_objs="${extra_objs} riscv-v.o riscv-vsetvl.o riscv-vector-costs.o riscv-avlprop.o riscv-vect-permconst.o"
! 	extra_objs="${extra_objs} riscv-vector-builtins.o riscv-vector-builtins-shapes.o riscv-vector-builtins-bases.o sifive-vector-builtins-bases.o andes-vector-builtins-bases.o"
  	extra_objs="${extra_objs} thead.o riscv-target-attr.o riscv-zicfilp.o"
  	d_target_objs="riscv-d.o"
! 	extra_headers="riscv_vector.h riscv_crypto.h riscv_bitmanip.h riscv_th_vector.h sifive_vector.h andes_vector.h"
  	target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.cc"
  	target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-vector-builtins.h"
  	extra_options="${extra_options} riscv/riscv-ext.opt"
diff -Nrcpad gcc-16-20250831/gcc/configure gcc-16-20250907/gcc/configure
*** gcc-16-20250831/gcc/configure	Sun Aug 31 22:34:36 2025
--- gcc-16-20250907/gcc/configure	Sun Sep  7 22:35:25 2025
*************** else
*** 26639,26644 ****
--- 26639,26650 ----
        esac
      fi
      ;;
+   x86_64-*-darwin* | i?86-*-darwin* | powerpc*-darwin-*)
+     # Darwin has assemblers that support .cfi_ instructions, but that then
+     # triggers emission of compact unwind which has incompatibilities with
+     # current GCC output.
+     gcc_cv_as_cfi_directive=no
+     ;;
    *-*-*)
      gcc_cv_as_cfi_directive=yes
      ;;
diff -Nrcpad gcc-16-20250831/gcc/configure.ac gcc-16-20250907/gcc/configure.ac
*** gcc-16-20250831/gcc/configure.ac	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/configure.ac	Sun Sep  7 22:32:59 2025
*************** gcc_GAS_CHECK_FEATURE([cfi directives],
*** 3403,3408 ****
--- 3403,3414 ----
        esac
      fi
      ;;
+   x86_64-*-darwin* | i?86-*-darwin* | powerpc*-darwin-*)
+     # Darwin has assemblers that support .cfi_ instructions, but that then
+     # triggers emission of compact unwind which has incompatibilities with
+     # current GCC output.
+     gcc_cv_as_cfi_directive=no
+     ;;
    *-*-*)
      gcc_cv_as_cfi_directive=yes
      ;;
diff -Nrcpad gcc-16-20250831/gcc/cp/ChangeLog gcc-16-20250907/gcc/cp/ChangeLog
*** gcc-16-20250831/gcc/cp/ChangeLog	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/ChangeLog	Sun Sep  7 22:32:59 2025
***************
*** 1,3 ****
--- 1,90 ----
+ 2025-09-06  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	PR c++/121702
+ 	* module.cc (enum module_state_counts): New counter.
+ 	(depset::hash::add_namespace_entities): Seed using-directive
+ 	targets for later streaming.
+ 	(module_state::write_namespaces): Don't handle using-directives
+ 	here.
+ 	(module_state::read_namespaces): Likewise.
+ 	(module_state::write_using_directives): New function.
+ 	(module_state::read_using_directives): New function.
+ 	(module_state::write_counts): Log using-directives.
+ 	(module_state::read_counts): Likewise.
+ 	(module_state::write_begin): Stream using-directives.
+ 	(module_state::read_language): Read using-directives if
+ 	directly importing.
+ 	(module_state::direct_import): Update current TU import list
+ 	before calling read_language.
+ 	* name-lookup.cc (add_using_namespace): Fix lookup of previous
+ 	using-directives.
+ 	* parser.cc (cp_parser_import_declaration): Don't set
+ 	MK_EXPORTING when performing import_module.
+ 
+ 2025-09-06  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	PR c++/121705
+ 	PR c++/117658
+ 	* module.cc (depset::hash::make_dependency): Make bindings for
+ 	GM functions.
+ 	(depset::hash::add_binding_entity): Adjust comment.
+ 	(depset::hash::add_deduction_guides): Add log.
+ 	* ptree.cc (cxx_print_xnode): Handle friend functions where
+ 	TI_TEMPLATE is an OVERLOAD or IDENTIFIER.
+ 
+ 2025-09-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* constexpr.cc (cxx_eval_cxa_builtin_fn): Add missing word separating
+ 	space into invalid_nargs diagnostics.
+ 
+ 2025-09-04  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	PR c++/117658
+ 	* cp-tree.h (get_originating_module): Adjust parameter names.
+ 	* module.cc (path_of_instantiation): Handle C++26 expansion
+ 	statements.
+ 	* name-lookup.cc (name_lookup::adl_namespace_fns): Handle
+ 	exported declarations attached to the same module of an
+ 	associated entity with the same innermost non-inline namespace,
+ 	and non-exported functions on the instantiation path.
+ 	(name_lookup::search_adl): Build mapping of namespace to modules
+ 	that associated entities are attached to; remove now-unneeded
+ 	instantiation path handling.
+ 
+ 2025-09-04  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	PR c++/121724
+ 	* name-lookup.cc (push_namespace): Mark inline namespace
+ 	contexts as purview if needed.
+ 
+ 2025-09-03  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/97740
+ 	* pt.cc (tsubst_expr) <case COMPONENT_REF>: Don't check access
+ 	when the given member is already a FIELD_DECL.
+ 
+ 2025-09-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* constexpr.cc: Include contracts.h
+ 	* coroutines.cc: Likewise.
+ 	* cp-gimplify.cc: Likewise.
+ 	* decl.cc: Likewise.
+ 	* decl2.cc: Likewise.
+ 	* mangle.cc: Likewise.
+ 	* module.cc: Likewise.
+ 	* pt.cc: Likewise.
+ 	* search.cc: Likewise.
+ 	* semantics.cc: Likewise.
+ 	* contracts.cc (validate_contract_role, setup_default_contract_role,
+ 	add_contract_role, get_concrete_axiom_semantic,
+ 	get_default_contract_role): Make static.
+ 	* cp-tree.h (make_postcondition_variable, grok_contract,
+ 	finish_contract_condition, find_contract, set_decl_contracts,
+ 	get_contract_semantic, set_contract_semantic): Move to contracts.h.
+ 	* contracts.h (get_contract_role, add_contract_role,
+ 	validate_contract_role, setup_default_contract_role,
+ 	lookup_concrete_semantic, get_default_contract_role): Remove.
+ 
  2025-08-29  Sirui Mu  <msrlancern@gmail.com>
  
  	* typeck.cc (cp_build_array_ref): Handle 0[arr] earlier.
diff -Nrcpad gcc-16-20250831/gcc/cp/constexpr.cc gcc-16-20250907/gcc/cp/constexpr.cc
*** gcc-16-20250831/gcc/cp/constexpr.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/constexpr.cc	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 41,46 ****
--- 41,47 ----
  #include "fold-const.h"
  #include "intl.h"
  #include "toplev.h"
+ #include "contracts.h"
  
  static bool verify_constant (tree, bool, bool *, bool *);
  #define VERIFY_CONSTANT(X)						\
*************** cxx_eval_cxa_builtin_fn (const constexpr
*** 1859,1865 ****
      {
      invalid_nargs:
        if (!ctx->quiet)
! 	error_at (loc, "call to %qD function with incorrect"
  		  "number of arguments", fndecl);
        *non_constant_p = true;
        return call;
--- 1860,1866 ----
      {
      invalid_nargs:
        if (!ctx->quiet)
! 	error_at (loc, "call to %qD function with incorrect "
  		  "number of arguments", fndecl);
        *non_constant_p = true;
        return call;
diff -Nrcpad gcc-16-20250831/gcc/cp/contracts.cc gcc-16-20250907/gcc/cp/contracts.cc
*** gcc-16-20250831/gcc/cp/contracts.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/contracts.cc	Sun Sep  7 22:32:59 2025
*************** bool valid_configs[CCS_MAYBE + 1][CCS_MA
*** 159,165 ****
    { 0, 1, 0, 0, 1, },
  };
  
! void
  validate_contract_role (contract_role *role)
  {
    gcc_assert (role);
--- 159,165 ----
    { 0, 1, 0, 0, 1, },
  };
  
! static void
  validate_contract_role (contract_role *role)
  {
    gcc_assert (role);
*************** validate_contract_role (contract_role *r
*** 171,177 ****
  		"the %<default%> semantic");
  }
  
! contract_semantic
  lookup_concrete_semantic (const char *name)
  {
    if (strcmp (name, "ignore") == 0)
--- 171,177 ----
  		"the %<default%> semantic");
  }
  
! static contract_semantic
  lookup_concrete_semantic (const char *name)
  {
    if (strcmp (name, "ignore") == 0)
*************** role_name_equal (contract_role *role, co
*** 210,216 ****
    return role_name_equal (role->name, name);
  }
  
! contract_role *
  get_contract_role (const char *name)
  {
    for (int i = 0; i < max_custom_roles; ++i)
--- 210,218 ----
    return role_name_equal (role->name, name);
  }
  
! static void setup_default_contract_role (bool update = true);
! 
! static contract_role *
  get_contract_role (const char *name)
  {
    for (int i = 0; i < max_custom_roles; ++i)
*************** get_contract_role (const char *name)
*** 227,238 ****
    return NULL;
  }
  
! contract_role *
  add_contract_role (const char *name,
  		   contract_semantic des,
  		   contract_semantic aus,
  		   contract_semantic axs,
! 		   bool update)
  {
    for (int i = 0; i < max_custom_roles; ++i)
      {
--- 229,240 ----
    return NULL;
  }
  
! static contract_role *
  add_contract_role (const char *name,
  		   contract_semantic des,
  		   contract_semantic aus,
  		   contract_semantic axs,
! 		   bool update = true)
  {
    for (int i = 0; i < max_custom_roles; ++i)
      {
*************** get_concrete_axiom_semantic ()
*** 271,277 ****
    return flag_contract_assumption_mode ? CCS_ASSUME : CCS_IGNORE;
  }
  
! void
  setup_default_contract_role (bool update)
  {
    contract_semantic check = get_concrete_check ();
--- 273,279 ----
    return flag_contract_assumption_mode ? CCS_ASSUME : CCS_IGNORE;
  }
  
! static void
  setup_default_contract_role (bool update)
  {
    contract_semantic check = get_concrete_check ();
*************** handle_OPT_fcontract_semantic_ (const ch
*** 491,496 ****
--- 493,506 ----
    validate_contract_role (role);
  }
  
+ /* Returns the default role.  */
+ 
+ static contract_role *
+ get_default_contract_role ()
+ {
+   return get_contract_role ("default");
+ }
+ 
  /* Convert a contract CONFIG into a contract_mode.  */
  
  static contract_mode
diff -Nrcpad gcc-16-20250831/gcc/cp/contracts.h gcc-16-20250907/gcc/cp/contracts.h
*** gcc-16-20250831/gcc/cp/contracts.h	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/contracts.h	Sun Sep  7 22:32:59 2025
*************** struct contract_mode
*** 131,168 ****
    } u;
  };
  
- extern contract_role *get_contract_role	(const char *);
- extern contract_role *add_contract_role	(const char *,
- 					 contract_semantic,
- 					 contract_semantic,
- 					 contract_semantic,
- 					 bool = true);
- extern void validate_contract_role	(contract_role *);
- extern void setup_default_contract_role	(bool = true);
- extern contract_semantic lookup_concrete_semantic (const char *);
- 
  /* Map a source level semantic or level name to its value, or invalid.  */
  extern contract_semantic map_contract_semantic	(const char *);
  extern contract_level map_contract_level	(const char *);
  
  /* Check if an attribute is a cxx contract attribute.  */
! extern bool cxx_contract_attribute_p (const_tree);
! extern bool cp_contract_assertion_p (const_tree);
! 
! /* Returns the default role.  */
! 
! inline contract_role *
! get_default_contract_role ()
! {
!   return get_contract_role ("default");
! }
  
  /* Handle various command line arguments related to semantic mapping.  */
! extern void handle_OPT_fcontract_build_level_ (const char *);
  extern void handle_OPT_fcontract_assumption_mode_ (const char *);
  extern void handle_OPT_fcontract_continuation_mode_ (const char *);
! extern void handle_OPT_fcontract_role_ (const char *);
! extern void handle_OPT_fcontract_semantic_ (const char *);
  
  enum contract_matching_context
  {
--- 131,150 ----
    } u;
  };
  
  /* Map a source level semantic or level name to its value, or invalid.  */
  extern contract_semantic map_contract_semantic	(const char *);
  extern contract_level map_contract_level	(const char *);
  
  /* Check if an attribute is a cxx contract attribute.  */
! extern bool cxx_contract_attribute_p		(const_tree);
! extern bool cp_contract_assertion_p		(const_tree);
  
  /* Handle various command line arguments related to semantic mapping.  */
! extern void handle_OPT_fcontract_build_level_	(const char *);
  extern void handle_OPT_fcontract_assumption_mode_ (const char *);
  extern void handle_OPT_fcontract_continuation_mode_ (const char *);
! extern void handle_OPT_fcontract_role_		(const char *);
! extern void handle_OPT_fcontract_semantic_	(const char *);
  
  enum contract_matching_context
  {
*************** enum contract_matching_context
*** 277,305 ****
  #define DECL_IS_POST_FN_P(NODE) \
    (DECL_ABSTRACT_ORIGIN (NODE) && DECL_POST_FN (DECL_ABSTRACT_ORIGIN (NODE)) == NODE)
  
  extern void remove_contract_attributes		(tree);
  extern void copy_contract_attributes		(tree, tree);
  extern void remap_contracts			(tree, tree, tree, bool);
  extern void maybe_update_postconditions		(tree);
  extern void rebuild_postconditions		(tree);
  extern bool check_postcondition_result		(tree, tree, location_t);
! extern tree get_precondition_function		(tree);
! extern tree get_postcondition_function		(tree);
  extern void duplicate_contracts			(tree, tree);
  extern void match_deferred_contracts		(tree);
  extern void defer_guarded_contract_match	(tree, tree, tree);
! extern bool diagnose_misapplied_contracts	(tree);
! extern tree finish_contract_attribute		(tree, tree);
! extern tree invalidate_contract			(tree);
! extern void update_late_contract		(tree, tree, tree);
! extern tree splice_out_contracts		(tree);
! extern bool all_attributes_are_contracts_p	(tree);
! extern void inherit_base_contracts		(tree, tree);
  extern void start_function_contracts		(tree);
  extern void maybe_apply_function_contracts	(tree);
  extern void finish_function_contracts		(tree);
  extern void set_contract_functions		(tree, tree, tree);
  extern tree build_contract_check		(tree);
! extern void emit_assertion			(tree);
  
  #endif /* ! GCC_CP_CONTRACT_H */
--- 259,337 ----
  #define DECL_IS_POST_FN_P(NODE) \
    (DECL_ABSTRACT_ORIGIN (NODE) && DECL_POST_FN (DECL_ABSTRACT_ORIGIN (NODE)) == NODE)
  
+ /* contracts.cc */
+ extern void emit_assertion			(tree);
+ 
  extern void remove_contract_attributes		(tree);
+ extern bool all_attributes_are_contracts_p	(tree);
+ extern tree finish_contract_attribute		(tree, tree);
  extern void copy_contract_attributes		(tree, tree);
+ extern bool diagnose_misapplied_contracts	(tree);
  extern void remap_contracts			(tree, tree, tree, bool);
+ extern tree splice_out_contracts		(tree);
+ extern void inherit_base_contracts		(tree, tree);
+ 
+ extern tree make_postcondition_variable		(cp_expr);
+ extern tree make_postcondition_variable		(cp_expr, tree);
  extern void maybe_update_postconditions		(tree);
  extern void rebuild_postconditions		(tree);
  extern bool check_postcondition_result		(tree, tree, location_t);
! 
! extern tree grok_contract			(tree, tree, tree, cp_expr,
! 						 location_t);
! extern tree finish_contract_condition		(cp_expr);
! extern void update_late_contract		(tree, tree, tree);
! extern tree invalidate_contract			(tree);
  extern void duplicate_contracts			(tree, tree);
+ 
  extern void match_deferred_contracts		(tree);
  extern void defer_guarded_contract_match	(tree, tree, tree);
! 
! extern tree get_precondition_function		(tree);
! extern tree get_postcondition_function		(tree);
  extern void start_function_contracts		(tree);
  extern void maybe_apply_function_contracts	(tree);
  extern void finish_function_contracts		(tree);
  extern void set_contract_functions		(tree, tree, tree);
+ 
  extern tree build_contract_check		(tree);
! 
! /* Return the first contract in ATTRS, or NULL_TREE if there are none.  */
! 
! inline tree
! find_contract (tree attrs)
! {
!   while (attrs && !cxx_contract_attribute_p (attrs))
!     attrs = TREE_CHAIN (attrs);
!   return attrs;
! }
! 
! inline void
! set_decl_contracts (tree decl, tree contract_attrs)
! {
!   remove_contract_attributes (decl);
!   DECL_ATTRIBUTES (decl) = chainon (DECL_ATTRIBUTES (decl), contract_attrs);
! }
! 
! /* Returns the computed semantic of the node.  */
! 
! inline contract_semantic
! get_contract_semantic (const_tree t)
! {
!   return (contract_semantic) (TREE_LANG_FLAG_3 (CONTRACT_CHECK (t))
!       | (TREE_LANG_FLAG_2 (t) << 1)
!       | (TREE_LANG_FLAG_0 ((t)) << 2));
! }
! 
! /* Sets the computed semantic of the node.  */
! 
! inline void
! set_contract_semantic (tree t, contract_semantic semantic)
! {
!   TREE_LANG_FLAG_3 (CONTRACT_CHECK (t)) = semantic & 0x01;
!   TREE_LANG_FLAG_2 (t) = (semantic & 0x02) >> 1;
!   TREE_LANG_FLAG_0 (t) = (semantic & 0x04) >> 2;
! }
! 
  
  #endif /* ! GCC_CP_CONTRACT_H */
diff -Nrcpad gcc-16-20250831/gcc/cp/coroutines.cc gcc-16-20250907/gcc/cp/coroutines.cc
*** gcc-16-20250831/gcc/cp/coroutines.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/coroutines.cc	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 33,38 ****
--- 33,39 ----
  #include "gcc-rich-location.h"
  #include "hash-map.h"
  #include "coroutines.h"
+ #include "contracts.h"
  
  /* ================= Debug. ================= */
  
diff -Nrcpad gcc-16-20250831/gcc/cp/cp-gimplify.cc gcc-16-20250907/gcc/cp/cp-gimplify.cc
*** gcc-16-20250831/gcc/cp/cp-gimplify.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/cp-gimplify.cc	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 43,48 ****
--- 43,49 ----
  #include "omp-general.h"
  #include "opts.h"
  #include "gcc-urlifier.h"
+ #include "contracts.h"
  
  /* Keep track of forward references to immediate-escalating functions in
     case they become consteval.  This vector contains ADDR_EXPRs and
diff -Nrcpad gcc-16-20250831/gcc/cp/cp-tree.h gcc-16-20250907/gcc/cp/cp-tree.h
*** gcc-16-20250831/gcc/cp/cp-tree.h	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/cp-tree.h	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 25,31 ****
  #include "hard-reg-set.h"
  #include "function.h"
  #include "tristate.h"
- #include "contracts.h"
  
  /* In order for the format checking to accept the C++ front end
     diagnostic framework extensions, you must include this file before
--- 25,30 ----
*************** extern void module_add_import_initialize
*** 7746,7752 ****
  /* Where the namespace-scope decl was originally declared.  */
  extern void set_originating_module (tree, bool friend_p = false);
  extern tree get_originating_module_decl (tree) ATTRIBUTE_PURE;
! extern int get_originating_module (tree, bool for_mangle = false) ATTRIBUTE_PURE;
  extern unsigned get_importing_module (tree, bool = false) ATTRIBUTE_PURE;
  extern void check_module_decl_linkage (tree);
  
--- 7745,7751 ----
  /* Where the namespace-scope decl was originally declared.  */
  extern void set_originating_module (tree, bool friend_p = false);
  extern tree get_originating_module_decl (tree) ATTRIBUTE_PURE;
! extern int get_originating_module (tree, bool global_m1 = false) ATTRIBUTE_PURE;
  extern unsigned get_importing_module (tree, bool = false) ATTRIBUTE_PURE;
  extern void check_module_decl_linkage (tree);
  
*************** extern tree coro_get_ramp_function		(tre
*** 9110,9159 ****
  
  extern tree co_await_get_resume_call		(tree await_expr);
  
- 
- /* contracts.cc */
- extern tree make_postcondition_variable		(cp_expr);
- extern tree make_postcondition_variable		(cp_expr, tree);
- extern tree grok_contract			(tree, tree, tree, cp_expr, location_t);
- extern tree finish_contract_condition		(cp_expr);
- 
- /* Return the first contract in ATTRS, or NULL_TREE if there are none.  */
- 
- inline tree
- find_contract (tree attrs)
- {
-   while (attrs && !cxx_contract_attribute_p (attrs))
-     attrs = TREE_CHAIN (attrs);
-   return attrs;
- }
- 
- inline void
- set_decl_contracts (tree decl, tree contract_attrs)
- {
-   remove_contract_attributes (decl);
-   DECL_ATTRIBUTES (decl) = chainon (DECL_ATTRIBUTES (decl), contract_attrs);
- }
- 
- /* Returns the computed semantic of the node.  */
- 
- inline contract_semantic
- get_contract_semantic (const_tree t)
- {
-   return (contract_semantic) (TREE_LANG_FLAG_3 (CONTRACT_CHECK (t))
-       | (TREE_LANG_FLAG_2 (t) << 1)
-       | (TREE_LANG_FLAG_0 ((t)) << 2));
- }
- 
- /* Sets the computed semantic of the node.  */
- 
- inline void
- set_contract_semantic (tree t, contract_semantic semantic)
- {
-   TREE_LANG_FLAG_3 (CONTRACT_CHECK (t)) = semantic & 0x01;
-   TREE_LANG_FLAG_2 (t) = (semantic & 0x02) >> 1;
-   TREE_LANG_FLAG_0 (t) = (semantic & 0x04) >> 2;
- }
- 
  /* Inline bodies.  */
  
  inline tree
--- 9109,9114 ----
diff -Nrcpad gcc-16-20250831/gcc/cp/decl.cc gcc-16-20250907/gcc/cp/decl.cc
*** gcc-16-20250831/gcc/cp/decl.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/decl.cc	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 60,65 ****
--- 60,66 ----
  #include "opts.h"
  #include "langhooks-def.h"  /* For lhd_simulate_record_decl  */
  #include "coroutines.h"
+ #include "contracts.h"
  #include "gcc-urlifier.h"
  #include "diagnostic-highlight-colors.h"
  #include "pretty-print-markup.h"
*************** grokvardecl (tree type,
*** 12182,12189 ****
        if (DECL_EXTERNAL (decl) || TREE_STATIC (decl))
  	{
  	  CP_DECL_THREAD_LOCAL_P (decl) = true;
  	  if (!processing_template_decl)
! 	    set_decl_tls_model (decl, decl_default_tls_model (decl));
  	}
        if (declspecs->gnu_thread_keyword_p)
  	SET_DECL_GNU_TLS_P (decl);
--- 12183,12193 ----
        if (DECL_EXTERNAL (decl) || TREE_STATIC (decl))
  	{
  	  CP_DECL_THREAD_LOCAL_P (decl) = true;
+ 	  // NB: Set a tentative TLS model to avoid tls_model attribute
+ 	  // warnings due to lack of thread storage duration.  It will
+ 	  // be updated by cplus_decl_attributes later.
  	  if (!processing_template_decl)
! 	    set_decl_tls_model (decl, TLS_MODEL_REAL);
  	}
        if (declspecs->gnu_thread_keyword_p)
  	SET_DECL_GNU_TLS_P (decl);
diff -Nrcpad gcc-16-20250831/gcc/cp/decl2.cc gcc-16-20250907/gcc/cp/decl2.cc
*** gcc-16-20250831/gcc/cp/decl2.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/decl2.cc	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 52,57 ****
--- 52,58 ----
  #include "omp-general.h"
  #include "tree-inline.h"
  #include "escaped_string.h"
+ #include "contracts.h"
  
  /* Id for dumping the raw trees.  */
  int raw_dump_id;
*************** cplus_decl_attributes (tree *decl, tree
*** 2012,2017 ****
--- 2013,2027 ----
  	if (*decl == pattern)
  	  TREE_UNAVAILABLE (tmpl) = true;
        }
+ 
+   if (VAR_P (*decl) && CP_DECL_THREAD_LOCAL_P (*decl))
+     {
+       // tls_model attribute can set a stronger TLS access model.
+       tls_model model = DECL_TLS_MODEL (*decl);
+       tls_model default_model = decl_default_tls_model (*decl);
+       if (default_model > model)
+ 	set_decl_tls_model (*decl, default_model);
+     }
  }
  
  /* Walks through the namespace- or function-scope anonymous union
diff -Nrcpad gcc-16-20250831/gcc/cp/mangle.cc gcc-16-20250907/gcc/cp/mangle.cc
*** gcc-16-20250831/gcc/cp/mangle.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/mangle.cc	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 55,60 ****
--- 55,61 ----
  #include "stor-layout.h"
  #include "flags.h"
  #include "attribs.h"
+ #include "contracts.h"
  
  /* Debugging support.  */
  
diff -Nrcpad gcc-16-20250831/gcc/cp/module.cc gcc-16-20250907/gcc/cp/module.cc
*** gcc-16-20250831/gcc/cp/module.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/module.cc	Sun Sep  7 22:32:59 2025
*************** Classes used:
*** 232,237 ****
--- 232,238 ----
  #include "attribs.h"
  #include "intl.h"
  #include "langhooks.h"
+ #include "contracts.h"
  /* This TU doesn't need or want to see the networking.  */
  #define CODY_NETWORKING 0
  #include "mapper-client.h"
*************** enum module_state_counts
*** 3632,3637 ****
--- 3633,3639 ----
    MSC_pendings,
    MSC_entities,
    MSC_namespaces,
+   MSC_using_directives,
    MSC_bindings,
    MSC_macros,
    MSC_inits,
*************** class GTY((chain_next ("%h.parent"), for
*** 3853,3858 ****
--- 3855,3864 ----
  			 unsigned, unsigned *crc_ptr);
    bool read_namespaces (unsigned);
  
+   unsigned write_using_directives (elf_out *to, depset::hash &,
+ 				   vec<depset *> spaces, unsigned *crc_ptr);
+   bool read_using_directives (unsigned);
+ 
    void intercluster_seed (trees_out &sec, unsigned index, depset *dep);
    unsigned write_cluster (elf_out *to, depset *depsets[], unsigned size,
  			  depset::hash &, unsigned *counts, unsigned *crc_ptr);
*************** depset::hash::make_dependency (tree decl
*** 14313,14318 ****
--- 14319,14372 ----
  	      /* Anonymous types can't be forward-declared.  */
  	      && !IDENTIFIER_ANON_P (DECL_NAME (not_tmpl)))
  	    dep->set_flag_bit<DB_IS_PENDING_BIT> ();
+ 
+ 	  /* Namespace-scope functions can be found by ADL by template
+ 	     instantiations in this module.  We need to create bindings
+ 	     for them so that name lookup recognises they exist, if they
+ 	     won't be discarded.  add_binding_entity is too early to do
+ 	     this for GM functions, because if nobody ends up using them
+ 	     we'll have leftover bindings laying around, and it's tricky
+ 	     to delete them and any namespaces they've implicitly created
+ 	     deps on.  The downside is this means we don't pick up on
+ 	     using-decls, but by [module.global.frag] p3.6 we don't have
+ 	     to.  */
+ 	  if (ek == EK_DECL
+ 	      && !for_binding
+ 	      && !dep->is_import ()
+ 	      && !dep->is_tu_local ()
+ 	      && DECL_NAMESPACE_SCOPE_P (decl)
+ 	      && DECL_DECLARES_FUNCTION_P (decl)
+ 	      /* Compiler-generated functions won't participate in ADL.  */
+ 	      && !DECL_ARTIFICIAL (decl)
+ 	      /* A hidden friend doesn't need a binding.  */
+ 	      && !(DECL_LANG_SPECIFIC (not_tmpl)
+ 		   && DECL_UNIQUE_FRIEND_P (not_tmpl)))
+ 	    {
+ 	      /* This will only affect GM functions.  */
+ 	      gcc_checking_assert (!DECL_LANG_SPECIFIC (not_tmpl)
+ 				   || !DECL_MODULE_PURVIEW_P (not_tmpl));
+ 	      /* We shouldn't see any instantiations or specialisations.  */
+ 	      gcc_checking_assert (!DECL_LANG_SPECIFIC (decl)
+ 				   || !DECL_USE_TEMPLATE (decl));
+ 
+ 	      tree ns = CP_DECL_CONTEXT (decl);
+ 	      tree name = DECL_NAME (decl);
+ 	      depset *binding = find_binding (ns, name);
+ 	      if (!binding)
+ 		{
+ 		  binding = make_binding (ns, name);
+ 		  add_namespace_context (binding, ns);
+ 
+ 		  depset **slot = binding_slot (ns, name, /*insert=*/true);
+ 		  *slot = binding;
+ 		}
+ 
+ 	      binding->deps.safe_push (dep);
+ 	      dep->deps.safe_push (binding);
+ 	      dump (dumper::DEPEND)
+ 		&& dump ("Built ADL binding for %C:%N",
+ 			 TREE_CODE (decl), decl);
+ 	    }
  	}
  
        if (!dep->is_import ())
*************** depset::hash::add_binding_entity (tree d
*** 14487,14493 ****
  
        if ((!DECL_LANG_SPECIFIC (inner) || !DECL_MODULE_PURVIEW_P (inner))
  	  && !((flags & WMB_Using) && (flags & WMB_Purview)))
! 	/* Ignore entities not within the module purview.  */
  	return false;
  
        if (!header_module_p () && data->hash->is_tu_local_entity (decl))
--- 14541,14550 ----
  
        if ((!DECL_LANG_SPECIFIC (inner) || !DECL_MODULE_PURVIEW_P (inner))
  	  && !((flags & WMB_Using) && (flags & WMB_Purview)))
! 	/* Ignore entities not within the module purview.  We'll need to
! 	   create bindings for any non-discarded function calls for ADL,
! 	   but it's simpler to handle that at the point of use rather
! 	   than trying to clear out bindings after the fact.  */
  	return false;
  
        if (!header_module_p () && data->hash->is_tu_local_entity (decl))
*************** depset::hash::add_namespace_entities (tr
*** 14639,14655 ****
    data.partitions = partitions;
    data.hash = this;
  
!   hash_table<named_decl_hash>::iterator end
!     (DECL_NAMESPACE_BINDINGS (ns)->end ());
!   for (hash_table<named_decl_hash>::iterator iter
! 	 (DECL_NAMESPACE_BINDINGS (ns)->begin ()); iter != end; ++iter)
      {
        data.binding = nullptr;
        data.met_namespace = false;
!       if (walk_module_binding (*iter, partitions, add_binding_entity, &data))
  	count++;
      }
  
    if (count)
      dump () && dump ("Found %u entries", count);
    dump.outdent ();
--- 14696,14717 ----
    data.partitions = partitions;
    data.hash = this;
  
!   for (tree binding : *DECL_NAMESPACE_BINDINGS (ns))
      {
        data.binding = nullptr;
        data.met_namespace = false;
!       if (walk_module_binding (binding, partitions, add_binding_entity, &data))
  	count++;
      }
  
+   /* Seed any using-directives so that we emit the relevant namespaces.  */
+   for (tree udir : NAMESPACE_LEVEL (ns)->using_directives)
+     if (TREE_CODE (udir) == USING_DECL && DECL_MODULE_EXPORT_P (udir))
+       {
+ 	make_dependency (USING_DECL_DECLS (udir), depset::EK_NAMESPACE);
+ 	count++;
+       }
+ 
    if (count)
      dump () && dump ("Found %u entries", count);
    dump.outdent ();
*************** depset::hash::add_deduction_guides (tree
*** 14996,15001 ****
--- 15058,15066 ----
  
        binding->deps.safe_push (dep);
        dep->deps.safe_push (binding);
+       dump (dumper::DEPEND)
+ 	&& dump ("Built binding for deduction guide %C:%N",
+ 		 TREE_CODE (decl), decl);
      }
  }
  
*************** module_state::write_namespaces (elf_out
*** 17073,17087 ****
    bytes_out sec (to);
    sec.begin ();
  
-   hash_map<tree, unsigned> ns_map;
- 
    for (unsigned ix = 0; ix != num; ix++)
      {
        depset *b = spaces[ix];
        tree ns = b->get_entity ();
  
-       ns_map.put (ns, ix);
- 
        /* This could be an anonymous namespace even for a named module,
  	 since we can still emit no-linkage decls.  */
        gcc_checking_assert (TREE_CODE (ns) == NAMESPACE_DECL);
--- 17138,17148 ----
*************** module_state::write_namespaces (elf_out
*** 17123,17153 ****
  	}
      }
  
-   /* Now write exported using-directives, as a sequence of 1-origin indices in
-      the spaces array (not entity indices): First the using namespace, then the
-      used namespaces.  And then a zero terminating the list.  :: is
-      represented as index -1.  */
-   auto emit_one_ns = [&](unsigned ix, tree ns) {
-     for (auto udir: NAMESPACE_LEVEL (ns)->using_directives)
-       {
- 	if (TREE_CODE (udir) != USING_DECL || !DECL_MODULE_EXPORT_P (udir))
- 	  continue;
- 	tree ns2 = USING_DECL_DECLS (udir);
- 	dump() && dump ("Writing using-directive in %N for %N",
- 			ns, ns2);
- 	sec.u (ix);
- 	sec.u (*ns_map.get (ns2) + 1);
-       }
-   };
-   emit_one_ns (-1, global_namespace);
-   for (unsigned ix = 0; ix != num; ix++)
-     {
-       depset *b = spaces[ix];
-       tree ns = b->get_entity ();
-       emit_one_ns (ix + 1, ns);
-     }
-   sec.u (0);
- 
    sec.end (to, to->name (MOD_SNAME_PFX ".nms"), crc_p);
    dump.outdent ();
  }
--- 17184,17189 ----
*************** module_state::read_namespaces (unsigned
*** 17166,17173 ****
    dump () && dump ("Reading namespaces");
    dump.indent ();
  
-   tree *ns_map = XALLOCAVEC (tree, num);
- 
    for (unsigned ix = 0; ix != num; ix++)
      {
        unsigned entity_index = sec.u ();
--- 17202,17207 ----
*************** module_state::read_namespaces (unsigned
*** 17229,17236 ****
  	DECL_ATTRIBUTES (inner)
  	  = tree_cons (get_identifier ("abi_tag"), tags, DECL_ATTRIBUTES (inner));
  
-       ns_map[ix] = inner;
- 
        /* Install the namespace.  */
        (*entity_ary)[entity_lwm + entity_index] = inner;
        if (DECL_MODULE_IMPORT_P (inner))
--- 17263,17268 ----
*************** module_state::read_namespaces (unsigned
*** 17246,17286 ****
  	}
      }
  
!   /* Read the exported using-directives.  */
!   while (unsigned ix = sec.u ())
      {
!       tree ns;
!       if (ix == (unsigned)-1)
! 	ns = global_namespace;
!       else
! 	{
! 	  if (--ix >= num)
! 	    {
! 	      sec.set_overrun ();
! 	      break;
! 	    }
! 	  ns = ns_map [ix];
! 	}
!       unsigned ix2 = sec.u ();
!       if (--ix2 >= num)
! 	{
! 	  sec.set_overrun ();
! 	  break;
! 	}
!       tree ns2 = ns_map [ix2];
!       if (directness)
  	{
! 	  dump() && dump ("Reading using-directive in %N for %N",
! 			  ns, ns2);
! 	  /* In an export import this will mark the using-directive as
! 	     exported, so it will be emitted again.  */
! 	  add_using_namespace (ns, ns2);
  	}
!       else
! 	/* Ignore using-directives from indirect imports, we only want them
! 	   from our own imports.  */
! 	dump() && dump ("Ignoring using-directive in %N for %N",
! 			ns, ns2);
      }
  
    dump.outdent ();
--- 17278,17356 ----
  	}
      }
  
!   dump.outdent ();
!   if (!sec.end (from ()))
!     return false;
!   return true;
! }
! 
! unsigned
! module_state::write_using_directives (elf_out *to, depset::hash &table,
! 				      vec<depset *> spaces, unsigned *crc_p)
! {
!   dump () && dump ("Writing using-directives");
!   dump.indent ();
! 
!   bytes_out sec (to);
!   sec.begin ();
! 
!   unsigned num = 0;
!   auto emit_one_ns = [&](depset *parent_dep)
      {
!       tree parent = parent_dep->get_entity ();
!       for (auto udir : NAMESPACE_LEVEL (parent)->using_directives)
  	{
! 	  if (TREE_CODE (udir) != USING_DECL || !DECL_MODULE_EXPORT_P (udir))
! 	    continue;
! 	  tree target = USING_DECL_DECLS (udir);
! 	  depset *target_dep = table.find_dependency (target);
! 	  gcc_checking_assert (target_dep);
! 
! 	  dump () && dump ("Writing using-directive in %N for %N",
! 			   parent, target);
! 	  write_namespace (sec, parent_dep);
! 	  write_namespace (sec, target_dep);
! 	  ++num;
  	}
!     };
! 
!   emit_one_ns (table.find_dependency (global_namespace));
!   for (depset *parent_dep : spaces)
!     emit_one_ns (parent_dep);
! 
!   sec.end (to, to->name (MOD_SNAME_PFX ".udi"), crc_p);
!   dump.outdent ();
! 
!   return num;
! }
! 
! bool
! module_state::read_using_directives (unsigned num)
! {
!   if (!bitmap_bit_p ((*modules)[0]->imports, mod))
!     {
!       dump () && dump ("Ignoring using-directives because module %M "
! 		       "is not visible in this TU", this);
!       return true;
!     }
! 
!   bytes_in sec;
! 
!   if (!sec.begin (loc, from (), MOD_SNAME_PFX ".udi"))
!     return false;
! 
!   dump () && dump ("Reading using-directives");
!   dump.indent ();
! 
!   for (unsigned ix = 0; ix != num; ++ix)
!     {
!       tree parent = read_namespace (sec);
!       tree target = read_namespace (sec);
!       if (sec.get_overrun ())
! 	break;
! 
!       dump () && dump ("Read using-directive in %N for %N", parent, target);
!       add_using_namespace (parent, target);
      }
  
    dump.outdent ();
*************** module_state::write_counts (elf_out *to,
*** 19802,19807 ****
--- 19872,19878 ----
        dump ("Pendings %u", counts[MSC_pendings]);
        dump ("Entities %u", counts[MSC_entities]);
        dump ("Namespaces %u", counts[MSC_namespaces]);
+       dump ("Using-directives %u", counts[MSC_using_directives]);
        dump ("Macros %u", counts[MSC_macros]);
        dump ("Initializers %u", counts[MSC_inits]);
      }
*************** module_state::read_counts (unsigned coun
*** 19828,19833 ****
--- 19899,19905 ----
        dump ("Pendings %u", counts[MSC_pendings]);
        dump ("Entities %u", counts[MSC_entities]);
        dump ("Namespaces %u", counts[MSC_namespaces]);
+       dump ("Using-directives %u", counts[MSC_using_directives]);
        dump ("Macros %u", counts[MSC_macros]);
        dump ("Initializers %u", counts[MSC_inits]);
      }
*************** ool_cmp (const void *a_, const void *b_)
*** 20110,20116 ****
       qualified-names	    : binding value(s)
       MOD_SNAME_PFX.README   : human readable, strings
       MOD_SNAME_PFX.ENV      : environment strings, strings
!      MOD_SNAME_PFX.nms 	    : namespace hierarchy
       MOD_SNAME_PFX.bnd      : binding table
       MOD_SNAME_PFX.spc      : specialization table
       MOD_SNAME_PFX.imp      : import table
--- 20182,20189 ----
       qualified-names	    : binding value(s)
       MOD_SNAME_PFX.README   : human readable, strings
       MOD_SNAME_PFX.ENV      : environment strings, strings
!      MOD_SNAME_PFX.nms      : namespace hierarchy
!      MOD_SNAME_PFX.udi      : namespace using-directives
       MOD_SNAME_PFX.bnd      : binding table
       MOD_SNAME_PFX.spc      : specialization table
       MOD_SNAME_PFX.imp      : import table
*************** module_state::write_begin (elf_out *to,
*** 20356,20361 ****
--- 20429,20439 ----
    if (counts[MSC_namespaces])
      write_namespaces (to, spaces, counts[MSC_namespaces], &crc);
  
+   /* Write any using-directives.  */
+   if (counts[MSC_namespaces])
+     counts[MSC_using_directives]
+       = write_using_directives (to, table, spaces, &crc);
+ 
    /* Write the bindings themselves.  */
    counts[MSC_bindings] = write_bindings (to, sccs, &crc);
  
*************** module_state::read_language (bool outerm
*** 20607,20617 ****
  			 counts[MSC_sec_lwm], counts[MSC_sec_hwm]))
      ok = false;
  
!   /* Read the namespace hierarchy. */
    if (ok && counts[MSC_namespaces]
        && !read_namespaces (counts[MSC_namespaces]))
      ok = false;
  
    if (ok && !read_bindings (counts[MSC_bindings],
  			    counts[MSC_sec_lwm], counts[MSC_sec_hwm]))
      ok = false;
--- 20685,20700 ----
  			 counts[MSC_sec_lwm], counts[MSC_sec_hwm]))
      ok = false;
  
!   /* Read the namespace hierarchy.  */
    if (ok && counts[MSC_namespaces]
        && !read_namespaces (counts[MSC_namespaces]))
      ok = false;
  
+   /* Read any using-directives.  */
+   if (ok && counts[MSC_using_directives]
+       && !read_using_directives (counts[MSC_using_directives]))
+     ok = false;
+ 
    if (ok && !read_bindings (counts[MSC_bindings],
  			    counts[MSC_sec_lwm], counts[MSC_sec_hwm]))
      ok = false;
*************** path_of_instantiation (tinst_level *tins
*** 20832,20839 ****
  {
    gcc_checking_assert (modules_p ());
  
!   if (!tinst)
      {
        /* Not inside an instantiation, just the regular case.  */
        *path_map_p = nullptr;
        return get_import_bitmap ();
--- 20915,20923 ----
  {
    gcc_checking_assert (modules_p ());
  
!   if (!tinst || TREE_CODE (tinst->tldcl) == TEMPLATE_FOR_STMT)
      {
+       gcc_assert (!tinst || !tinst->next);
        /* Not inside an instantiation, just the regular case.  */
        *path_map_p = nullptr;
        return get_import_bitmap ();
*************** direct_import (module_state *import, cpp
*** 21697,21702 ****
--- 21781,21788 ----
      if (!import->do_import (reader, true))
        gcc_unreachable ();
  
+   (*modules)[0]->set_import (import, import->exported_p);
+ 
    if (import->loadedness < ML_LANGUAGE)
      {
        if (!keyed_table)
*************** direct_import (module_state *import, cpp
*** 21704,21711 ****
        import->read_language (true);
      }
  
-   (*modules)[0]->set_import (import, import->exported_p);
- 
    dump.pop (n);
    timevar_stop (TV_MODULE_IMPORT);
  }
--- 21790,21795 ----
diff -Nrcpad gcc-16-20250831/gcc/cp/name-lookup.cc gcc-16-20250907/gcc/cp/name-lookup.cc
*** gcc-16-20250831/gcc/cp/name-lookup.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/name-lookup.cc	Sun Sep  7 22:32:59 2025
*************** private:
*** 550,556 ****
    void adl_class_only (tree);
    void adl_namespace (tree);
    void adl_class_fns (tree);
!   void adl_namespace_fns (tree, bitmap);
  
  public:
    /* Search namespace + inlines + maybe usings as qualified lookup.  */
--- 550,556 ----
    void adl_class_only (tree);
    void adl_namespace (tree);
    void adl_class_fns (tree);
!   void adl_namespace_fns (tree, bitmap, bitmap, bitmap);
  
  public:
    /* Search namespace + inlines + maybe usings as qualified lookup.  */
*************** name_lookup::add_fns (tree fns)
*** 1205,1214 ****
    add_overload (fns);
  }
  
! /* Add the overloaded fns of SCOPE.  */
  
  void
! name_lookup::adl_namespace_fns (tree scope, bitmap imports)
  {
    if (tree *binding = find_namespace_slot (scope, name))
      {
--- 1205,1220 ----
    add_overload (fns);
  }
  
! /* Add the overloaded fns of SCOPE.  IMPORTS is the list of visible modules
!    for this lookup. INST_PATH for dependent (2nd phase) ADL is the list of
!    modules on the instantiation context for this lookup, or otherwise NULL.
!    ASSOCS is the list of modules where this namespace shares an innermost
!    non-inline namespace with an associated entity attached to said module,
!    or NULL if there are none.  */
  
  void
! name_lookup::adl_namespace_fns (tree scope, bitmap imports,
! 				bitmap inst_path, bitmap assocs)
  {
    if (tree *binding = find_namespace_slot (scope, name))
      {
*************** name_lookup::adl_namespace_fns (tree sco
*** 1257,1275 ****
  	  for (; ix--; cluster++)
  	    for (unsigned jx = 0; jx != BINDING_VECTOR_SLOTS_PER_CLUSTER; jx++)
  	      {
  		/* Functions are never on merged slots.  */
! 		if (!cluster->indices[jx].base
! 		    || cluster->indices[jx].span != 1)
  		  continue;
  
! 		/* Is this slot visible?  */
! 		if (!bitmap_bit_p (imports, cluster->indices[jx].base))
  		  continue;
  
! 		/* Is it loaded.  */
  		if (cluster->slots[jx].is_lazy ())
! 		  lazy_load_binding (cluster->indices[jx].base,
! 				     scope, name, &cluster->slots[jx]);
  
  		tree bind = cluster->slots[jx];
  		if (!bind)
--- 1263,1284 ----
  	  for (; ix--; cluster++)
  	    for (unsigned jx = 0; jx != BINDING_VECTOR_SLOTS_PER_CLUSTER; jx++)
  	      {
+ 		int mod = cluster->indices[jx].base;
+ 
  		/* Functions are never on merged slots.  */
! 		if (!mod || cluster->indices[jx].span != 1)
  		  continue;
  
! 		/* Is this slot accessible here?  */
! 		bool visible = bitmap_bit_p (imports, mod);
! 		bool on_inst_path = inst_path && bitmap_bit_p (inst_path, mod);
! 		if (!visible && !on_inst_path
! 		    && !(assocs && bitmap_bit_p (assocs, mod)))
  		  continue;
  
! 		/* Is it loaded?  */
  		if (cluster->slots[jx].is_lazy ())
! 		  lazy_load_binding (mod, scope, name, &cluster->slots[jx]);
  
  		tree bind = cluster->slots[jx];
  		if (!bind)
*************** name_lookup::adl_namespace_fns (tree sco
*** 1294,1303 ****
  			dup_detect |= dup;
  		      }
  
! 		    bind = STAT_VISIBLE (bind);
  		  }
  
! 		add_fns (bind);
  	      }
  	}
      }
--- 1303,1328 ----
  			dup_detect |= dup;
  		      }
  
! 		    /* For lookups on the instantiation path we can see any
! 		       module-linkage declaration; otherwise we should only
! 		       see exported decls.  */
! 		    if (!on_inst_path)
! 		      bind = STAT_VISIBLE (bind);
  		  }
  
! 		if (on_inst_path || visible)
! 		  add_fns (bind);
! 		else
! 		  {
! 		    /* We're only accessible because we're the same module as
! 		       an associated entity with module attachment: only add
! 		       functions actually attached to this module.  */
! 		    for (tree fn : ovl_range (bind))
! 		      if (DECL_DECLARES_FUNCTION_P (fn)
! 			  && DECL_LANG_SPECIFIC (STRIP_TEMPLATE (fn))
! 			  && DECL_MODULE_ATTACH_P (STRIP_TEMPLATE (fn)))
! 			add_overload (fn);
! 		  }
  	      }
  	}
      }
*************** name_lookup::search_adl (tree fns, vec<t
*** 1632,1637 ****
--- 1657,1688 ----
        if (fns)
  	dedup (true);
  
+       /* First get the attached modules for each innermost non-inline
+ 	 namespace of an associated entity.  */
+       bitmap_obstack_initialize (NULL);
+       hash_map<tree, bitmap> ns_mod_assocs;
+       if (modules_p ())
+ 	{
+ 	  for (tree scope : scopes)
+ 	    if (TYPE_P (scope))
+ 	      {
+ 		int mod = get_originating_module (TYPE_NAME (scope),
+ 						  /*global_m1=*/true);
+ 		if (mod > 0)
+ 		  {
+ 		    tree ctx = decl_namespace_context (scope);
+ 		    while (DECL_NAMESPACE_INLINE_P (ctx))
+ 		      ctx = CP_DECL_CONTEXT (ctx);
+ 
+ 		    bool existed = false;
+ 		    bitmap &b = ns_mod_assocs.get_or_insert (ctx, &existed);
+ 		    if (!existed)
+ 		      b = BITMAP_ALLOC (NULL);
+ 		    bitmap_set_bit (b, mod);
+ 		  }
+ 	      }
+ 	}
+ 
        /* INST_PATH will be NULL, if this is /not/ 2nd-phase ADL.  */
        bitmap inst_path = NULL;
        /* VISIBLE is the regular import bitmap.  */
*************** name_lookup::search_adl (tree fns, vec<t
*** 1641,1706 ****
  	{
  	  tree scope = (*scopes)[ix];
  	  if (TREE_CODE (scope) == NAMESPACE_DECL)
- 	    adl_namespace_fns (scope, visible);
- 	  else
  	    {
! 	      if (RECORD_OR_UNION_TYPE_P (scope))
! 		adl_class_fns (scope);
! 
! 	      /* During 2nd phase ADL: Any exported declaration D in N
! 		 declared within the purview of a named module M
! 		 (10.2) is visible if there is an associated entity
! 		 attached to M with the same innermost enclosing
! 		 non-inline namespace as D.
! 		 [basic.lookup.argdep]/4.4 */
! 
! 	      if (!inst_path)
! 		/* Not 2nd phase.  */
! 		continue;
! 
! 	      tree ctx = CP_DECL_CONTEXT (TYPE_NAME (scope));
! 	      if (TREE_CODE (ctx) != NAMESPACE_DECL)
! 		/* Not namespace-scope class.  */
! 		continue;
! 
! 	      tree origin = get_originating_module_decl (TYPE_NAME (scope));
! 	      tree not_tmpl = STRIP_TEMPLATE (origin);
! 	      if (!DECL_LANG_SPECIFIC (not_tmpl)
! 		  || !DECL_MODULE_IMPORT_P (not_tmpl))
! 		/* Not imported.  */
! 		continue;
! 
! 	      unsigned module = get_importing_module (origin);
! 
! 	      if (!bitmap_bit_p (inst_path, module))
! 		/* Not on path of instantiation.  */
! 		continue;
! 
! 	      if (bitmap_bit_p (visible, module))
! 		/* If the module was in the visible set, we'll look at
! 		   its namespace partition anyway.  */
! 		continue;
! 
! 	      if (tree *slot = find_namespace_slot (ctx, name, false))
! 		if (binding_slot *mslot = search_imported_binding_slot (slot, module))
! 		  {
! 		    if (mslot->is_lazy ())
! 		      lazy_load_binding (module, ctx, name, mslot);
! 
! 		    if (tree bind = *mslot)
! 		      {
! 			/* We must turn on deduping, because some other class
! 			   from this module might also be in this namespace.  */
! 			dedup (true);
! 
! 			/* Add the exported fns  */
! 			if (STAT_HACK_P (bind))
! 			  add_fns (STAT_VISIBLE (bind));
! 		      }
! 		  }
  	    }
  	}
  
        fns = value;
        dedup (false);
      }
--- 1692,1713 ----
  	{
  	  tree scope = (*scopes)[ix];
  	  if (TREE_CODE (scope) == NAMESPACE_DECL)
  	    {
! 	      tree ctx = scope;
! 	      while (DECL_NAMESPACE_INLINE_P (ctx))
! 		ctx = CP_DECL_CONTEXT (ctx);
! 	      bitmap *assocs = ns_mod_assocs.get (ctx);
! 	      adl_namespace_fns (scope, visible, inst_path,
! 				 assocs ? *assocs : NULL);
  	    }
+ 	  else if (RECORD_OR_UNION_TYPE_P (scope))
+ 	    adl_class_fns (scope);
  	}
  
+       for (auto refs : ns_mod_assocs)
+ 	BITMAP_FREE (refs.second);
+       bitmap_obstack_release (NULL);
+ 
        fns = value;
        dedup (false);
      }
*************** pop_nested_namespace (tree ns)
*** 8950,8969 ****
  static void
  add_using_namespace (vec<tree, va_gc> *&usings, tree target)
  {
    if (usings)
!     for (unsigned ix = usings->length (); ix--;)
!       if ((*usings)[ix] == target)
! 	return;
  
    if (modules_p ())
      {
!       tree u = build_lang_decl (USING_DECL, NULL_TREE, NULL_TREE);
!       USING_DECL_DECLS (u) = target;
!       DECL_MODULE_EXPORT_P (u) = module_exporting_p ();
!       DECL_MODULE_PURVIEW_P (u) = module_purview_p ();
!       target = u;
      }
!   vec_safe_push (usings, target);
  }
  
  /* Convenience overload for the above, taking the user as its first
--- 8957,8990 ----
  static void
  add_using_namespace (vec<tree, va_gc> *&usings, tree target)
  {
+   /* Find if this using already exists.  */
+   tree old = NULL_TREE;
    if (usings)
!     for (tree t : *usings)
!       if (USING_DECL_DECLS (t) == target)
! 	{
! 	  old = t;
! 	  break;
! 	}
! 
!   tree decl = old;
!   if (!decl)
!     {
!       decl = build_lang_decl (USING_DECL, NULL_TREE, NULL_TREE);
!       USING_DECL_DECLS (decl) = target;
!     }
  
+   /* Update purviewness and exportedness in case that has changed.  */
    if (modules_p ())
      {
!       if (module_purview_p ())
! 	DECL_MODULE_PURVIEW_P (decl) = true;
!       if (module_exporting_p ())
! 	DECL_MODULE_EXPORT_P (decl) = true;
      }
! 
!   if (!old)
!     vec_safe_push (usings, decl);
  }
  
  /* Convenience overload for the above, taking the user as its first
*************** push_namespace (tree name, bool make_inl
*** 9273,9278 ****
--- 9294,9302 ----
  		  gcc_checking_assert (!(tree)slot || (tree)slot == ctx);
  		  slot = ctx;
  		}
+ 
+ 	      if (module_purview_p ())
+ 		DECL_MODULE_PURVIEW_P (ctx) = true;
  	    }
  	}
  
diff -Nrcpad gcc-16-20250831/gcc/cp/parser.cc gcc-16-20250907/gcc/cp/parser.cc
*** gcc-16-20250831/gcc/cp/parser.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/parser.cc	Sun Sep  7 22:32:59 2025
*************** cp_parser_import_declaration (cp_parser
*** 16267,16279 ****
  		      " must not be from header inclusion");
  	}
  
-       auto mk = module_kind;
-       if (exporting)
- 	module_kind |= MK_EXPORTING;
- 
        import_module (mod, token->location, exporting, attrs, parse_in);
- 
-       module_kind = mk;
      }
  }
  
--- 16267,16273 ----
diff -Nrcpad gcc-16-20250831/gcc/cp/pt.cc gcc-16-20250907/gcc/cp/pt.cc
*** gcc-16-20250831/gcc/cp/pt.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/pt.cc	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 49,54 ****
--- 49,55 ----
  #include "builtins.h"
  #include "omp-general.h"
  #include "pretty-print-markup.h"
+ #include "contracts.h"
  
  /* The type of functions taking a tree, and some additional data, and
     returning an int.  */
*************** tsubst_decl (tree t, tree args, tsubst_f
*** 16033,16041 ****
  				       == TYPE_MAIN_VARIANT (type));
  		SET_DECL_VALUE_EXPR (r, ve);
  	      }
- 	    if (CP_DECL_THREAD_LOCAL_P (r)
- 		&& !processing_template_decl)
- 	      set_decl_tls_model (r, decl_default_tls_model (r));
  	  }
  	else if (DECL_SELF_REFERENCE_P (t))
  	  SET_DECL_SELF_REFERENCE_P (r);
--- 16034,16039 ----
*************** tsubst_decl (tree t, tree args, tsubst_f
*** 16098,16103 ****
--- 16096,16106 ----
  	      register_local_specialization (r, t);
  	  }
  
+ 	if (VAR_P (r)
+ 	    && CP_DECL_THREAD_LOCAL_P (r)
+ 	    && !processing_template_decl)
+ 	  set_decl_tls_model (r, decl_default_tls_model (r));
+ 
  	DECL_CHAIN (r) = NULL_TREE;
  
  	if (!apply_late_template_attributes (&r, DECL_ATTRIBUTES (r),
*************** tsubst_expr (tree t, tree args, tsubst_f
*** 22091,22098 ****
--- 22094,22107 ----
  	  }
  	else if (TREE_CODE (member) == FIELD_DECL)
  	  {
+ 	    /* Assume access of this FIELD_DECL has already been checked; we
+ 	       don't recheck it to avoid bogus access errors when substituting
+ 	       a reduced constant initializer (97740).  */
+ 	    gcc_checking_assert (TREE_CODE (TREE_OPERAND (t, 1)) == FIELD_DECL);
+ 	    push_deferring_access_checks (dk_deferred);
  	    r = finish_non_static_data_member (member, object, NULL_TREE,
  					       complain);
+ 	    pop_deferring_access_checks ();
  	    if (REF_PARENTHESIZED_P (t))
  	      r = force_paren_expr (r);
  	    RETURN (r);
diff -Nrcpad gcc-16-20250831/gcc/cp/ptree.cc gcc-16-20250907/gcc/cp/ptree.cc
*** gcc-16-20250831/gcc/cp/ptree.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/ptree.cc	Sun Sep  7 22:32:59 2025
*************** cxx_print_xnode (FILE *file, tree node,
*** 355,360 ****
--- 355,361 ----
        print_node (file, "template", TI_TEMPLATE (node), indent+4);
        print_node (file, "args", TI_ARGS (node), indent+4);
        if (TI_TEMPLATE (node)
+ 	  && TREE_CODE (TI_TEMPLATE (node)) == TEMPLATE_DECL
  	  && PRIMARY_TEMPLATE_P (TI_TEMPLATE (node)))
  	print_node (file, "partial", TI_PARTIAL_INFO (node), indent+4);
        if (TI_PENDING_TEMPLATE_FLAG (node))
diff -Nrcpad gcc-16-20250831/gcc/cp/search.cc gcc-16-20250907/gcc/cp/search.cc
*** gcc-16-20250831/gcc/cp/search.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/search.cc	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 31,36 ****
--- 31,37 ----
  #include "stringpool.h"
  #include "attribs.h"
  #include "tree-inline.h"
+ #include "contracts.h"
  
  static int is_subobject_of_p (tree, tree);
  static tree dfs_lookup_base (tree, void *);
diff -Nrcpad gcc-16-20250831/gcc/cp/semantics.cc gcc-16-20250907/gcc/cp/semantics.cc
*** gcc-16-20250831/gcc/cp/semantics.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/cp/semantics.cc	Sun Sep  7 22:32:59 2025
*************** along with GCC; see the file COPYING3.
*** 46,51 ****
--- 46,52 ----
  #include "predict.h"
  #include "memmodel.h"
  #include "gimplify.h"
+ #include "contracts.h"
  
  /* There routines provide a modular interface to perform many parsing
     operations.  They may therefore be used during actual parsing, or
diff -Nrcpad gcc-16-20250831/gcc/dep-fusion.cc gcc-16-20250907/gcc/dep-fusion.cc
*** gcc-16-20250831/gcc/dep-fusion.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/dep-fusion.cc	Sun Sep  7 22:32:59 2025
***************
*** 0 ****
--- 1,152 ----
+ // Dependency fusion reordering pass.
+ // Copyright (C) 2025 Free Software Foundation, Inc.
+ //
+ // This file is part of GCC.
+ //
+ // GCC is free software; you can redistribute it and/or modify it under
+ // the terms of the GNU General Public License as published by the Free
+ // Software Foundation; either version 3, or (at your option) any later
+ // version.
+ //
+ // GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ // WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ // for more details.
+ //
+ // You should have received a copy of the GNU General Public License
+ // along with GCC; see the file COPYING3.  If not see
+ // <http://www.gnu.org/licenses/>.
+ //
+ // This pass uses the RTL-SSA representation to detect def-use pairs that are
+ // macro-op-fusible in the current microarchitecture (using the
+ // macro_fusion_pair_p () target hook) and place them next to one another, if
+ // possible.
+ 
+ #define INCLUDE_ALGORITHM
+ #define INCLUDE_FUNCTIONAL
+ #define INCLUDE_MEMORY
+ #define INCLUDE_ARRAY
+ #include "config.h"
+ #include "system.h"
+ #include "coretypes.h"
+ #include "backend.h"
+ #include "rtl.h"
+ #include "df.h"
+ #include "rtl-ssa.h"
+ #include "print-rtl.h"
+ #include "tree-pass.h"
+ #include "cfgcleanup.h"
+ #include "target.h"
+ #include "dbgcnt.h"
+ 
+ namespace {
+ const pass_data pass_data_dep_fusion =
+ {
+   RTL_PASS, // type
+   "dep_fusion", // name
+   OPTGROUP_NONE, // optinfo_flags
+   TV_NONE, // tv_id
+   0, // properties_required
+   0, // properties_provided
+   0, // properties_destroyed
+   0, // todo_flags_start
+   TODO_df_finish, // todo_flags_finish
+ };
+ 
+ class pass_dep_fusion : public rtl_opt_pass
+ {
+ public:
+   pass_dep_fusion (gcc::context *ctxt)
+     : rtl_opt_pass (pass_data_dep_fusion, ctxt)
+   {}
+ 
+   // opt_pass methods:
+   opt_pass *clone () final override { return new pass_dep_fusion (m_ctxt); }
+   bool gate (function *) final override;
+   unsigned int execute (function *) final override;
+ };
+ 
+ bool
+ pass_dep_fusion::gate (function *)
+ {
+   return optimize > 0 && flag_dep_fusion;
+ }
+ 
+ unsigned int
+ pass_dep_fusion::execute (function *fn)
+ {
+   // If the target has no macro fusion, there is nothing to be done.
+   if (!targetm.sched.macro_fusion_pair_p)
+     return 0;
+ 
+   // Initialization.
+   calculate_dominance_info (CDI_DOMINATORS);
+   df_analyze ();
+   crtl->ssa = new rtl_ssa::function_info (fn);
+ 
+   init_recog_no_volatile ();
+ 
+   for (rtl_ssa::insn_info *insn = *crtl->ssa->nondebug_insns ().begin ();
+        insn;
+        insn = insn->next_nondebug_insn ())
+     {
+       if (!insn->can_be_optimized () || insn->num_defs () != 1)
+        continue;
+ 
+       rtl_ssa::set_info *def = single_set_info (insn);
+       if (!def)
+        continue;
+ 
+       rtl_ssa::use_info *use_insn = def->single_nondebug_insn_use ();
+       if (!use_insn
+ 	  || !use_insn->insn ()->can_be_optimized ()
+ 	  || !targetm.sched.macro_fusion_pair_p (insn->rtl (),
+ 						 use_insn->insn ()->rtl ()))
+        continue;
+ 
+       auto attempt = crtl->ssa->new_change_attempt ();
+       rtl_ssa::insn_change change (use_insn->insn ());
+ 
+       if (use_insn->insn () != insn->next_any_insn ())
+ 	{
+ 	  if (!can_move_insn_p (use_insn->insn ()))
+ 	    continue;
+ 
+ 	  change.move_range = insn;
+ 	  if (!rtl_ssa::restrict_movement (change))
+ 	    continue;
+ 
+ 	  if (dump_file && (dump_flags & TDF_DETAILS))
+ 	    {
+ 	      fprintf (dump_file, "Moved a single-use instruction:\n");
+ 	      dump_insn_slim (dump_file, use_insn->insn ()->rtl ());
+ 	      fprintf (dump_file, "right after its definition:\n");
+ 	      dump_insn_slim (dump_file, insn->rtl ());
+ 	    }
+ 	}
+ 
+       SCHED_GROUP_P (use_insn->insn ()->rtl ()) = 1;
+       confirm_change_group ();
+       crtl->ssa->change_insn (change);
+     }
+ 
+   // Finalization.
+   if (crtl->ssa->perform_pending_updates ())
+     cleanup_cfg (0);
+ 
+   delete crtl->ssa;
+ 
+   init_recog ();
+   free_dominance_info (CDI_DOMINATORS);
+   return 0;
+ }
+ 
+ } // end namespace
+ 
+ // Create a new dep fusion pass instance.
+ 
+ rtl_opt_pass *
+ make_pass_dep_fusion (gcc::context *ctxt)
+ {
+   return new pass_dep_fusion (ctxt);
+ }
diff -Nrcpad gcc-16-20250831/gcc/diagnostics/logging.h gcc-16-20250907/gcc/diagnostics/logging.h
*** gcc-16-20250831/gcc/diagnostics/logging.h	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/diagnostics/logging.h	Sun Sep  7 22:32:59 2025
*************** public:
*** 127,133 ****
  	add_any_comma ();
  	fprintf (m_logger->get_stream (),
  		 "%s: " HOST_SIZE_T_PRINT_HEX,
! 		 name, (size_t)value);
        }
      return *this;
    }
--- 127,133 ----
  	add_any_comma ();
  	fprintf (m_logger->get_stream (),
  		 "%s: " HOST_SIZE_T_PRINT_HEX,
! 		 name, (fmt_size_t)value);
        }
      return *this;
    }
diff -Nrcpad gcc-16-20250831/gcc/doc/extend.texi gcc-16-20250907/gcc/doc/extend.texi
*** gcc-16-20250831/gcc/doc/extend.texi	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/doc/extend.texi	Sun Sep  7 22:32:59 2025
*************** align them on any target.
*** 7140,7145 ****
--- 7140,7224 ----
  The @code{aligned} attribute can also be used for functions
  (@pxref{Common Function Attributes}.)
  
+ @cindex @code{alloc_size} variable attribute
+ @item alloc_size (@var{position})
+ @itemx alloc_size (@var{position-1}, @var{position-2})
+ The @code{alloc_size} variable attribute may be applied to the declaration
+ of a pointer to a function that returns a pointer and takes at least one
+ argument of an integer type.  It indicates that the returned pointer points
+ to an object whose size is given by the function argument at @var{position},
+ or by the product of the arguments at @var{position-1} and @var{position-2}.
+ Meaningful sizes are positive values less than @code{PTRDIFF_MAX}.  Other
+ sizes are diagnosed when detected.  GCC uses this information to improve
+ the results of @code{__builtin_object_size}.
+ 
+ For instance, the following declarations
+ 
+ @smallexample
+ typedef __attribute__ ((alloc_size (1, 2))) void*
+   (*calloc_ptr) (size_t, size_t);
+ typedef __attribute__ ((alloc_size (1))) void*
+   (*malloc_ptr) (size_t);
+ @end smallexample
+ 
+ @noindent
+ specify that @code{calloc_ptr} is a pointer of a function that, like
+ the standard C function @code{calloc}, returns an object whose size
+ is given by the product of arguments 1 and 2, and similarly, that
+ @code{malloc_ptr}, like the standard C function @code{malloc},
+ returns an object whose size is given by argument 1 to the function.
+ 
+ @cindex @code{cleanup} variable attribute
+ @item cleanup (@var{cleanup_function})
+ The @code{cleanup} attribute runs a function when the variable goes
+ out of scope.  This attribute can only be applied to auto function
+ scope variables; it may not be applied to parameters or variables
+ with static storage duration.  The function must take one parameter,
+ a pointer to a type compatible with the variable.  The return value
+ of the function (if any) is ignored.
+ 
+ When multiple variables in the same scope have @code{cleanup}
+ attributes, at exit from the scope their associated cleanup functions
+ are run in reverse order of definition (last defined, first
+ cleanup).
+ 
+ If @option{-fexceptions} is enabled, then @var{cleanup_function}
+ is run during the stack unwinding that happens during the
+ processing of the exception.  Note that the @code{cleanup} attribute
+ does not allow the exception to be caught, only to perform an action.
+ It is undefined what happens if @var{cleanup_function} does not
+ return normally.
+ 
+ @cindex @code{common} variable attribute
+ @cindex @code{nocommon} variable attribute
+ @opindex fcommon
+ @opindex fno-common
+ @item common
+ @itemx nocommon
+ The @code{common} attribute requests GCC to place a variable in
+ ``common'' storage.  The @code{nocommon} attribute requests the
+ opposite---to allocate space for it directly.
+ 
+ These attributes override the default chosen by the
+ @option{-fno-common} and @option{-fcommon} flags respectively.
+ 
+ @cindex @code{copy} variable attribute
+ @item copy
+ @itemx copy (@var{variable})
+ The @code{copy} attribute applies the set of attributes with which
+ @var{variable} has been declared to the declaration of the variable
+ to which the attribute is applied.  The attribute is designed for
+ libraries that define aliases that are expected to specify the same
+ set of attributes as the aliased symbols.  The @code{copy} attribute
+ can be used with variables, functions or types.  However, the kind
+ of symbol to which the attribute is applied (either varible or
+ function) must match the kind of symbol to which the argument refers.
+ The @code{copy} attribute copies only syntactic and semantic attributes
+ but not attributes that affect a symbol's linkage or visibility such as
+ @code{alias}, @code{visibility}, or @code{weak}.  The @code{deprecated}
+ attribute is also not copied.  @xref{Common Function Attributes}.
+ @xref{Common Type Attributes}.
+ 
  @cindex @code{counted_by} variable attribute
  @item counted_by (@var{count})
  The @code{counted_by} attribute may be attached to the C99 flexible array
*************** in @code{p->array}.
*** 7243,7327 ****
  
  Note, however, the above feature is not valid for the pointer field.
  
- @cindex @code{alloc_size} variable attribute
- @item alloc_size (@var{position})
- @itemx alloc_size (@var{position-1}, @var{position-2})
- The @code{alloc_size} variable attribute may be applied to the declaration
- of a pointer to a function that returns a pointer and takes at least one
- argument of an integer type.  It indicates that the returned pointer points
- to an object whose size is given by the function argument at @var{position},
- or by the product of the arguments at @var{position-1} and @var{position-2}.
- Meaningful sizes are positive values less than @code{PTRDIFF_MAX}.  Other
- sizes are diagnosed when detected.  GCC uses this information to improve
- the results of @code{__builtin_object_size}.
- 
- For instance, the following declarations
- 
- @smallexample
- typedef __attribute__ ((alloc_size (1, 2))) void*
-   (*calloc_ptr) (size_t, size_t);
- typedef __attribute__ ((alloc_size (1))) void*
-   (*malloc_ptr) (size_t);
- @end smallexample
- 
- @noindent
- specify that @code{calloc_ptr} is a pointer of a function that, like
- the standard C function @code{calloc}, returns an object whose size
- is given by the product of arguments 1 and 2, and similarly, that
- @code{malloc_ptr}, like the standard C function @code{malloc},
- returns an object whose size is given by argument 1 to the function.
- 
- @cindex @code{cleanup} variable attribute
- @item cleanup (@var{cleanup_function})
- The @code{cleanup} attribute runs a function when the variable goes
- out of scope.  This attribute can only be applied to auto function
- scope variables; it may not be applied to parameters or variables
- with static storage duration.  The function must take one parameter,
- a pointer to a type compatible with the variable.  The return value
- of the function (if any) is ignored.
- 
- When multiple variables in the same scope have @code{cleanup}
- attributes, at exit from the scope their associated cleanup functions
- are run in reverse order of definition (last defined, first
- cleanup).
- 
- If @option{-fexceptions} is enabled, then @var{cleanup_function}
- is run during the stack unwinding that happens during the
- processing of the exception.  Note that the @code{cleanup} attribute
- does not allow the exception to be caught, only to perform an action.
- It is undefined what happens if @var{cleanup_function} does not
- return normally.
- 
- @cindex @code{common} variable attribute
- @cindex @code{nocommon} variable attribute
- @opindex fcommon
- @opindex fno-common
- @item common
- @itemx nocommon
- The @code{common} attribute requests GCC to place a variable in
- ``common'' storage.  The @code{nocommon} attribute requests the
- opposite---to allocate space for it directly.
- 
- These attributes override the default chosen by the
- @option{-fno-common} and @option{-fcommon} flags respectively.
- 
- @cindex @code{copy} variable attribute
- @item copy
- @itemx copy (@var{variable})
- The @code{copy} attribute applies the set of attributes with which
- @var{variable} has been declared to the declaration of the variable
- to which the attribute is applied.  The attribute is designed for
- libraries that define aliases that are expected to specify the same
- set of attributes as the aliased symbols.  The @code{copy} attribute
- can be used with variables, functions or types.  However, the kind
- of symbol to which the attribute is applied (either varible or
- function) must match the kind of symbol to which the argument refers.
- The @code{copy} attribute copies only syntactic and semantic attributes
- but not attributes that affect a symbol's linkage or visibility such as
- @code{alias}, @code{visibility}, or @code{weak}.  The @code{deprecated}
- attribute is also not copied.  @xref{Common Function Attributes}.
- @xref{Common Type Attributes}.
- 
  @cindex @code{deprecated} variable attribute
  @item deprecated
  @itemx deprecated (@var{msg})
--- 7322,7327 ----
diff -Nrcpad gcc-16-20250831/gcc/doc/generic.texi gcc-16-20250907/gcc/doc/generic.texi
*** gcc-16-20250831/gcc/doc/generic.texi	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/doc/generic.texi	Sun Sep  7 22:32:59 2025
*************** guarantee that @code{TYPE_CANONICAL} wil
*** 397,404 ****
  use @code{SET_TYPE_STRUCTURAL_EQUALITY} to make sure that the new
  type--and any type constructed based on it--requires structural
  equality. If you suspect that the canonical type system is
! miscomparing types, pass @code{--param verify-canonical-types=1} to
! the compiler or configure with @code{--enable-checking} to force the
  compiler to verify its canonical-type comparisons against the
  structural comparisons; the compiler will then print any warnings if
  the canonical types miscompare.
--- 397,403 ----
  use @code{SET_TYPE_STRUCTURAL_EQUALITY} to make sure that the new
  type--and any type constructed based on it--requires structural
  equality. If you suspect that the canonical type system is
! miscomparing types, configure with @code{--enable-checking} to force the
  compiler to verify its canonical-type comparisons against the
  structural comparisons; the compiler will then print any warnings if
  the canonical types miscompare.
diff -Nrcpad gcc-16-20250831/gcc/doc/install.texi gcc-16-20250907/gcc/doc/install.texi
*** gcc-16-20250831/gcc/doc/install.texi	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/doc/install.texi	Sun Sep  7 22:32:59 2025
*************** Necessary to build the lexical analysis
*** 383,389 ****
  Necessary for creating some of the generated source files for GCC@.
  If in doubt, use a recent GNU awk version.
  
! @item GNU binutils
  
  Necessary in some circumstances, optional in others.  See the
  host/target specific instructions for your platform for the exact
--- 383,389 ----
  Necessary for creating some of the generated source files for GCC@.
  If in doubt, use a recent GNU awk version.
  
! @item GNU Binutils
  
  Necessary in some circumstances, optional in others.  See the
  host/target specific instructions for your platform for the exact
*************** for riscv*-*-elf*.  The accepted values
*** 1561,1583 ****
  Every config is constructed with four components: architecture string, ABI,
  reuse rule with architecture string and reuse rule with sub-extension.
  
! Example 1: Add multi-lib suppport for rv32i with ilp32.
  @smallexample
  rv32i-ilp32--
  @end smallexample
  
! Example 2: Add multi-lib suppport for rv32i with ilp32 and rv32imafd with ilp32.
  @smallexample
  rv32i-ilp32--;rv32imafd-ilp32--
  @end smallexample
  
! Example 3: Add multi-lib suppport for rv32i with ilp32; rv32im with ilp32 and
  rv32ic with ilp32 will reuse this multi-lib set.
  @smallexample
  rv32i-ilp32-rv32im-c
  @end smallexample
  
! Example 4: Add multi-lib suppport for rv64ima with lp64; rv64imaf with lp64,
  rv64imac with lp64 and rv64imafc with lp64 will reuse this multi-lib set.
  @smallexample
  rv64ima-lp64--f,c,fc
--- 1561,1583 ----
  Every config is constructed with four components: architecture string, ABI,
  reuse rule with architecture string and reuse rule with sub-extension.
  
! Example 1: Add multi-lib support for rv32i with ilp32.
  @smallexample
  rv32i-ilp32--
  @end smallexample
  
! Example 2: Add multi-lib support for rv32i with ilp32 and rv32imafd with ilp32.
  @smallexample
  rv32i-ilp32--;rv32imafd-ilp32--
  @end smallexample
  
! Example 3: Add multi-lib support for rv32i with ilp32; rv32im with ilp32 and
  rv32ic with ilp32 will reuse this multi-lib set.
  @smallexample
  rv32i-ilp32-rv32im-c
  @end smallexample
  
! Example 4: Add multi-lib support for rv64ima with lp64; rv64imaf with lp64,
  rv64imac with lp64 and rv64imafc with lp64 will reuse this multi-lib set.
  @smallexample
  rv64ima-lp64--f,c,fc
*************** rv64ima-lp64--f,c,fc
*** 1588,1600 ****
  config options, @var{val} is a comma separated list of possible code model,
  currently we support medlow and medany.
  
! Example 5: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and
  medlow code model
  @smallexample
  rv64ima-lp64--;--cmodel=medlow
  @end smallexample
  
! Example 6: Add multi-lib suppport for rv64ima with lp64; rv64ima with lp64 and
  medlow code model; rv64ima with lp64 and medany code model
  @smallexample
  rv64ima-lp64--;--cmodel=medlow,medany
--- 1588,1600 ----
  config options, @var{val} is a comma separated list of possible code model,
  currently we support medlow and medany.
  
! Example 5: Add multi-lib support for rv64ima with lp64; rv64ima with lp64 and
  medlow code model
  @smallexample
  rv64ima-lp64--;--cmodel=medlow
  @end smallexample
  
! Example 6: Add multi-lib support for rv64ima with lp64; rv64ima with lp64 and
  medlow code model; rv64ima with lp64 and medany code model
  @smallexample
  rv64ima-lp64--;--cmodel=medlow,medany
*************** libraries.  This option is only supporte
*** 1723,1729 ****
  
  @item --with-fpmath=@var{isa}
  This options sets @option{-mfpmath=sse} by default and specifies the default
! ISA for floating-point arithmetics.  You can select either @samp{sse} which
  enables @option{-msse2} or @samp{avx} which enables @option{-mavx} by default.
  This option is only supported on i386 and x86-64 targets.
  
--- 1723,1729 ----
  
  @item --with-fpmath=@var{isa}
  This options sets @option{-mfpmath=sse} by default and specifies the default
! ISA for floating-point arithmetic.  You can select either @samp{sse} which
  enables @option{-msse2} or @samp{avx} which enables @option{-mavx} by default.
  This option is only supported on i386 and x86-64 targets.
  
*************** On MIPS targets, make @option{-mno-msa}
*** 1867,1873 ****
  @item --with-mips-plt
  On MIPS targets, make use of copy relocations and PLTs.
  These features are extensions to the traditional
! SVR4-based MIPS ABIs and require support from GNU binutils
  and the runtime C library.
  
  @item --with-stack-clash-protection-guard-size=@var{size}
--- 1867,1873 ----
  @item --with-mips-plt
  On MIPS targets, make use of copy relocations and PLTs.
  These features are extensions to the traditional
! SVR4-based MIPS ABIs and require support from GNU Binutils
  and the runtime C library.
  
  @item --with-stack-clash-protection-guard-size=@var{size}
*************** Build runtime libraries using the compil
*** 3302,3308 ****
  
  Note that if an error occurs in any step the make process will exit.
  
! If you are not building GNU binutils in the same source tree as GCC,
  you will need a cross-assembler and cross-linker installed before
  configuring GCC@.  Put them in the directory
  @file{@var{prefix}/@var{target}/bin}.  Here is a table of the tools
--- 3302,3308 ----
  
  Note that if an error occurs in any step the make process will exit.
  
! If you are not building GNU Binutils in the same source tree as GCC,
  you will need a cross-assembler and cross-linker installed before
  configuring GCC@.  Put them in the directory
  @file{@var{prefix}/@var{target}/bin}.  Here is a table of the tools
*************** and that only ROCm 6.4.0 or newer is abl
*** 4100,4106 ****
  
  Use Newlib (4.3.0 or newer; 4.4.0 contains some improvements and 4.5.0 fixes
  the device console output for GFX10 and GFX11 devices; post-4.5.0
! commit 2ef1a37e7 [Mar 25, 2025] fixes a SIMD math issue).
  
  To run the binaries, install the HSA Runtime from the
  @uref{https://rocm.docs.amd.com/,,ROCm Platform}, and use
--- 4100,4107 ----
  
  Use Newlib (4.3.0 or newer; 4.4.0 contains some improvements and 4.5.0 fixes
  the device console output for GFX10 and GFX11 devices; post-4.5.0
! commits 2ef1a37e7 [Mar 25, 2025], f13e8e215 [Aug 8, 2025], and
! bd409f3c1 [Aug 27, 2025] fix SIMD math issues).
  
  To run the binaries, install the HSA Runtime from the
  @uref{https://rocm.docs.amd.com/,,ROCm Platform}, and use
*************** This configuration is intended for embed
*** 4228,4234 ****
  @heading *-*-freebsd*
  FreeBSD using the ELF file format with DWARF 2 debugging.
  
! We recommend bootstrapping against the latest GNU binutils or the
  version found in the @file{devel/binutils} port. This also has been
  known to enable additional features and improve overall testsuite
  results.
--- 4229,4235 ----
  @heading *-*-freebsd*
  FreeBSD using the ELF file format with DWARF 2 debugging.
  
! We recommend bootstrapping against the latest GNU Binutils or the
  version found in the @file{devel/binutils} port. This also has been
  known to enable additional features and improve overall testsuite
  results.
*************** Andes NDS32 target in big endian mode.
*** 4705,4711 ****
  @heading nvptx-*-none
  Nvidia PTX target.
  
! Instead of GNU binutils, you will need to install
  @uref{https://github.com/SourceryTools/nvptx-tools,,nvptx-tools}.
  Tell GCC where to find it:
  @option{--with-build-time-tools=[install-nvptx-tools]/nvptx-none/bin}.
--- 4706,4712 ----
  @heading nvptx-*-none
  Nvidia PTX target.
  
! Instead of GNU Binutils, you will need to install
  @uref{https://github.com/SourceryTools/nvptx-tools,,nvptx-tools}.
  Tell GCC where to find it:
  @option{--with-build-time-tools=[install-nvptx-tools]/nvptx-none/bin}.
*************** The OpenRISC 1000 32-bit processor with
*** 4758,4764 ****
  You can specify a default version for the @option{-mcpu=@var{cpu_type}}
  switch by using the configure option @option{--with-cpu-@var{cpu_type}}.
  
! You will need GNU binutils 2.20 or newer.
  
  @html
  <hr />
--- 4759,4765 ----
  You can specify a default version for the @option{-mcpu=@var{cpu_type}}
  switch by using the configure option @option{--with-cpu-@var{cpu_type}}.
  
! You will need GNU Binutils 2.20 or newer.
  
  @html
  <hr />
*************** assembler in @file{/usr/bin/as} work alm
*** 4944,4958 ****
  --with-as=@//usr/@/gnu/@/bin/@/as}.
  
  For linking, the Solaris linker is preferred.  If you want to use the
! GNU linker instead, the version in Solaris 11.4, from GNU binutils
  2.30.1 or newer (in @file{/usr/gnu/bin/ld} and @file{/usr/bin/gld}),
  works.  However, it
  generally lacks platform specific features, so better stay with Solaris
! @command{ld}.  When using the version from GNU binutils 2.44, there's
  an important caveat: binutils @emph{must} be configured with
  @code{CONFIG_SHELL=/bin/bash}, otherwise the linker's built-in linker
  scripts get corrupted on x86.  To use the LTO linker plugin
! (@option{-fuse-linker-plugin}) with GNU @command{ld}, GNU binutils
  @emph{must} be configured with @option{--enable-largefile}.  To use
  Solaris @command{ld}, we recommend to configure with
  @option{--without-gnu-ld --with-ld=@//usr/@/bin/@/ld} to guarantee the
--- 4945,4959 ----
  --with-as=@//usr/@/gnu/@/bin/@/as}.
  
  For linking, the Solaris linker is preferred.  If you want to use the
! GNU linker instead, the version in Solaris 11.4, from GNU Binutils
  2.30.1 or newer (in @file{/usr/gnu/bin/ld} and @file{/usr/bin/gld}),
  works.  However, it
  generally lacks platform specific features, so better stay with Solaris
! @command{ld}.  When using the version from GNU Binutils 2.44, there's
  an important caveat: binutils @emph{must} be configured with
  @code{CONFIG_SHELL=/bin/bash}, otherwise the linker's built-in linker
  scripts get corrupted on x86.  To use the LTO linker plugin
! (@option{-fuse-linker-plugin}) with GNU @command{ld}, GNU Binutils
  @emph{must} be configured with @option{--enable-largefile}.  To use
  Solaris @command{ld}, we recommend to configure with
  @option{--without-gnu-ld --with-ld=@//usr/@/bin/@/ld} to guarantee the
*************** corruption at runtime in some cases for
*** 4967,4973 ****
  
  To enable symbol versioning in @samp{libstdc++} and other runtime
  libraries with the Solaris linker, you need to have any version of GNU
! @command{c++filt}, which is part of GNU binutils.  Symbol versioning
  will be disabled if no appropriate version is found.  Solaris
  @command{c++filt} from the Solaris Studio compilers does @emph{not}
  work.
--- 4968,4974 ----
  
  To enable symbol versioning in @samp{libstdc++} and other runtime
  libraries with the Solaris linker, you need to have any version of GNU
! @command{c++filt}, which is part of GNU Binutils.  Symbol versioning
  will be disabled if no appropriate version is found.  Solaris
  @command{c++filt} from the Solaris Studio compilers does @emph{not}
  work.
*************** in @uref{prerequisites.html,,the prerequ
*** 5006,5012 ****
  @end html
  @anchor{sparc-sun-solaris2}
  @heading sparc-sun-solaris2*
! When GCC is configured to use GNU binutils 2.14 or later, the binaries
  produced are smaller than the ones produced using Solaris native tools;
  this difference is quite significant for binaries containing debugging
  information.
--- 5007,5013 ----
  @end html
  @anchor{sparc-sun-solaris2}
  @heading sparc-sun-solaris2*
! When GCC is configured to use GNU Binutils 2.14 or later, the binaries
  produced are smaller than the ones produced using Solaris native tools;
  this difference is quite significant for binaries containing debugging
  information.
*************** with Microsoft's C++ compiler and there
*** 5218,5224 ****
  The Cygwin native compiler can be configured to target any 32-bit x86
  cpu architecture desired; the default is i686-pc-cygwin.  It should be
  used with as up-to-date a version of binutils as possible; use either
! the latest official GNU binutils release in the Cygwin distribution,
  or version 2.20 or above if building your own.
  
  @html
--- 5219,5225 ----
  The Cygwin native compiler can be configured to target any 32-bit x86
  cpu architecture desired; the default is i686-pc-cygwin.  It should be
  used with as up-to-date a version of binutils as possible; use either
! the latest official GNU Binutils release in the Cygwin distribution,
  or version 2.20 or above if building your own.
  
  @html
diff -Nrcpad gcc-16-20250831/gcc/doc/invoke.texi gcc-16-20250907/gcc/doc/invoke.texi
*** gcc-16-20250831/gcc/doc/invoke.texi	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/doc/invoke.texi	Sun Sep  7 22:32:59 2025
*************** Objective-C and Objective-C++ Dialects}.
*** 587,594 ****
  -fcse-follow-jumps  -fcse-skip-blocks  -fcx-fortran-rules
  -fcx-limited-range -fcx-method
  -fdata-sections  -fdce  -fdelayed-branch
! -fdelete-null-pointer-checks  -fdevirtualize  -fdevirtualize-speculatively
! -fdevirtualize-at-ltrans  -fdse
  -fearly-inlining  -fipa-sra  -fexpensive-optimizations  -ffat-lto-objects
  -ffast-math  -ffinite-math-only  -ffloat-store  -fexcess-precision=@var{style}
  -ffinite-loops
--- 587,594 ----
  -fcse-follow-jumps  -fcse-skip-blocks  -fcx-fortran-rules
  -fcx-limited-range -fcx-method
  -fdata-sections  -fdce  -fdelayed-branch
! -fdelete-null-pointer-checks  -fdep-fusion -fdevirtualize
! -fdevirtualize-speculatively  -fdevirtualize-at-ltrans  -fdse
  -fearly-inlining  -fipa-sra  -fexpensive-optimizations  -ffat-lto-objects
  -ffast-math  -ffinite-math-only  -ffloat-store  -fexcess-precision=@var{style}
  -ffinite-loops
*************** also turns on the following optimization
*** 13108,13114 ****
  -fcode-hoisting
  -fcrossjumping
  -fcse-follow-jumps  -fcse-skip-blocks
! -fdelete-null-pointer-checks
  -fdevirtualize  -fdevirtualize-speculatively
  -fexpensive-optimizations
  -ffinite-loops
--- 13108,13114 ----
  -fcode-hoisting
  -fcrossjumping
  -fcse-follow-jumps  -fcse-skip-blocks
! -fdelete-null-pointer-checks -fdep-fusion
  -fdevirtualize  -fdevirtualize-speculatively
  -fexpensive-optimizations
  -ffinite-loops
*************** You can always override
*** 15287,15294 ****
  the automatic decision to do link-time optimization
  by passing @option{-fno-lto} to the link command.
  
! To make whole program optimization effective, it is necessary to make
! certain whole program assumptions.  The compiler needs to know
  what functions and variables can be accessed by libraries and runtime
  outside of the link-time optimized unit.  When supported by the linker,
  the linker plugin (see @option{-fuse-linker-plugin}) passes information
--- 15287,15294 ----
  the automatic decision to do link-time optimization
  by passing @option{-fno-lto} to the link command.
  
! To make whole-program optimization effective, it is necessary to make
! certain assumptions.  The compiler needs to know
  what functions and variables can be accessed by libraries and runtime
  outside of the link-time optimized unit.  When supported by the linker,
  the linker plugin (see @option{-fuse-linker-plugin}) passes information
*************** If omitted, it defaults to @file{fbdata.
*** 15651,15657 ****
  
  Producing an AutoFDO profile data file requires running your program
  with the @command{perf} utility on a supported GNU/Linux target system.
! For more information, see @uref{https://perf.wiki.kernel.org/}.
  
  E.g.
  @smallexample
--- 15651,15657 ----
  
  Producing an AutoFDO profile data file requires running your program
  with the @command{perf} utility on a supported GNU/Linux target system.
! For more information, see @uref{https://perfwiki.github.io/main/}.
  
  E.g.
  @smallexample
*************** more efficiently if they are adjacent to
*** 16028,16033 ****
--- 16028,16042 ----
  
  Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
  
+ @opindex fdep-fusion
+ @item -fdep-fusion
+ Detect macro-op fusible pairs consisting of single-use instructions and their
+ uses, and place such pairs together in the instruction stream to increase
+ fusion opportunities in hardware.  This pass is executed once before register
+ allocation, and another time before register renaming.
+ 
+ Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+ 
  @opindex ftracer
  @item -ftracer
  Perform tail duplication to enlarge superblock size.  This transformation
*************** available for the latter code to run.  I
*** 19060,19066 ****
  including library code, with @option{-fsplit-stack} is not an option,
  then the linker can fix up these calls so that the code compiled
  without @option{-fsplit-stack} always has a large stack.  Support for
! this is implemented in the gold linker in GNU binutils release 2.21
  and later.
  
  @opindex fstrub=disable
--- 19069,19075 ----
  including library code, with @option{-fsplit-stack} is not an option,
  then the linker can fix up these calls so that the code compiled
  without @option{-fsplit-stack} always has a large stack.  Support for
! this is implemented in the gold linker in GNU Binutils release 2.21
  and later.
  
  @opindex fstrub=disable
*************** code generation is forced, a final binar
*** 19447,19462 ****
  code for later link-time optimization is stripped. When multiple object files
  are linked together the resulting code is better optimized than with
  link-time optimizations disabled (for example, cross-module inlining
! happens), but most of benefits of whole program optimizations are lost.
  
  During the incremental link (by @option{-r}) the linker plugin defaults to
! @option{rel}. With current interfaces to GNU Binutils it is however not
! possible to incrementally link LTO objects and non-LTO objects into a single
! mixed object file.  If any of object files in incremental link cannot
! be used for link-time optimization, the linker plugin issues a warning and
! uses @samp{nolto-rel}. To maintain whole program optimization, it is
! recommended to link such objects into static library instead. Alternatively it
! is possible to use H.J. Lu's binutils with support for mixed objects.
  
  @opindex fuse-ld=bfd
  @item -fuse-ld=bfd
--- 19456,19470 ----
  code for later link-time optimization is stripped. When multiple object files
  are linked together the resulting code is better optimized than with
  link-time optimizations disabled (for example, cross-module inlining
! happens), but most of the benefits of whole-program optimizations are lost.
  
  During the incremental link (by @option{-r}) the linker plugin defaults to
! @option{rel}.  GNU Binutils 2.44 or later is needed to incrementally link
! LTO objects and non-LTO objects into a single mixed object file.  If any
! of the object files in an incremental link cannot be used for link-time
! optimization, the linker plugin issues a warning and uses @samp{nolto-rel}.
! To maintain whole-program optimization, link such objects into a static
! library instead.
  
  @opindex fuse-ld=bfd
  @item -fuse-ld=bfd
*************** arithmetic instead of IEEE single and do
*** 26905,26911 ****
  @itemx -mno-explicit-relocs
  Older Alpha assemblers provided no way to generate symbol relocations
  except via assembler macros.  Use of these macros does not allow
! optimal instruction scheduling.  GNU binutils as of version 2.12
  supports a new syntax that allows the compiler to explicitly mark
  which relocations should apply to which instructions.  This option
  is mostly useful for debugging, as GCC detects the capabilities of
--- 26913,26919 ----
  @itemx -mno-explicit-relocs
  Older Alpha assemblers provided no way to generate symbol relocations
  except via assembler macros.  Use of these macros does not allow
! optimal instruction scheduling.  GNU Binutils as of version 2.12
  supports a new syntax that allows the compiler to explicitly mark
  which relocations should apply to which instructions.  This option
  is mostly useful for debugging, as GCC detects the capabilities of
*************** The option is similar to @option{-mmemcp
*** 36646,36652 ****
  Don't keep the frame pointer in a register for leaf functions.  This
  avoids the instructions to save, set up, and restore frame pointers and
  makes an extra register available in leaf functions.  The option
! @option{-fomit-leaf-frame-pointer} removes the frame pointer for leaf functions,
  which might make debugging harder.
  
  @opindex mtls-direct-seg-refs
--- 36654,36660 ----
  Don't keep the frame pointer in a register for leaf functions.  This
  avoids the instructions to save, set up, and restore frame pointers and
  makes an extra register available in leaf functions.  The option
! @option{-momit-leaf-frame-pointer} removes the frame pointer for leaf functions,
  which might make debugging harder.
  
  @opindex mtls-direct-seg-refs
diff -Nrcpad gcc-16-20250831/gcc/doc/md.texi gcc-16-20250907/gcc/doc/md.texi
*** gcc-16-20250831/gcc/doc/md.texi	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/doc/md.texi	Sun Sep  7 22:32:59 2025
*************** Return 1 if operand 1 is a finite floati
*** 8615,8620 ****
--- 8615,8626 ----
  otherwise.  @var{m} is a scalar floating point mode.  Operand 0
  has mode @code{SImode}, and operand 1 has mode @var{m}.
  
+ @cindex @code{isnan@var{m}2} instruction pattern
+ @item @samp{isnan@var{m}2}
+ Return 1 if operand 1 is a @code{NaN} and 0 otherwise.
+ @var{m} is a scalar floating point mode.  Operand 0
+ has mode @code{SImode}, and operand 1 has mode @var{m}.
+ 
  @cindex @code{isnormal@var{m}2} instruction pattern
  @item @samp{isnormal@var{m}2}
  Return 1 if operand 1 is a normal floating point number and 0
diff -Nrcpad gcc-16-20250831/gcc/doc/options.texi gcc-16-20250907/gcc/doc/options.texi
*** gcc-16-20250831/gcc/doc/options.texi	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/doc/options.texi	Sun Sep  7 22:32:59 2025
*************** code generation.
*** 529,534 ****
--- 529,540 ----
  @item Param
  This is an option that is a parameter.
  
+ @item NoOffload
+ This option will not be passed through from the host compiler to any offload
+ target compilers via the LTO mechanism.  It is intended for use with
+ optimization tuning parameters where settings appropriate for the host system
+ are likely to harm the performance of the offload device.
+ 
  @item Undocumented
  The option is deliberately missing documentation and should not
  be included in the @option{--help} output.
diff -Nrcpad gcc-16-20250831/gcc/doc/riscv-ext.texi gcc-16-20250907/gcc/doc/riscv-ext.texi
*** gcc-16-20250831/gcc/doc/riscv-ext.texi	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/doc/riscv-ext.texi	Sun Sep  7 22:32:59 2025
***************
*** 722,725 ****
--- 722,749 ----
  @tab 1.0
  @tab Mips Prefetch extension
  
+ @item xandesperf
+ @tab 5.0
+ @tab Andes performace extension
+ 
+ @item xandesbfhcvt
+ @tab 5.0
+ @tab Andes bfloat16 conversion extension
+ 
+ @item xandesvbfhcvt
+ @tab 5.0
+ @tab Andes vector bfloat16 conversion extension
+ 
+ @item xandesvsintload
+ @tab 5.0
+ @tab Andes vector INT4 load extension
+ 
+ @item xandesvpackfph
+ @tab 5.0
+ @tab Andes vector packed FP16 extension
+ 
+ @item xandesvdot
+ @tab 5.0
+ @tab Andes vector dot product extension
+ 
  @end multitable
diff -Nrcpad gcc-16-20250831/gcc/dwarf2codeview.cc gcc-16-20250907/gcc/dwarf2codeview.cc
*** gcc-16-20250831/gcc/dwarf2codeview.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/dwarf2codeview.cc	Sun Sep  7 22:32:59 2025
*************** get_type_num_array_type (dw_die_ref type
*** 6748,6757 ****
--- 6748,6770 ----
    c = first_child;
    do
      {
+       dw_attr_node *upper_bound;
+ 
        c = dw_get_die_sib (c);
        if (dw_get_die_tag (c) != DW_TAG_subrange_type)
  	continue;
  
+       /* Check that each DW_TAG_subrange_type DIE has a DW_AT_upper_bound
+ 	 attribute that's an unsigned integer.  This is the case for C and
+ 	 C++, but not for other languages such as Ada.  */
+       upper_bound = get_AT (c, DW_AT_upper_bound);
+       if (!upper_bound)
+ 	return 0;
+ 
+       if (AT_class (upper_bound) != dw_val_class_unsigned_const
+ 	  && AT_class (upper_bound) != dw_val_class_unsigned_const_implicit)
+ 	return 0;
+ 
        dimensions++;
      }
    while (c != first_child);
diff -Nrcpad gcc-16-20250831/gcc/fold-const.cc gcc-16-20250907/gcc/fold-const.cc
*** gcc-16-20250831/gcc/fold-const.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/fold-const.cc	Sun Sep  7 22:32:59 2025
*************** split_address_to_core_and_offset (tree e
*** 16514,16519 ****
--- 16514,16530 ----
        core = get_inner_reference (TREE_OPERAND (exp, 0), &bitsize, pbitpos,
  				  poffset, &mode, &unsignedp, &reversep,
  				  &volatilep);
+       /* If we are left with MEM[a + CST] strip that and add it to the
+ 	 pbitpos and return a. */
+       if (TREE_CODE (core) == MEM_REF)
+ 	{
+ 	  poly_offset_int tem;
+ 	  tem = wi::to_poly_offset (TREE_OPERAND (core, 1));
+ 	  tem <<= LOG2_BITS_PER_UNIT;
+ 	  tem += *pbitpos;
+ 	  if (tem.to_shwi (pbitpos))
+ 	    return TREE_OPERAND (core, 0);
+ 	}
        core = build_fold_addr_expr_loc (loc, core);
      }
    else if (TREE_CODE (exp) == POINTER_PLUS_EXPR)
diff -Nrcpad gcc-16-20250831/gcc/fortran/ChangeLog gcc-16-20250907/gcc/fortran/ChangeLog
*** gcc-16-20250831/gcc/fortran/ChangeLog	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/fortran/ChangeLog	Sun Sep  7 22:32:59 2025
***************
*** 1,3 ****
--- 1,74 ----
+ 2025-09-06  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/84119
+ 	* resolve.cc (reset_array_ref_to_scalar): New function using
+ 	chunk broken out from gfc_resolve_ref.
+ 	(gfc_resolve_ref): Call the new function, the first time for
+ 	PDT type parameters and the second time for LEN inquiry refs.
+ 
+ 2025-09-05  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/84432
+ 	PR fortran/114815
+ 	* expr.cc (gfc_check_assign_symbol): Check that components in a
+ 	PDT with a default initializer have type and length parameters
+ 	that reduce to constant integer expressions.
+ 	* trans-expr.cc (gfc_trans_assignment_1): Parameterized
+ 	components cannot have default initializers so they must be
+ 	allocated after initialization.
+ 
+ 2025-09-05  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/83762
+ 	PR fortran/102457
+ 	* decl.cc (gfc_get_pdt_instance): Check that variable PDT parm
+ 	expressions are of type integer. Note that the symbol must be
+ 	tested since the expression often appears as BT_PROCEDURE.
+ 
+ 2025-09-03  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/121263
+ 	* trans-intrinsic.cc (gfc_conv_intrinsic_transfer): For an
+ 	unlimited polymorphic SOURCE to TRANSFER use saved descriptor
+ 	if possible.
+ 
+ 2025-09-02  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/89707
+ 	* decl.cc (gfc_get_pdt_instance): Copy the typebound procedure
+ 	field from the PDT template. If the template interface has
+ 	kind=0, provide the new instance with an interface with a type
+ 	spec that points to that of the parameterized component.
+ 	(match_ppc_decl): When 'saved_kind_expr' this is a PDT and the
+ 	expression should be copied to the component kind_expr.
+ 	* gfortran.h: Define gfc_get_tbp.
+ 
+ 2025-09-02  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/87669
+ 	* expr.cc (gfc_spec_list_type): If no LEN components are seen,
+ 	unconditionally return 'SPEC_ASSUMED'. This suppresses an
+ 	invalid error in match.cc(gfc_match_type_is).
+ 
+ 2025-09-01  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/121727
+ 	* trans-expr.cc (gfc_const_length_character_type_p): New helper
+ 	function.
+ 	(conv_dummy_value): Use it to determine if a character actual
+ 	argument has a constant length.  If a character actual argument is
+ 	constant and longer than the dummy, truncate it at compile time.
+ 
+ 2025-08-31  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/99709
+ 	* trans-array.cc (structure_alloc_comps): For the case
+ 	COPY_ALLOC_COMP, do a deep copy of non-allocatable PDT arrays
+ 	Suppress the use of 'duplicate_allocatable' for PDT arrays.
+ 	* trans-expr.cc (conv_dummy_value): When passing to a PDT dummy
+ 	with the VALUE attribute, do a deep copy to ensure that
+ 	parameterized components are reallocated.
+ 
  2025-08-29  Harald Anlauf  <anlauf@gmx.de>
  
  	PR fortran/93330
diff -Nrcpad gcc-16-20250831/gcc/fortran/decl.cc gcc-16-20250907/gcc/fortran/decl.cc
*** gcc-16-20250831/gcc/fortran/decl.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/fortran/decl.cc	Sun Sep  7 22:32:59 2025
*************** gfc_get_pdt_instance (gfc_actual_arglist
*** 3952,3957 ****
--- 3952,3967 ----
  	    }
  	}
  
+       if (kind_expr && kind_expr->expr_type == EXPR_VARIABLE
+ 	  && kind_expr->ts.type != BT_INTEGER
+ 	  && kind_expr->symtree->n.sym->ts.type != BT_INTEGER)
+ 	{
+ 	  gfc_error ("The type parameter expression at %L must be of INTEGER "
+ 		     "type and not %s", &kind_expr->where,
+ 		     gfc_basic_typename (kind_expr->symtree->n.sym->ts.type));
+ 	  goto error_return;
+ 	}
+ 
        /* Store the current parameter expressions in a temporary actual
  	 arglist 'list' so that they can be substituted in the corresponding
  	 expressions in the PDT instance.  */
*************** gfc_get_pdt_instance (gfc_actual_arglist
*** 4076,4081 ****
--- 4086,4096 ----
  
        c2->ts = c1->ts;
        c2->attr = c1->attr;
+       if (c1->tb)
+ 	{
+ 	  c2->tb = gfc_get_tbp ();
+ 	  c2->tb = c1->tb;
+ 	}
  
        /* The order of declaration of the type_specs might not be the
  	 same as that of the components.  */
*************** gfc_get_pdt_instance (gfc_actual_arglist
*** 4163,4168 ****
--- 4178,4194 ----
  			 c2->ts.kind, gfc_basic_typename (c2->ts.type));
  	      goto error_return;
  	    }
+ 	  if (c2->attr.proc_pointer && c2->attr.function
+ 	      && c1->ts.interface && c1->ts.interface->ts.kind == 0)
+ 	    {
+ 	      c2->ts.interface = gfc_new_symbol ("", gfc_current_ns);
+ 	      c2->ts.interface->result = c2->ts.interface;
+ 	      c2->ts.interface->ts = c2->ts;
+ 	      c2->ts.interface->attr.flavor = FL_PROCEDURE;
+ 	      c2->ts.interface->attr.function = 1;
+ 	      c2->attr.function = 1;
+ 	      c2->attr.if_source = IFSRC_UNKNOWN;
+ 	    }
  	}
  
        /* Similarly, set the string length if parameterized.  */
*************** match_ppc_decl (void)
*** 7573,7578 ****
--- 7599,7607 ----
  	  *c->tb = *tb;
  	}
  
+       if (saved_kind_expr)
+ 	c->kind_expr = gfc_copy_expr (saved_kind_expr);
+ 
        /* Set interface.  */
        if (proc_if != NULL)
  	{
diff -Nrcpad gcc-16-20250831/gcc/fortran/expr.cc gcc-16-20250907/gcc/fortran/expr.cc
*** gcc-16-20250831/gcc/fortran/expr.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/fortran/expr.cc	Sun Sep  7 22:32:59 2025
*************** gfc_check_assign_symbol (gfc_symbol *sym
*** 4769,4774 ****
--- 4769,4820 ----
  
    memset (&lvalue, '\0', sizeof (gfc_expr));
  
+   if (sym && sym->attr.pdt_template && comp && comp->initializer)
+     {
+       int i, flag;
+       gfc_expr *param_expr;
+       flag = 0;
+ 
+       if (comp->as && comp->as->type == AS_EXPLICIT
+ 	  && !(comp->ts.type == BT_DERIVED
+ 	       && comp->ts.u.derived->attr.pdt_template))
+ 	{
+ 	  /* Are the bounds of the array parameterized?  */
+ 	  for (i = 0; i < comp->as->rank; i++)
+ 	    {
+ 	      param_expr = gfc_copy_expr (comp->as->lower[i]);
+ 	      if (gfc_simplify_expr (param_expr, 1)
+ 		  && param_expr->expr_type != EXPR_CONSTANT)
+ 		flag++;
+ 	      gfc_free_expr (param_expr);
+ 	      param_expr = gfc_copy_expr (comp->as->upper[i]);
+ 	      if (gfc_simplify_expr (param_expr, 1)
+ 		  && param_expr->expr_type != EXPR_CONSTANT)
+ 		flag++;
+ 	      gfc_free_expr (param_expr);
+ 	    }
+ 	}
+ 
+       /* Is the character length parameterized?  */
+       if (comp->ts.type == BT_CHARACTER && comp->ts.u.cl->length)
+ 	{
+ 	  param_expr = gfc_copy_expr (comp->ts.u.cl->length);
+ 	  if (gfc_simplify_expr (param_expr, 1)
+ 	      && param_expr->expr_type != EXPR_CONSTANT)
+ 	    flag++;
+ 	  gfc_free_expr (param_expr);
+ 	}
+ 
+       if (flag)
+ 	{
+ 	  gfc_error ("The component %qs at %L of derived type %qs has "
+ 		     "paramterized type or array length parameters, which is "
+ 		     "not compatible with a default initializer",
+ 		      comp->name, &comp->initializer->where, sym->name);
+ 	  return false;
+ 	}
+     }
+ 
    lvalue.expr_type = EXPR_VARIABLE;
    lvalue.ts = sym->ts;
    if (sym->as)
*************** gfc_spec_list_type (gfc_actual_arglist *
*** 5911,5916 ****
--- 5957,5963 ----
    gfc_component *c;
    bool seen_assumed = false;
    bool seen_deferred = false;
+   bool seen_len = false;
  
    if (derived == NULL)
      {
*************** gfc_spec_list_type (gfc_actual_arglist *
*** 5932,5941 ****
  	    return SPEC_EXPLICIT;
  	  seen_assumed = param_list->spec_type == SPEC_ASSUMED;
  	  seen_deferred = param_list->spec_type == SPEC_DEFERRED;
  	  if (seen_assumed && seen_deferred)
  	    return SPEC_EXPLICIT;
  	}
!       res = seen_assumed ? SPEC_ASSUMED : SPEC_DEFERRED;
      }
    return res;
  }
--- 5979,5990 ----
  	    return SPEC_EXPLICIT;
  	  seen_assumed = param_list->spec_type == SPEC_ASSUMED;
  	  seen_deferred = param_list->spec_type == SPEC_DEFERRED;
+ 	  if (c->attr.pdt_len)
+ 	    seen_len = true;
  	  if (seen_assumed && seen_deferred)
  	    return SPEC_EXPLICIT;
  	}
!       res = (seen_assumed || !seen_len) ? SPEC_ASSUMED : SPEC_DEFERRED;
      }
    return res;
  }
diff -Nrcpad gcc-16-20250831/gcc/fortran/gfortran.h gcc-16-20250907/gcc/fortran/gfortran.h
*** gcc-16-20250831/gcc/fortran/gfortran.h	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/fortran/gfortran.h	Sun Sep  7 22:32:59 2025
*************** typedef struct gfc_typebound_proc
*** 1916,1921 ****
--- 1916,1922 ----
  }
  gfc_typebound_proc;
  
+ #define gfc_get_tbp() XCNEW (gfc_typebound_proc)
  
  /* Symbol nodes.  These are important things.  They are what the
     standard refers to as "entities".  The possibly multiple names that
diff -Nrcpad gcc-16-20250831/gcc/fortran/resolve.cc gcc-16-20250907/gcc/fortran/resolve.cc
*** gcc-16-20250831/gcc/fortran/resolve.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/fortran/resolve.cc	Sun Sep  7 22:32:59 2025
*************** gfc_resolve_substring_charlen (gfc_expr
*** 5872,5883 ****
  }
  
  
  /* Resolve subtype references.  */
  
  bool
  gfc_resolve_ref (gfc_expr *expr)
  {
!   int current_part_dimension, n_components, seen_part_dimension, dim;
    gfc_ref *ref, **prev, *array_ref;
    bool equal_length;
    gfc_symbol *last_pdt = NULL;
--- 5872,5917 ----
  }
  
  
+ /* Convert an array reference to an array element so that PDT KIND and LEN
+    or inquiry references are always scalar.  */
+ 
+ static void
+ reset_array_ref_to_scalar (gfc_expr *expr, gfc_ref *array_ref)
+ {
+   gfc_expr *unity = gfc_get_int_expr (gfc_default_integer_kind, NULL, 1);
+   int dim;
+ 
+   array_ref->u.ar.type = AR_ELEMENT;
+   expr->rank = 0;
+   /* Suppress the runtime bounds check.  */
+   expr->no_bounds_check = 1;
+   for (dim = 0; dim < array_ref->u.ar.dimen; dim++)
+     {
+       array_ref->u.ar.dimen_type[dim] = DIMEN_ELEMENT;
+       if (array_ref->u.ar.start[dim])
+ 	gfc_free_expr (array_ref->u.ar.start[dim]);
+ 
+       if (array_ref->u.ar.as && array_ref->u.ar.as->lower[dim])
+ 	array_ref->u.ar.start[dim]
+ 			= gfc_copy_expr (array_ref->u.ar.as->lower[dim]);
+       else
+ 	array_ref->u.ar.start[dim] = gfc_copy_expr (unity);
+ 
+       if (array_ref->u.ar.end[dim])
+ 	gfc_free_expr (array_ref->u.ar.end[dim]);
+       if (array_ref->u.ar.stride[dim])
+ 	gfc_free_expr (array_ref->u.ar.stride[dim]);
+     }
+   gfc_free_expr (unity);
+ }
+ 
+ 
  /* Resolve subtype references.  */
  
  bool
  gfc_resolve_ref (gfc_expr *expr)
  {
!   int current_part_dimension, n_components, seen_part_dimension;
    gfc_ref *ref, **prev, *array_ref;
    bool equal_length;
    gfc_symbol *last_pdt = NULL;
*************** gfc_resolve_ref (gfc_expr *expr)
*** 6022,6027 ****
--- 6056,6069 ----
  		last_pdt = NULL;
  	    }
  
+ 	  /* The F08 standard requires(See R425, R431, R435, and in particular
+ 	     Note 6.7) that a PDT parameter reference be a scalar even if 
+ 	     the designator is an array."  */
+ 	  if (array_ref && last_pdt && last_pdt->attr.pdt_type
+ 	      && (ref->u.c.component->attr.pdt_kind
+ 		  || ref->u.c.component->attr.pdt_len))
+ 	    reset_array_ref_to_scalar (expr, array_ref);
+ 
  	  n_components++;
  	  break;
  
*************** gfc_resolve_ref (gfc_expr *expr)
*** 6034,6060 ****
  	  if (ref->u.i == INQUIRY_LEN && array_ref
  	      && ((expr->ts.type == BT_CHARACTER && !expr->ts.u.cl->length)
  		  || expr->ts.type == BT_INTEGER))
! 	    {
! 	      array_ref->u.ar.type = AR_ELEMENT;
! 	      expr->rank = 0;
! 	      /* INQUIRY_LEN is not evaluated from the rest of the expr
! 		 but directly from the string length. This means that setting
! 		 the array indices to one does not matter but might trigger
! 		 a runtime bounds error. Suppress the check.  */
! 	      expr->no_bounds_check = 1;
! 	      for (dim = 0; dim < array_ref->u.ar.dimen; dim++)
! 		{
! 		  array_ref->u.ar.dimen_type[dim] = DIMEN_ELEMENT;
! 		  if (array_ref->u.ar.start[dim])
! 		    gfc_free_expr (array_ref->u.ar.start[dim]);
! 		  array_ref->u.ar.start[dim]
! 			= gfc_get_int_expr (gfc_default_integer_kind, NULL, 1);
! 		  if (array_ref->u.ar.end[dim])
! 		    gfc_free_expr (array_ref->u.ar.end[dim]);
! 		  if (array_ref->u.ar.stride[dim])
! 		    gfc_free_expr (array_ref->u.ar.stride[dim]);
! 		}
! 	    }
  	  break;
  	}
  
--- 6076,6082 ----
  	  if (ref->u.i == INQUIRY_LEN && array_ref
  	      && ((expr->ts.type == BT_CHARACTER && !expr->ts.u.cl->length)
  		  || expr->ts.type == BT_INTEGER))
! 	    reset_array_ref_to_scalar (expr, array_ref);
  	  break;
  	}
  
diff -Nrcpad gcc-16-20250831/gcc/fortran/trans-expr.cc gcc-16-20250907/gcc/fortran/trans-expr.cc
*** gcc-16-20250831/gcc/fortran/trans-expr.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/fortran/trans-expr.cc	Sun Sep  7 22:32:59 2025
*************** conv_cond_temp (gfc_se * parmse, gfc_exp
*** 6510,6515 ****
--- 6510,6529 ----
  }
  
  
+ /* Returns true if the type specified in TS is a character type whose length
+    is constant.  Otherwise returns false.  */
+ 
+ static bool
+ gfc_const_length_character_type_p (gfc_typespec *ts)
+ {
+   return (ts->type == BT_CHARACTER
+ 	  && ts->u.cl
+ 	  && ts->u.cl->length
+ 	  && ts->u.cl->length->expr_type == EXPR_CONSTANT
+ 	  && ts->u.cl->length->ts.type == BT_INTEGER);
+ }
+ 
+ 
  /* Helper function for the handling of (currently) scalar dummy variables
     with the VALUE attribute.  Argument parmse should already be set up.  */
  static void
*************** conv_dummy_value (gfc_se * parmse, gfc_e
*** 6565,6570 ****
--- 6579,6604 ----
        return;
      }
  
+   /* Truncate a too long constant character actual argument.  */
+   if (gfc_const_length_character_type_p (&fsym->ts)
+       && e->expr_type == EXPR_CONSTANT
+       && mpz_cmp_ui (fsym->ts.u.cl->length->value.integer,
+ 		     e->value.character.length) < 0)
+     {
+       gfc_charlen_t flen = mpz_get_ui (fsym->ts.u.cl->length->value.integer);
+ 
+       /* Truncate actual string argument.  */
+       gfc_conv_expr (parmse, e);
+       parmse->expr = gfc_build_wide_string_const (e->ts.kind, flen,
+ 						  e->value.character.string);
+       parmse->string_length = build_int_cst (gfc_charlen_type_node, flen);
+ 
+       /* Indicate value,optional scalar dummy argument as present.  */
+       if (fsym->attr.optional)
+ 	vec_safe_push (optionalargs, boolean_true_node);
+       return;
+     }
+ 
    /* gfortran argument passing conventions:
       actual arguments to CHARACTER(len=1),VALUE
       dummy arguments are actually passed by value.
*************** gfc_trans_assignment_1 (gfc_expr * expr1
*** 13347,13352 ****
--- 13381,13402 ----
        gfc_cleanup_loop (&loop);
      }
  
+   /* Since parameterized components cannot have default initializers,
+      the default PDT constructor leaves them unallocated. Do the
+      allocation now.  */
+   if (init_flag && expr1->ts.type == BT_DERIVED
+       && expr1->ts.u.derived->attr.pdt_type
+       && !expr1->symtree->n.sym->attr.allocatable
+       && !expr1->symtree->n.sym->attr.dummy)
+     {
+       gfc_symbol *sym = expr1->symtree->n.sym;
+       tmp = gfc_allocate_pdt_comp (sym->ts.u.derived,
+ 				   sym->backend_decl,
+ 				   sym->as ? sym->as->rank : 0,
+ 					     sym->param_list);
+       gfc_add_expr_to_block (&block, tmp);
+     }
+ 
    return gfc_finish_block (&block);
  }
  
*************** gfc_trans_assignment (gfc_expr * expr1,
*** 13410,13416 ****
      {
        tmp = gfc_trans_zero_assign (expr1);
        if (tmp)
!         return tmp;
      }
  
    /* Special case copying one array to another.  */
--- 13460,13466 ----
      {
        tmp = gfc_trans_zero_assign (expr1);
        if (tmp)
! 	return tmp;
      }
  
    /* Special case copying one array to another.  */
*************** gfc_trans_assignment (gfc_expr * expr1,
*** 13421,13427 ****
      {
        tmp = gfc_trans_array_copy (expr1, expr2);
        if (tmp)
!         return tmp;
      }
  
    /* Special case initializing an array from a constant array constructor.  */
--- 13471,13477 ----
      {
        tmp = gfc_trans_array_copy (expr1, expr2);
        if (tmp)
! 	return tmp;
      }
  
    /* Special case initializing an array from a constant array constructor.  */
diff -Nrcpad gcc-16-20250831/gcc/fortran/trans-intrinsic.cc gcc-16-20250907/gcc/fortran/trans-intrinsic.cc
*** gcc-16-20250831/gcc/fortran/trans-intrinsic.cc	Sun Aug 31 22:32:12 2025
--- gcc-16-20250907/gcc/fortran/trans-intrinsic.cc	Sun Sep  7 22:32:59 2025
*************** gfc_conv_intrinsic_transfer (gfc_se * se
*** 8651,8657 ****
  				       argse.string_length);
        else if (arg->expr->ts.type == BT_CLASS)
  	{
! 	  class_ref = TREE_OPERAND (argse.expr, 0);
  	  tmp = gfc_class_vtab_size_get (class_ref);
  	  if (UNLIMITED_POLY (arg->expr))
  	    tmp = gfc_resize_class_size_with_len (&argse.pre, class_ref, tmp);
--- 8651,8662 ----
  				       argse.string_length);
        else if (arg->expr->ts.type == BT_CLASS)
  	{
! 	  if (UNLIMITED_POLY (source_expr)
! 	      && DECL_LANG_SPECIFIC (source_expr->symtree->n.sym->backend_decl))
! 	    class_ref = GFC_DECL_SAVED_DESCRIPTOR
! 	      (source_expr->symtree->n.sym->backend_decl);
! 	  else
! 	    class_ref = TREE_OPERAND (argse.expr, 0);
  	  tmp = gfc_class_vtab_size_get (class_ref);
  	  if (UNLIMITED_POLY (arg->expr))
  	    tmp = gfc_resize_class_size_with_len (&argse.pre, class_ref, tmp);
diff -Nrcpad gcc-16-20250831/gcc/gcc.cc gcc-16-20250907/gcc/gcc.cc
*** gcc-16-20250831/gcc/gcc.cc	Sun Aug 31 22:32:13 2025
--- gcc-16-20250907/gcc/gcc.cc	Sun Sep  7 22:32:59 2025
*************** for_each_path (const struct path_prefix
*** 2788,2794 ****
    const char *multi_suffix;
    const char *just_multi_suffix;
    char *path = NULL;
!   decltype (callback (nullptr)) ret;
    bool skip_multi_dir = false;
    bool skip_multi_os_dir = false;
  
--- 2788,2794 ----
    const char *multi_suffix;
    const char *just_multi_suffix;
    char *path = NULL;
!   decltype (callback (nullptr)) ret = nullptr;
    bool skip_multi_dir = false;
    bool skip_multi_os_dir = false;
  
diff -Nrcpad gcc-16-20250831/gcc/gimple-lower-bitint.cc gcc-16-20250907/gcc/gimple-lower-bitint.cc
*** gcc-16-20250831/gcc/gimple-lower-bitint.cc	Sun Aug 31 22:32:13 2025
--- gcc-16-20250907/gcc/gimple-lower-bitint.cc	Sun Sep  7 22:33:00 2025
*************** bitint_large_huge::limb_access (tree typ
*** 622,633 ****
    tree ltype = (bitint_extended && abi_load_p) ? atype : m_limb_type;
  
    addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (var));
-   if (as != TYPE_ADDR_SPACE (ltype))
-     ltype = build_qualified_type (ltype, TYPE_QUALS (ltype)
- 					 | ENCODE_QUAL_ADDR_SPACE (as));
    tree ret;
    if (DECL_P (var) && tree_fits_uhwi_p (idx))
      {
        tree ptype = build_pointer_type (strip_array_types (TREE_TYPE (var)));
        unsigned HOST_WIDE_INT off = tree_to_uhwi (idx) * m_limb_size;
        ret = build2 (MEM_REF, ltype,
--- 622,633 ----
    tree ltype = (bitint_extended && abi_load_p) ? atype : m_limb_type;
  
    addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (var));
    tree ret;
    if (DECL_P (var) && tree_fits_uhwi_p (idx))
      {
+       if (as != TYPE_ADDR_SPACE (ltype))
+ 	ltype = build_qualified_type (ltype, TYPE_QUALS (ltype)
+ 				      | ENCODE_QUAL_ADDR_SPACE (as));
        tree ptype = build_pointer_type (strip_array_types (TREE_TYPE (var)));
        unsigned HOST_WIDE_INT off = tree_to_uhwi (idx) * m_limb_size;
        ret = build2 (MEM_REF, ltype,
*************** bitint_large_huge::limb_access (tree typ
*** 638,643 ****
--- 638,646 ----
      }
    else if (TREE_CODE (var) == MEM_REF && tree_fits_uhwi_p (idx))
      {
+       if (as != TYPE_ADDR_SPACE (ltype))
+ 	ltype = build_qualified_type (ltype, TYPE_QUALS (ltype)
+ 				      | ENCODE_QUAL_ADDR_SPACE (as));
        ret
  	= build2 (MEM_REF, ltype, unshare_expr (TREE_OPERAND (var, 0)),
  		  size_binop (PLUS_EXPR, TREE_OPERAND (var, 1),
*************** bitint_large_huge::limb_access (tree typ
*** 650,655 ****
--- 653,662 ----
      }
    else
      {
+       ltype = m_limb_type;
+       if (as != TYPE_ADDR_SPACE (ltype))
+ 	ltype = build_qualified_type (ltype, TYPE_QUALS (ltype)
+ 				      | ENCODE_QUAL_ADDR_SPACE (as));
        var = unshare_expr (var);
        if (TREE_CODE (TREE_TYPE (var)) != ARRAY_TYPE
  	  || !useless_type_conversion_p (m_limb_type,
*************** bitint_large_huge::limb_access (tree typ
*** 657,672 ****
  	{
  	  unsigned HOST_WIDE_INT nelts
  	    = CEIL (tree_to_uhwi (TYPE_SIZE (TREE_TYPE (var))), limb_prec);
! 
! 	  /* Build the array type with m_limb_type from the right address
! 	     space.  */
! 	  tree limb_type_a = m_limb_type;
! 	  if (as != TYPE_ADDR_SPACE (m_limb_type))
! 	    limb_type_a = build_qualified_type (m_limb_type,
! 						TYPE_QUALS (m_limb_type)
! 						| ENCODE_QUAL_ADDR_SPACE (as));
! 
! 	  tree atype = build_array_type_nelts (limb_type_a, nelts);
  	  var = build1 (VIEW_CONVERT_EXPR, atype, var);
  	}
        ret = build4 (ARRAY_REF, ltype, var, idx, NULL_TREE, NULL_TREE);
--- 664,670 ----
  	{
  	  unsigned HOST_WIDE_INT nelts
  	    = CEIL (tree_to_uhwi (TYPE_SIZE (TREE_TYPE (var))), limb_prec);
! 	  tree atype = build_array_type_nelts (ltype, nelts);
  	  var = build1 (VIEW_CONVERT_EXPR, atype, var);
  	}
        ret = build4 (ARRAY_REF, ltype, var, idx, NULL_TREE, NULL_TREE);
diff -Nrcpad gcc-16-20250831/gcc/ipa-inline-transform.cc gcc-16-20250907/gcc/ipa-inline-transform.cc
*** gcc-16-20250831/gcc/ipa-inline-transform.cc	Sun Aug 31 22:32:13 2025
--- gcc-16-20250907/gcc/ipa-inline-transform.cc	Sun Sep  7 22:33:00 2025
*************** along with GCC; see the file COPYING3.
*** 28,33 ****
--- 28,34 ----
  
     The inline plan is applied on given function body by inline_transform.  */
  
+ #define INCLUDE_ALGORITHM
  #include "config.h"
  #include "system.h"
  #include "coretypes.h"
*************** inline_call (struct cgraph_edge *e, bool
*** 344,349 ****
--- 345,384 ----
    to = e->caller;
    if (to->inlined_to)
      to = to->inlined_to;
+ 
+   /* In case callee has AFDO profile but caller has GLOBAL0 we need
+      to re-scale it so it can have non-zero AFDO profile.  */
+   if (callee->count.quality () == AFDO
+       && e->count.nonzero_p ()
+       && (to->count.quality () == GUESSED_GLOBAL0_AFDO
+ 	  || to->count.quality () == GUESSED_GLOBAL0_ADJUSTED))
+     {
+       profile_count num = callee->count;
+       profile_count den = e->count;
+       profile_count::adjust_for_ipa_scaling (&num, &den);
+       if (dump_file)
+ 	{
+ 	  fprintf (dump_file, "Rescalling profile of caller %s "
+ 		   "to allow non-zero AFDO counts:",
+ 		   to->dump_name ());
+ 	  den.dump (dump_file);
+ 	  fprintf (dump_file, " -> ");
+ 	  num.dump (dump_file);
+ 	  fprintf (dump_file, "\n");
+ 	}
+       to->apply_scale (num, den);
+       to->frequency = std::max (to->frequency, callee->frequency);
+       /* Do not update original, so possible additional calls of callee
+ 	 are handled reasonably well.  */
+       update_original = false;
+       gcc_checking_assert (to->count.quality () == AFDO);
+       if (dump_file)
+ 	{
+ 	  fprintf (dump_file, "Scaled profile of %s: ", to->dump_name ());
+ 	  to->count.dump (dump_file);
+ 	  fprintf (dump_file, "\n");
+ 	}
+     }
    if (to->thunk)
      {
        struct cgraph_node *target = to->callees->callee;
diff -Nrcpad gcc-16-20250831/gcc/ipa-profile.cc gcc-16-20250907/gcc/ipa-profile.cc
*** gcc-16-20250831/gcc/ipa-profile.cc	Sun Aug 31 22:32:13 2025
--- gcc-16-20250907/gcc/ipa-profile.cc	Sun Sep  7 22:33:00 2025
*************** ipa_profile (void)
*** 773,779 ****
    gcov_type threshold;
  
    if (dump_file)
!     dump_histogram (dump_file, histogram);
    for (i = 0; i < (int)histogram.length (); i++)
      {
        overall_time += ((widest_int)histogram[i]->count) * histogram[i]->time;
--- 773,789 ----
    gcov_type threshold;
  
    if (dump_file)
!     {
!       if (profile_info)
! 	{
! 	  fprintf (dump_file,
! 		   "runs: %i sum_max: %" PRId64 " cutoff: %" PRId64"\n",
! 		   profile_info->runs, profile_info->sum_max, profile_info->cutoff);
! 	  fprintf (dump_file, "hot bb threshold: %" PRId64 "\n",
! 		   get_hot_bb_threshold ());
! 	}
!       dump_histogram (dump_file, histogram);
!     }
    for (i = 0; i < (int)histogram.length (); i++)
      {
        overall_time += ((widest_int)histogram[i]->count) * histogram[i]->time;
diff -Nrcpad gcc-16-20250831/gcc/ira-color.cc gcc-16-20250907/gcc/ira-color.cc
*** gcc-16-20250831/gcc/ira-color.cc	Sun Aug 31 22:32:13 2025
--- gcc-16-20250907/gcc/ira-color.cc	Sun Sep  7 22:33:00 2025
*************** improve_allocation (void)
*** 3304,3311 ****
  	   assigning hard register to allocno A even without spilling
  	   conflicting allocnos.  */
  	continue;
-       auto_bitmap allocnos_to_spill;
-       HARD_REG_SET soft_conflict_regs = {};
        mode = ALLOCNO_MODE (a);
        nwords = ALLOCNO_NUM_OBJECTS (a);
        /* Process each allocno conflicting with A and update the cost
--- 3304,3309 ----
*************** improve_allocation (void)
*** 3331,3370 ****
  	      ALLOCNO_COLOR_DATA (conflict_a)->temp = check;
  	      if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
  		continue;
! 	      auto spill_a = ira_soft_conflict (a, conflict_a);
! 	      if (spill_a)
! 		{
! 		  if (!bitmap_set_bit (allocnos_to_spill,
! 				       ALLOCNO_NUM (spill_a)))
! 		    continue;
! 		  ira_loop_border_costs border_costs (spill_a);
! 		  spill_cost = border_costs.spill_inside_loop_cost ();
! 		}
  	      else
! 		{
! 		  spill_cost = ALLOCNO_UPDATED_MEMORY_COST (conflict_a);
! 		  k = (ira_class_hard_reg_index
! 		       [ALLOCNO_CLASS (conflict_a)][conflict_hregno]);
! 		  ira_assert (k >= 0);
! 		  if ((allocno_costs = ALLOCNO_HARD_REG_COSTS (conflict_a))
! 		      != NULL)
! 		    spill_cost -= allocno_costs[k];
! 		  else
! 		    spill_cost -= ALLOCNO_UPDATED_CLASS_COST (conflict_a);
! 		  spill_cost
! 		    += allocno_copy_cost_saving (conflict_a, conflict_hregno);
! 		}
  	      conflict_nregs = hard_regno_nregs (conflict_hregno,
  						 ALLOCNO_MODE (conflict_a));
  	      auto note_conflict = [&](int r)
  		{
  		  if (check_hard_reg_p (a, r,
  					conflicting_regs, profitable_hard_regs))
! 		    {
! 		      if (spill_a)
! 			SET_HARD_REG_BIT (soft_conflict_regs, r);
! 		      costs[r] += spill_cost;
! 		    }
  		};
  	      for (r = conflict_hregno;
  		   r >= 0 && (int) end_hard_regno (mode, r) > conflict_hregno;
--- 3329,3352 ----
  	      ALLOCNO_COLOR_DATA (conflict_a)->temp = check;
  	      if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
  		continue;
! 	      spill_cost = ALLOCNO_UPDATED_MEMORY_COST (conflict_a);
! 	      k = (ira_class_hard_reg_index
! 		   [ALLOCNO_CLASS (conflict_a)][conflict_hregno]);
! 	      ira_assert (k >= 0);
! 	      if ((allocno_costs = ALLOCNO_HARD_REG_COSTS (conflict_a))
! 		  != NULL)
! 		spill_cost -= allocno_costs[k];
  	      else
! 		spill_cost -= ALLOCNO_UPDATED_CLASS_COST (conflict_a);
! 	      spill_cost
! 		+= allocno_copy_cost_saving (conflict_a, conflict_hregno);
  	      conflict_nregs = hard_regno_nregs (conflict_hregno,
  						 ALLOCNO_MODE (conflict_a));
  	      auto note_conflict = [&](int r)
  		{
  		  if (check_hard_reg_p (a, r,
  					conflicting_regs, profitable_hard_regs))
! 		    costs[r] += spill_cost;
  		};
  	      for (r = conflict_hregno;
  		   r >= 0 && (int) end_hard_regno (mode, r) > conflict_hregno;
*************** improve_allocation (void)
*** 3396,3402 ****
  	   by spilling some conflicting allocnos does not improve the
  	   allocation cost.  */
  	continue;
-       spill_soft_conflicts (a, allocnos_to_spill, soft_conflict_regs, best);
        nregs = hard_regno_nregs (best, mode);
        /* Now spill conflicting allocnos which contain a hard register
  	 of A when we assign the best chosen hard register to it.  */
--- 3378,3383 ----
diff -Nrcpad gcc-16-20250831/gcc/optabs.def gcc-16-20250907/gcc/optabs.def
*** gcc-16-20250831/gcc/optabs.def	Sun Aug 31 22:32:14 2025
--- gcc-16-20250907/gcc/optabs.def	Sun Sep  7 22:33:02 2025
*************** OPTAB_D (isinf_optab, "isinf$a2")
*** 363,368 ****
--- 363,369 ----
  OPTAB_D (isfinite_optab, "isfinite$a2")
  OPTAB_D (isnormal_optab, "isnormal$a2")
  OPTAB_D (issignaling_optab, "issignaling$a2")
+ OPTAB_D (isnan_optab, "isnan$a2")
  OPTAB_D (ldexp_optab, "ldexp$a3")
  OPTAB_D (log10_optab, "log10$a2")
  OPTAB_D (log1p_optab, "log1p$a2")
diff -Nrcpad gcc-16-20250831/gcc/opts.cc gcc-16-20250907/gcc/opts.cc
*** gcc-16-20250831/gcc/opts.cc	Sun Aug 31 22:32:14 2025
--- gcc-16-20250907/gcc/opts.cc	Sun Sep  7 22:33:02 2025
*************** static const struct default_options defa
*** 636,641 ****
--- 636,642 ----
      { OPT_LEVELS_2_PLUS, OPT_fcode_hoisting, NULL, 1 },
      { OPT_LEVELS_2_PLUS, OPT_fcrossjumping, NULL, 1 },
      { OPT_LEVELS_2_PLUS, OPT_fcse_follow_jumps, NULL, 1 },
+     { OPT_LEVELS_2_PLUS, OPT_fdep_fusion, NULL, 1 },
      { OPT_LEVELS_2_PLUS, OPT_fdevirtualize, NULL, 1 },
      { OPT_LEVELS_2_PLUS, OPT_fdevirtualize_speculatively, NULL, 1 },
      { OPT_LEVELS_2_PLUS, OPT_fexpensive_optimizations, NULL, 1 },
*************** enable_fdo_optimizations (struct gcc_opt
*** 2097,2107 ****
        SET_OPTION_IF_UNSET (opts, opts_set, flag_branch_probabilities, value);
        SET_OPTION_IF_UNSET (opts, opts_set, flag_profile_values, value);
      }
-   SET_OPTION_IF_UNSET (opts, opts_set, flag_unroll_loops, value);
-   SET_OPTION_IF_UNSET (opts, opts_set, flag_peel_loops, value);
-   SET_OPTION_IF_UNSET (opts, opts_set, flag_tracer, value);
    SET_OPTION_IF_UNSET (opts, opts_set, flag_value_profile_transformations,
  		       value);
    SET_OPTION_IF_UNSET (opts, opts_set, flag_inline_functions, value);
    SET_OPTION_IF_UNSET (opts, opts_set, flag_ipa_cp, value);
    if (value)
--- 2098,2107 ----
        SET_OPTION_IF_UNSET (opts, opts_set, flag_branch_probabilities, value);
        SET_OPTION_IF_UNSET (opts, opts_set, flag_profile_values, value);
      }
    SET_OPTION_IF_UNSET (opts, opts_set, flag_value_profile_transformations,
  		       value);
+ 
+   /* Enable IPA optimizatins that makes effective use of profile data.  */
    SET_OPTION_IF_UNSET (opts, opts_set, flag_inline_functions, value);
    SET_OPTION_IF_UNSET (opts, opts_set, flag_ipa_cp, value);
    if (value)
*************** enable_fdo_optimizations (struct gcc_opt
*** 2109,2129 ****
        SET_OPTION_IF_UNSET (opts, opts_set, flag_ipa_cp_clone, 1);
        SET_OPTION_IF_UNSET (opts, opts_set, flag_ipa_bit_cp, 1);
      }
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_predictive_commoning, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_split_loops, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_unswitch_loops, value);
    SET_OPTION_IF_UNSET (opts, opts_set, flag_gcse_after_reload, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_tree_loop_vectorize, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_tree_slp_vectorize, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_version_loops_for_strides, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_vect_cost_model,
! 		       VECT_COST_MODEL_DYNAMIC);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_tree_loop_distribute_patterns,
! 		       value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_loop_interchange, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_unroll_jam, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_tree_loop_distribution, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_optimize_crc, value);
  }
  
  /* -f{,no-}sanitize{,-recover}= suboptions.  */
--- 2109,2141 ----
        SET_OPTION_IF_UNSET (opts, opts_set, flag_ipa_cp_clone, 1);
        SET_OPTION_IF_UNSET (opts, opts_set, flag_ipa_bit_cp, 1);
      }
! 
    SET_OPTION_IF_UNSET (opts, opts_set, flag_gcse_after_reload, value);
!   SET_OPTION_IF_UNSET (opts, opts_set, flag_tracer, value);
! 
!   /* Loop optimizations uses profile feedback to determine their profitability
!      and thus it makes sense to enable them by default even at -O2.
!      Auto-profile, in its current form, is not very good on determining
!      iteration counts and thus only real profile feedback is used.  */
!   if (!autofdo)
!     {
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_unroll_loops, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_peel_loops, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_predictive_commoning, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_split_loops, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_unswitch_loops, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_tree_loop_vectorize, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_tree_slp_vectorize, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_version_loops_for_strides, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_vect_cost_model,
! 			   VECT_COST_MODEL_DYNAMIC);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_tree_loop_distribute_patterns,
! 			   value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_loop_interchange, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_unroll_jam, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_tree_loop_distribution, value);
!       SET_OPTION_IF_UNSET (opts, opts_set, flag_optimize_crc, value);
!     }
  }
  
  /* -f{,no-}sanitize{,-recover}= suboptions.  */
diff -Nrcpad gcc-16-20250831/gcc/params.opt gcc-16-20250907/gcc/params.opt
*** gcc-16-20250831/gcc/params.opt	Sun Aug 31 22:32:14 2025
--- gcc-16-20250907/gcc/params.opt	Sun Sep  7 22:33:02 2025
*************** Common Joined UInteger Var(param_min_par
*** 462,468 ****
  Minimal size of a partition for LTO (in estimated instructions).
  
  -param=lto-partitions=
! Common Joined UInteger Var(param_lto_partitions) Init(128) IntegerRange(1, 65536) Param
  Number of partitions the program should be split to.
  
  Enum
--- 462,468 ----
  Minimal size of a partition for LTO (in estimated instructions).
  
  -param=lto-partitions=
! Common Joined UInteger Var(param_lto_partitions) Init(512) IntegerRange(1, 65536) Param
  Number of partitions the program should be split to.
  
  Enum
diff -Nrcpad gcc-16-20250831/gcc/passes.def gcc-16-20250907/gcc/passes.def
*** gcc-16-20250831/gcc/passes.def	Sun Aug 31 22:32:14 2025
--- gcc-16-20250907/gcc/passes.def	Sun Sep  7 22:33:02 2025
*************** along with GCC; see the file COPYING3.
*** 516,521 ****
--- 516,522 ----
        NEXT_PASS (pass_sched);
        NEXT_PASS (pass_rtl_avoid_store_forwarding);
        NEXT_PASS (pass_early_remat);
+       NEXT_PASS (pass_dep_fusion);
        NEXT_PASS (pass_ira);
        NEXT_PASS (pass_reload);
        /* In the following, some passes are tied to 'pass_postreload' and others
*************** along with GCC; see the file COPYING3.
*** 537,542 ****
--- 538,544 ----
  	  NEXT_PASS (pass_sched_fusion);
  	  NEXT_PASS (pass_peephole2);
  	  NEXT_PASS (pass_if_after_reload);
+ 	  NEXT_PASS (pass_dep_fusion);
  	  NEXT_PASS (pass_regrename);
  	  NEXT_PASS (pass_fold_mem_offsets);
  	  NEXT_PASS (pass_cprop_hardreg);
diff -Nrcpad gcc-16-20250831/gcc/profile-count.h gcc-16-20250907/gcc/profile-count.h
*** gcc-16-20250831/gcc/profile-count.h	Sun Aug 31 22:32:14 2025
--- gcc-16-20250907/gcc/profile-count.h	Sun Sep  7 22:33:02 2025
*************** public:
*** 1212,1219 ****
        /* Be sure that ret is not local if num is global.
  	 Also ensure that ret is not global0 when num is global.  */
        if (num.ipa_p ())
! 	ret.m_quality = MAX (ret.m_quality,
! 			     num == num.ipa () ? GUESSED : num.m_quality);
        return ret;
      }
  
--- 1212,1229 ----
        /* Be sure that ret is not local if num is global.
  	 Also ensure that ret is not global0 when num is global.  */
        if (num.ipa_p ())
! 	{
! 	  /* This is common case of AFDO scaling when we upgrade
! 	     GLOBAL0_AFDO function to AFDO.  Be sure that result
! 	     is AFDO and not GUESSED (which is unnecesarily low).  */
! 	  if (num.m_quality == AFDO
! 	      && (ret.m_quality != GUESSED
! 		  && ret.m_quality != GUESSED_LOCAL))
! 	    ret.m_quality = AFDO;
! 	  else
! 	    ret.m_quality = MAX (ret.m_quality,
! 				 num == num.ipa () ? GUESSED : num.m_quality);
! 	}
        return ret;
      }
  
diff -Nrcpad gcc-16-20250831/gcc/rtl-ssa/accesses.cc gcc-16-20250907/gcc/rtl-ssa/accesses.cc
*** gcc-16-20250831/gcc/rtl-ssa/accesses.cc	Sun Aug 31 22:32:14 2025
--- gcc-16-20250907/gcc/rtl-ssa/accesses.cc	Sun Sep  7 22:33:02 2025
*************** set_node::print (pretty_printer *pp) con
*** 398,419 ****
  clobber_info *
  clobber_group::prev_clobber (insn_info *insn) const
  {
!   auto &tree = const_cast<clobber_tree &> (m_clobber_tree);
!   int comparison = lookup_clobber (tree, insn);
    if (comparison <= 0)
!     return dyn_cast<clobber_info *> (tree.root ()->prev_def ());
!   return tree.root ();
  }
  
  // See the comment above the declaration.
  clobber_info *
  clobber_group::next_clobber (insn_info *insn) const
  {
!   auto &tree = const_cast<clobber_tree &> (m_clobber_tree);
!   int comparison = lookup_clobber (tree, insn);
    if (comparison >= 0)
!     return dyn_cast<clobber_info *> (tree.root ()->next_def ());
!   return tree.root ();
  }
  
  // See the comment above the declaration.
--- 398,417 ----
  clobber_info *
  clobber_group::prev_clobber (insn_info *insn) const
  {
!   int comparison = lookup_clobber (insn);
    if (comparison <= 0)
!     return dyn_cast<clobber_info *> (m_clobber_tree.root ()->prev_def ());
!   return m_clobber_tree.root ();
  }
  
  // See the comment above the declaration.
  clobber_info *
  clobber_group::next_clobber (insn_info *insn) const
  {
!   int comparison = lookup_clobber (insn);
    if (comparison >= 0)
!     return dyn_cast<clobber_info *> (m_clobber_tree.root ()->next_def ());
!   return m_clobber_tree.root ();
  }
  
  // See the comment above the declaration.
*************** clobber_group::print (pretty_printer *pp
*** 438,443 ****
--- 436,452 ----
    pp_indentation (pp) -= 4;
  }
  
+ // A wrapper around rtl_ssa::lookup_clobber that ensures that the root
+ // of the splay tree always has the correct group.
+ int
+ clobber_group::lookup_clobber (insn_info *insn) const
+ {
+   auto &tree = const_cast<clobber_tree &> (m_clobber_tree);
+   int result = rtl_ssa::lookup_clobber (tree, insn);
+   tree->update_group (const_cast<clobber_group *> (this));
+   return result;
+ }
+ 
  // See the comment above the declaration.
  def_info *
  def_lookup::prev_def (insn_info *insn) const
*************** function_info::add_clobber (clobber_info
*** 659,672 ****
    // Search for either the previous or next clobber in the group.
    // The result is less than zero if CLOBBER should come before NEIGHBOR
    // or greater than zero if CLOBBER should come after NEIGHBOR.
!   int comparison = lookup_clobber (group->m_clobber_tree, clobber->insn ());
    gcc_checking_assert (comparison != 0);
    clobber_info *neighbor = group->m_clobber_tree.root ();
  
-   // Since HEIGHBOR is now the root of the splay tree, its group needs
-   // to be up-to-date.
-   neighbor->update_group (group);
- 
    // If CLOBBER comes before NEIGHBOR, insert CLOBBER to NEIGHBOR's left,
    // otherwise insert CLOBBER to NEIGHBOR's right.
    clobber_info::splay_tree::insert_child (neighbor, comparison > 0, clobber);
--- 668,677 ----
    // Search for either the previous or next clobber in the group.
    // The result is less than zero if CLOBBER should come before NEIGHBOR
    // or greater than zero if CLOBBER should come after NEIGHBOR.
!   int comparison = group->lookup_clobber (clobber->insn ());
    gcc_checking_assert (comparison != 0);
    clobber_info *neighbor = group->m_clobber_tree.root ();
  
    // If CLOBBER comes before NEIGHBOR, insert CLOBBER to NEIGHBOR's left,
    // otherwise insert CLOBBER to NEIGHBOR's right.
    clobber_info::splay_tree::insert_child (neighbor, comparison > 0, clobber);
diff -Nrcpad gcc-16-20250831/gcc/rtl-ssa/accesses.h gcc-16-20250907/gcc/rtl-ssa/accesses.h
*** gcc-16-20250831/gcc/rtl-ssa/accesses.h	Sun Aug 31 22:32:14 2025
--- gcc-16-20250907/gcc/rtl-ssa/accesses.h	Sun Sep  7 22:33:02 2025
*************** private:
*** 944,949 ****
--- 944,951 ----
    void set_first_clobber (clobber_info *c) { m_clobber_or_set = c; }
    void set_last_clobber (clobber_info *c) { m_last_clobber = c; }
  
+   int lookup_clobber (insn_info *) const;
+ 
    // The value returned by last_clobber ().
    clobber_info *m_last_clobber;
  
diff -Nrcpad gcc-16-20250831/gcc/testsuite/ChangeLog gcc-16-20250907/gcc/testsuite/ChangeLog
*** gcc-16-20250831/gcc/testsuite/ChangeLog	Sun Aug 31 22:32:15 2025
--- gcc-16-20250907/gcc/testsuite/ChangeLog	Sun Sep  7 22:33:02 2025
***************
*** 1,3 ****
--- 1,545 ----
+ 2025-09-06  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vln8.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vln8.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vln8.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vln8.c: New test.
+ 
+ 2025-09-06  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* gcc.target/riscv/rvv/rvv.exp: Add regression for xandesvector.
+ 	* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c: New test.
+ 	* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c: New test.
+ 
+ 2025-09-06  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/84119
+ 	* gfortran.dg/pdt_20.f03: Modify to deal with scalar type parm.
+ 
+ 2025-09-06  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/108466
+ 	* gcc.dg/uninit-pr108466-1.c: New test.
+ 
+ 2025-09-06  Jeff Law  <jlaw@ventanamicro.com>
+ 
+ 	* gcc.target/riscv/zbb-sext.c: Include stdint-gcc.h instead of
+ 	stdint.h.
+ 
+ 2025-09-06  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	PR c++/121702
+ 	* g++.dg/modules/namespace-10_c.C: Add check for log dump.
+ 	* g++.dg/modules/namespace-13_a.C: New test.
+ 	* g++.dg/modules/namespace-13_b.C: New test.
+ 	* g++.dg/modules/namespace-13_c.C: New test.
+ 
+ 2025-09-06  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	PR c++/121705
+ 	PR c++/117658
+ 	* g++.dg/modules/default-arg-4_a.C: XFAIL bogus errors.
+ 	* g++.dg/modules/default-arg-4_b.C: Likewise.
+ 	* g++.dg/modules/default-arg-5_a.C: Remove duplicate test.
+ 	* g++.dg/modules/default-arg-5_b.C: Likewise.
+ 	* g++.dg/modules/adl-9_a.C: New test.
+ 	* g++.dg/modules/adl-9_b.C: New test.
+ 	* g++.dg/modules/gmf-5.C: New test.
+ 
+ 2025-09-05  Sam James  <sam@gentoo.org>
+ 
+ 	PR rtl-optimization/121757
+ 	* g++.dg/pr121757.C: Add dg-require-effective-target for lto.
+ 
+ 2025-09-05  Robin Dapp  <rdapp@ventanamicro.com>
+ 
+ 	PR target/121510
+ 	* gcc.target/riscv/rvv/autovec/pr121510.c: New test.
+ 
+ 2025-09-05  Richard Sandiford  <rdsandiford@googlemail.com>
+ 
+ 	PR rtl-optimization/121757
+ 	* g++.dg/pr121757.C: New test.
+ 
+ 2025-09-05  Georg-Johann Lay  <avr@gjlay.de>
+ 
+ 	PR testsuite/121695
+ 	PR testsuite/52641
+ 	* gcc.dg/torture/pr121695-1.c: int -> int32_t etc.
+ 
+ 2025-09-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gcc.dg/fixed-point/bitint-1.c: Expect also error about _Sat used
+ 	without _Fract/_Accum.
+ 
+ 2025-09-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR testsuite/118567
+ 	* gcc.target/powerpc/vsx-vectorize-9.c: New test.
+ 	* gcc.target/powerpc/vsx-vectorize-10.c: New test.
+ 	* gcc.target/powerpc/vsx-vectorize-11.c: New test.
+ 	* gcc.target/powerpc/vsx-vectorize-12.c: New test.
+ 	* gcc.target/powerpc/vsx-vectorize-13.c: New test.
+ 	* gcc.target/powerpc/vsx-vectorize-14.c: New test.
+ 	* gcc.target/powerpc/vsx-vectorize-15.c: New test.
+ 	* gcc.target/powerpc/vsx-vectorize-16.c: New test.
+ 
+ 2025-09-05  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR testsuite/118567
+ 	* gcc.target/powerpc/vsx-vectorize-1.c: Remove includes, checking
+ 	part of main1 and main.
+ 	* gcc.target/powerpc/vsx-vectorize-2.c: Remove includes, replace
+ 	bar definition with declaration, remove main.
+ 	* gcc.target/powerpc/vsx-vectorize-3.c: Likewise.
+ 	* gcc.target/powerpc/vsx-vectorize-4.c: Likewise.
+ 	* gcc.target/powerpc/vsx-vectorize-5.c: Likewise.
+ 	* gcc.target/powerpc/vsx-vectorize-6.c: Likewise.
+ 	* gcc.target/powerpc/vsx-vectorize-7.c: Likewise.
+ 	* gcc.target/powerpc/vsx-vectorize-8.c: Likewise.
+ 
+ 2025-09-05  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	* gcc.target/aarch64/sve/usminmax_di.c: New test.
+ 
+ 2025-09-05  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/84432
+ 	PR fortran/114815
+ 	* gfortran.dg/pdt_26.f03: Update with default no initializer.
+ 	* gfortran.dg/pdt_27.f03: Change to test non-conforming
+ 	initializers.
+ 
+ 2025-09-05  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/83762
+ 	PR fortran/102457
+ 	* gfortran.dg/pdt_44.f03: New test.
+ 	* gfortran.dg/pr95090.f90: Give the PDT parameter a value to
+ 	suppress the type error.
+ 
+ 2025-09-04  Pan Li  <pan2.li@intel.com>
+ 
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check
+ 	for vmadd.vx.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary.h: Add test
+ 	helper macros.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary_data.h: Add test
+ 	data for run test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u16.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u32.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u64.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u8.c: New test.
+ 
+ 2025-09-04  Pan Li  <pan2.li@intel.com>
+ 
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check
+ 	for vmadd.vx.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary.h: Add test
+ 	helper macros.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary_data.h: Add test
+ 	data for run test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i16.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i32.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i64.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i8.c: New test.
+ 
+ 2025-09-04  Pan Li  <pan2.li@intel.com>
+ 
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary.h: Adjust the
+ 	vmacc.vx to avoid generating vmadd.
+ 
+ 2025-09-04  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR testsuite/121732
+ 	PR target/117013
+ 	* g++.target/aarch64/spaceship_1.C: Adjust expected fn bodies
+ 	for _Z8ss_floatff and _Z9ss_doubledd.
+ 
+ 2025-09-04  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	PR target/121775
+ 	* gcc.target/arm/simd/vset_lane_u8.c: New test.
+ 
+ 2025-09-04  Robin Dapp  <rdapp@ventanamicro.com>
+ 
+ 	PR target/121742
+ 	PR target/121780
+ 	PR target/121781
+ 	* gcc.target/riscv/rvv/autovec/pr121780.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/pr121781.c: New test.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121768
+ 	* gcc.dg/vect/pr121768.c: New testcase.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121685
+ 	* g++.dg/vect/pr121685-1.cc: New testcase.
+ 
+ 2025-09-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/107051
+ 	* gcc.dg/tree-ssa/copy-prop-aggregate-union-1.c: New test.
+ 
+ 2025-09-04  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	PR target/110812
+ 	* gcc.target/riscv/lto/pr110812_0.c: New test.
+ 	* gcc.target/riscv/lto/pr110812_1.c: New test.
+ 	* gcc.target/riscv/lto/riscv-lto.exp: New test driver.
+ 	* gcc.target/riscv/lto/riscv_vector.h: New header wrapper.
+ 
+ 2025-09-04  Kito Cheng  <kito.cheng@sifive.com>
+ 
+ 	* gcc.target/riscv/can_inline_p_test-01.c: New test.
+ 	* gcc.target/riscv/can_inline_p_test-02.c: New test.
+ 	* gcc.target/riscv/can_inline_p_test-03.c: New test.
+ 	* gcc.target/riscv/can_inline_p_test-04.c: New test.
+ 	* gcc.target/riscv/riscv_vector.h: New header wrapper for vector
+ 	tests.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/61247
+ 	* gcc.dg/vect/vect-pr61247.c: New testcase.
+ 
+ 2025-09-04  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121740
+ 	* gcc.dg/tree-ssa/ssa-fre-104.c: Un-XFAIL.
+ 	* gcc.dg/tree-ssa/ssa-fre-110.c: New testcase.
+ 
+ 2025-09-04  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	PR c++/117658
+ 	* g++.dg/modules/adl-4_a.C: Test should pass.
+ 	* g++.dg/modules/adl-4_b.C: Test should pass.
+ 	* g++.dg/modules/adl-6_a.C: New test.
+ 	* g++.dg/modules/adl-6_b.C: New test.
+ 	* g++.dg/modules/adl-6_c.C: New test.
+ 	* g++.dg/modules/adl-7_a.C: New test.
+ 	* g++.dg/modules/adl-7_b.C: New test.
+ 	* g++.dg/modules/adl-7_c.C: New test.
+ 	* g++.dg/modules/adl-8_a.C: New test.
+ 	* g++.dg/modules/adl-8_b.C: New test.
+ 	* g++.dg/modules/adl-8_c.C: New test.
+ 
+ 2025-09-04  Nathaniel Shead  <nathanieloshead@gmail.com>
+ 
+ 	PR c++/121724
+ 	* g++.dg/modules/namespace-12_a.C: New test.
+ 	* g++.dg/modules/namespace-12_b.C: New test.
+ 
+ 2025-09-04  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	PR testsuite/112728
+ 	* gcc.dg/scantest-lto.c: Omit unwind frames.
+ 
+ 2025-09-03  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* gcc.target/riscv/xandes/xandesbfhcvt-1.c: New test.
+ 	* gcc.target/riscv/xandes/xandesbfhcvt-2.c: New test.
+ 
+ 2025-09-03  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* gcc.target/riscv/riscv.exp: Add runtest for subdir xandes.
+ 	* gcc.target/riscv/xandes/xandesperf-1.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-10.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-2.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-3.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-4.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-5.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-6.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-7.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-8.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-9.c: New test.
+ 	* gcc.target/riscv/xandes/xandesperf-11.c: New file.
+ 
+ 2025-09-03  Kuan-Lin Chen  <rufus@andestech.com>
+ 
+ 	* gcc.target/riscv/xandes/xandes-predef-1.c: New test.
+ 	* gcc.target/riscv/xandes/xandes-predef-2.c: New test.
+ 	* gcc.target/riscv/xandes/xandes-predef-3.c: New test.
+ 	* gcc.target/riscv/xandes/xandes-predef-4.c: New test.
+ 	* gcc.target/riscv/xandes/xandes-predef-5.c: New test.
+ 	* gcc.target/riscv/xandes/xandes-predef-6.c: New test.
+ 	Co-author: Lino Hsing-Yu Peng (linopeng@andestech.com)
+ 	Co-author: Kai Kai-Yi Weng (kaiweng@andestech.com).
+ 
+ 2025-09-03  Paul-Antoine Arras  <parras@baylibre.com>
+ 
+ 	* gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c: Adjust scan
+ 	dump.
+ 	* gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfmax. Also add
+ 	missing scan-dump for vfmul.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Add vfmax.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c: Likewise.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf_binop.h: Add max functions.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf_binop_data.h: Add data for
+ 	vfmax.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f16.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f32.c: New test.
+ 	* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f64.c: New test.
+ 
+ 2025-09-03  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/121263
+ 	* gfortran.dg/transfer_class_5.f90: New test.
+ 
+ 2025-09-03  Austin Law  <austinklaw@gmail.com>
+ 
+ 	PR target/121213
+ 	* gcc.target/riscv/amo/pr121213.c: Remove xfail.
+ 
+ 2025-09-03  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR target/121749
+ 	* gcc.target/aarch64/simd/pr121749.c: Use dg-assemble directive.
+ 
+ 2025-09-03  Kyrylo Tkachov  <ktkachov@nvidia.com>
+ 
+ 	PR target/121749
+ 	* gcc.target/aarch64/simd/pr121749.c: New test.
+ 
+ 2025-09-03  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR c++/97740
+ 	* g++.dg/cpp0x/constexpr-97740a.C: New test.
+ 	* g++.dg/cpp0x/constexpr-97740b.C: New test.
+ 
+ 2025-09-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121756
+ 	* gcc.dg/torture/pr121756.c: New testcase.
+ 
+ 2025-09-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121767
+ 	* gcc.dg/vect/pr121767.c: New testcase.
+ 
+ 2025-09-03  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121758
+ 	* gcc.dg/vect/pr121758.c: New testcase.
+ 
+ 2025-09-03  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	PR tree-optimization/121355
+ 	* gcc.dg/tree-ssa/ptrdiff-1.c: New test.
+ 
+ 2025-09-02  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/89707
+ 	* gfortran.dg/pdt_43.f03: New test.
+ 
+ 2025-09-02  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/87669
+ 	* gfortran.dg/pdt_42.f03: New test.
+ 
+ 2025-09-02  Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	* gcc.dg/asm-hard-reg-4.c: On Arm, unset the CPU before
+ 	setting the arch.
+ 	* gcc.dg/asm-hard-reg-error-3.c: Similarly.  Also add
+ 	floating-point instructions to aid hard-float variants.
+ 	Match on arm* not just arm.
+ 
+ 2025-09-02  Robin Dapp  <rdapp@ventanamicro.com>
+ 
+ 	PR target/121742
+ 	* gcc.target/riscv/rvv/autovec/pr121742.c: New test.
+ 
+ 2025-09-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gcc.target/s390/spaceship-fp-1.c: Expect .SPACESHIP call with
+ 	-128 as last argument instead of 2.
+ 	(TEST): Use -128 instead of 2.
+ 	* gcc.target/s390/spaceship-fp-2.c: Expect .SPACESHIP call with
+ 	-128 as last argument instead of 2.
+ 	(TEST): Use -128 instead of 2.
+ 
+ 2025-09-02  Jiawei  <jiawei@iscas.ac.cn>
+ 
+ 	* gcc.target/riscv/zbb-sext.c: New test.
+ 
+ 2025-09-02  Jiawei  <jiawei@iscas.ac.cn>
+ 
+ 	* gcc.target/riscv/zba-shadd.c: New test functions.
+ 
+ 2025-09-02  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* gcc.target/i386/memset-strategy-10.c (dg-options): Add
+ 	-fasynchronous-unwind-tables -fdwarf2-cfi-asm.
+ 	* gcc.target/i386/memset-strategy-13.c: Likewise.
+ 
+ 2025-09-02  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121754
+ 	* gcc.dg/vect/pr121754.c: New testcase.
+ 	* gcc.target/aarch64/vect-pr121754.c: Likewise.
+ 
+ 2025-09-02  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	PR middle-end/121663
+ 	* gcc.dg/pr121663.c: New test.
+ 
+ 2025-09-02  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+ 
+ 	* gcc.dg/tree-ssa/cswtch-6.c (dg-final): xfail on
+ 	sparc*-*-solaris2* && !gas.
+ 	* gcc.dg/tree-ssa/cswtch-7.c: Likewise.
+ 
+ 2025-09-02  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+ 
+ 	* g++.dg/tree-ssa/vector-compare-1.C: Restrict to
+ 	non_strict_align targets.
+ 
+ 2025-09-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gcc.dg/cpp/c2y-counter-1.c: New test.
+ 
+ 2025-09-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* gcc.c-torture/execute/builtins/lib/abs.c (uimaxabs): Rename to ...
+ 	(umaxabs): ... this.
+ 	* gcc.c-torture/execute/builtins/uabs-2.c (uimaxabs): Rename to ...
+ 	(umaxabs): ... this.
+ 	(main_test): Use umaxabs instead of uimaxabs.
+ 	* gcc.c-torture/execute/builtins/uabs-3.c (main_test): Use umaxabs
+ 	instead of uimaxabs.
+ 
+ 2025-09-01  Harald Anlauf  <anlauf@gmx.de>
+ 
+ 	PR fortran/121727
+ 	* gfortran.dg/value_10.f90: New test.
+ 
+ 2025-09-01  Yoshinori Sato  <yoshinori.sato@nifty.com>
+ 
+ 	PR target/89828
+ 	* gcc.dg/pr89828.c: New.
+ 
+ 2025-09-01  Andi Kleen  <ak@gcc.gnu.org>
+ 
+ 	* gcc.target/i386/shift-gf2p8affine-1.c: Use -march=x86-64
+ 	-mtune-generic.
+ 	* gcc.target/i386/shift-gf2p8affine-2.c: Dito.
+ 	* gcc.target/i386/shift-gf2p8affine-3.c: Dito.
+ 	* gcc.target/i386/shift-gf2p8affine-5.c: Dito.
+ 	* gcc.target/i386/shift-gf2p8affine-6.c: Dito.
+ 	* gcc.target/i386/shift-gf2p8affine-7.c: Dito.
+ 
+ 2025-09-01  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	* lib/target-supports.exp
+ 	(check_effective_target_arm_v8_neon_ok_nocache): Add "-mcpu=unset
+ 	-march=armv8-a" to et_arm_v8_neon_flags.
+ 	(add_options_for_vect_early_break): Remove useless "-mcpu=unset
+ 	-march=armv8-a".
+ 	(add_options_for_arm_v8_neon): Likewise.
+ 
+ 2025-09-01  Christophe Lyon  <christophe.lyon@linaro.org>
+ 
+ 	* lib/target-supports.exp
+ 	(check_effective_target_arm_neon_ok_nocache): Remove arm32 check.
+ 	Add istarget arm*-*-* check.
+ 	(check_effective_target_arm_neon_fp16_ok_nocache): Likewise.
+ 	(check_effective_target_arm_neon_softfp_fp16_ok_nocache): Likewise.
+ 	(check_effective_target_arm_v8_neon_ok_nocache): Likewise.
+ 	(check_effective_target_arm_neonv2_ok_nocache): Likewise.
+ 	(check_effective_target_vect_pack_trunc): Remove istarget arm*-*-*
+ 	check.
+ 	(check_effective_target_vect_unpack): Likewise.
+ 	(check_effective_target_vect_condition): Likewise.
+ 	(check_effective_target_vect_cond_mixed): Likewise.
+ 	(available_vector_sizes): Likewise.
+ 
+ 2025-09-01  Richard Biener  <rguenther@suse.de>
+ 
+ 	PR tree-optimization/121744
+ 	* gcc.dg/vect/pr121744-1.c: New testcase.
+ 
+ 2025-09-01  liuhongt  <hongtao.liu@intel.com>
+ 
+ 	* gcc.target/i386/pr121699.c: New test.
+ 
+ 2025-08-31  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/99709
+ 	* gfortran.dg/pdt_41.f03: New test.
+ 
+ 2025-08-31  Shreya Munnangi  <smunnangi1@ventanamicro.com>
+ 
+ 	* gcc.target/riscv/add-synthesis-2.c: New test.
+ 
+ 2025-08-31  Pan Li  <pan2.li@intel.com>
+ 
+ 	* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u16-from-u128.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u16-from-u32.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u16-from-u64.rv32.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u16-from-u64.rv64.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u32-from-u128.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u32-from-u64.rv32.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u32-from-u64.rv64.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u64-from-u128.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u8-from-u128.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u8-from-u16.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u8-from-u32.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u8-from-u64.rv32.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-5-u8-from-u64.rv64.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u16-from-u128.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u16-from-u32.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u16-from-u64.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u32-from-u128.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u32-from-u64.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u64-from-u128.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u8-from-u128.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u8-from-u16.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u8-from-u32.c: New test.
+ 	* gcc.target/riscv/sat/sat_u_mul-run-5-u8-from-u64.c: New test.
+ 
  2025-08-30  Jakub Jelinek  <jakub@redhat.com>
  
  	PR tree-optimization/121698
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/cpp0x/constexpr-97740a.C gcc-16-20250907/gcc/testsuite/g++.dg/cpp0x/constexpr-97740a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/cpp0x/constexpr-97740a.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/cpp0x/constexpr-97740a.C	Sun Sep  7 22:33:10 2025
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/97740
+ // { dg-do compile { target c++11 } }
+ 
+ struct A {
+   constexpr const int* get() const { return &m; }
+ private:
+   int m;
+ } a;
+ 
+ struct B { const int* p; };
+ 
+ template<class T>
+ void f() {
+   constexpr B x = {a.get()}; // { dg-bogus "private" }
+   constexpr B y = {&a.m};    // { dg-error "private" }
+ }
+ 
+ template void f<int>();
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/cpp0x/constexpr-97740b.C gcc-16-20250907/gcc/testsuite/g++.dg/cpp0x/constexpr-97740b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/cpp0x/constexpr-97740b.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/cpp0x/constexpr-97740b.C	Sun Sep  7 22:33:10 2025
***************
*** 0 ****
--- 1,20 ----
+ // PR c++/97740
+ // { dg-do compile { target c++14 } }
+ 
+ struct A {
+   constexpr const int* get() const { return &m; }
+ private:
+   int m;
+ } a;
+ 
+ struct B { const int* p; };
+ 
+ template<A* arg>
+ void f() {
+   [] (auto) {
+     constexpr B x = {arg->get()}; // { dg-bogus "private" }
+     constexpr B y = {&arg->m};    // { dg-error "private" }
+   }(0);
+ }
+ 
+ template void f<&a>();
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-4_a.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-4_a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-4_a.C	Sun Aug 31 22:32:24 2025
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-4_a.C	Sun Sep  7 22:33:13 2025
*************** export module inter;
*** 3,9 ****
  // { dg-module-cmi inter }
  
  namespace hidden {
! // not found via ADL
  int fn (int x);
  
  }
--- 3,9 ----
  // { dg-module-cmi inter }
  
  namespace hidden {
! 
  int fn (int x);
  
  }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-4_b.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-4_b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-4_b.C	Sun Aug 31 22:32:24 2025
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-4_b.C	Sun Sep  7 22:33:13 2025
*************** int main ()
*** 25,36 ****
  {
    hidden::Y y(2);
  
!   // unexported hidden::fn@inter is not visible from TPL@inter
    if (TPL (y) != -2)
      return 2;
  
    return 0;
  }
- 
- // ADL fails
- // { dg-regexp {[^\n]*/adl-4_a.C:14:[0-9]*: error: 'fn' was not declared in this scope\n} }
--- 25,35 ----
  {
    hidden::Y y(2);
  
!   // unexported hidden::fn@inter is visible from TPL@inter because it's a
!   // dependent name and so lookup is performed at each point on the
!   // instantiation context, including the point at the end of inter.
    if (TPL (y) != -2)
      return 2;
  
    return 0;
  }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-6_a.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-6_a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-6_a.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-6_a.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,38 ----
+ // PR c++/117658
+ // { dg-additional-options "-fmodules" }
+ // { dg-module-cmi M }
+ 
+ export module M;
+ 
+ namespace R {
+   export struct X {};
+   export void f(X);
+ }
+ 
+ namespace S {
+   export void f(R::X, R::X);
+ }
+ 
+ namespace I {
+   inline namespace A {
+     export struct Y {};
+   }
+   inline namespace B {
+     export void f(Y);
+     export extern "C++" void f(Y, int);
+   }
+   inline namespace C {
+     export struct f {} f;
+   }
+ }
+ 
+ namespace O {
+   export void g(I::Y);
+   export extern "C++" void h(I::Y);
+ }
+ namespace I {
+   inline namespace D {
+     export using O::g;
+     export using O::h;
+   }
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-6_b.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-6_b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-6_b.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-6_b.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,26 ----
+ // PR c++/117658
+ // { dg-additional-options "-fmodules" }
+ // { dg-module-cmi N }
+ 
+ export module N;
+ import M;
+ 
+ export R::X make();
+ 
+ namespace R {
+   static int g(X);
+ }
+ 
+ export
+ template<typename T, typename U>
+ void apply_ok(T t, U u) {
+   f(t, u);
+ }
+ 
+ export
+ template<typename T>
+ void apply_err(T t) {
+   g(t);
+ }
+ 
+ export I::Y make_Y();
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-6_c.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-6_c.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-6_c.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-6_c.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,36 ----
+ // PR c++/117658
+ // { dg-additional-options "-fmodules" }
+ 
+ import N;
+ 
+ namespace S {
+   struct Z { template<typename T> operator T(); };
+ }
+ 
+ void test() {
+   auto x = make();  // OK, decltype(x) is R::X in module M
+ 
+   R::f(x);  // error: R and R::f are not visible here
+   // { dg-error "" "" { target *-*-* } .-1 }
+ 
+   f(x);  // OK, calls R::f from interface of M
+ 
+   f(x, S::Z());  // error: S::f in module M not considered even though S is an associated namespace
+   // { dg-error "" "" { target *-*-* } .-1 }
+ 
+   apply_ok(x, S::Z());  // OK, S::f is visible in instantiation context
+ 
+   apply_err(x);  // error: R::g has internal linkage and cannot be used outside N
+   // { dg-message "here" "" { target *-*-* } .-1 }
+   // { dg-error "'g'" "" { target *-*-* } 0 }
+ 
+   auto y = make_Y();
+   f(y);  // OK, I::B::f and I::A::Y have matching innermost non-inline namespace
+   g(y);  // OK, O::g is accessible through I::D::g
+ 
+   f(y, 0);  // error: I::B::f(Y, int) is not attached to M
+   // { dg-error "" "" { target *-*-* } .-1 }
+ 
+   h(y);  // error: O::h is also not attached to M
+   // { dg-error "" "" { target *-*-* } .-1 }
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-7_a.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-7_a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-7_a.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-7_a.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,18 ----
+ // PR c++/117658
+ // { dg-additional-options "-fmodules" }
+ // { dg-module-cmi A }
+ 
+ export module A;
+ 
+ export template <typename T> void test(T t) { foo(t); }
+ 
+ namespace ns1 {
+   export struct S {};
+   /* not exported */ void foo(S) {}
+ }
+ 
+ namespace ns2 {
+   export template <typename T> struct S {
+     friend void foo(S) {}
+   };
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-7_b.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-7_b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-7_b.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-7_b.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,8 ----
+ // PR c++/117658
+ // { dg-additional-options "-fmodules" }
+ // { dg-module-cmi B }
+ 
+ export module B;
+ export import A;
+ 
+ export using bar = ns2::S<int>;
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-7_c.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-7_c.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-7_c.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-7_c.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,9 ----
+ // PR c++/117658
+ // { dg-additional-options "-fmodules" }
+ 
+ import B;
+ 
+ int main() {
+   ::test(ns1::S{});
+   ::test(bar{});
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-8_a.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-8_a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-8_a.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-8_a.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,23 ----
+ // C++26 expansion statements should not ICE
+ // { dg-additional-options "-fmodules -std=c++26" }
+ // { dg-module-cmi M }
+ 
+ export module M;
+ 
+ namespace ns {
+   export struct S {};
+   void foo(S) {}
+ }
+ 
+ export void test1() {
+   template for (auto x : { ns::S{} }) {
+     foo(x);
+   }
+ }
+ 
+ export template <typename T>
+ void test2(T t) {
+   template for (auto x : { t, t, t }) {
+     foo(x);
+   }
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-8_b.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-8_b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-8_b.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-8_b.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,14 ----
+ // { dg-additional-options "-fmodules -std=c++26" }
+ 
+ export module X;
+ export import M;
+ 
+ export template <typename T>
+ void test3(T t) {
+   test2(t);
+ }
+ 
+ namespace other {
+   export struct S {};
+   void foo(S) {}
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-8_c.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-8_c.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-8_c.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-8_c.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,9 ----
+ // { dg-additional-options "-fmodules -std=c++26" }
+ 
+ import X;
+ 
+ int main() {
+   test1();
+   test2(ns::S{});
+   test3(other::S{});
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-9_a.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-9_a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-9_a.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-9_a.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,42 ----
+ // PR c++/121705
+ // { dg-additional-options "-fmodules -Wno-global-module -fdump-lang-module-graph" }
+ // { dg-module-cmi M }
+ 
+ module;
+ namespace helpers {
+   template <typename T> bool operator<(T, int);
+ }
+ namespace ns {
+   struct E {};
+   bool operator==(E, int);
+   template <typename T> bool foo(E, T);
+ 
+   // won't be found
+   using helpers::operator<;  // NB [module.global.frag] p3.6
+   void unused(E);
+ }
+ export module M;
+ 
+ export template <typename T> bool test_op(T t, int x) {
+   // ensure it's not discarded
+   ns::E{} == x;
+   foo(ns::E{}, x);
+   // { dg-final { scan-lang-dump {Built ADL binding for function_decl:'::ns::operator=='} module } }
+   // { dg-final { scan-lang-dump {Built ADL binding for template_decl:'::ns::template foo'} module } }
+   return t == x && foo(t, x);
+ }
+ 
+ export template <typename T> bool test_using(T t, int x) {
+   // ensure it's not discarded
+   ns::E{} < 0;
+   // { dg-final { scan-lang-dump {Built ADL binding for template_decl:'::helpers::template operator<'} module } }
+   return t < x;
+ }
+ 
+ export template <typename T> void test_unused(T t) {
+   // we never use this non-dependently, so it gets discarded
+   unused(t);
+   // { dg-final { scan-lang-dump-not {'::ns::unused'} module } }
+ }
+ 
+ export using ns::E;
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-9_b.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-9_b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/adl-9_b.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/adl-9_b.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,13 ----
+ // PR c++/121705
+ // { dg-additional-options "-fmodules" }
+ 
+ import M;
+ int main() {
+   test_op(E{}, 0);
+ 
+   test_using(E{}, 0);  // { dg-message "here" }
+   // { dg-error "no match for 'operator<'" "" { target *-*-* } 0 }
+ 
+   test_unused(E{});  // { dg-message "here" }
+   // { dg-error "'unused' was not declared" "" { target *-*-* } 0 }
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/default-arg-4_a.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/default-arg-4_a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/default-arg-4_a.C	Sun Aug 31 22:32:24 2025
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/default-arg-4_a.C	Sun Sep  7 22:33:13 2025
*************** qux ()
*** 17,19 ****
--- 17,23 ----
  {
    return foo () + bar <int> () + baz <int> ();
  }
+ 
+ export using ::foo;
+ export using ::bar;
+ export using ::baz;
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/default-arg-4_b.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/default-arg-4_b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/default-arg-4_b.C	Sun Aug 31 22:32:24 2025
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/default-arg-4_b.C	Sun Sep  7 22:33:13 2025
***************
*** 1,23 ****
  // C++20 P1766R1 - Mitigating minor modules maladies
! // { dg-do run }
  // { dg-additional-options "-fmodules-ts" }
  
  import M;
  
  int
! foo (int i = 42)
  {
    return i;
  }
  
! template <typename T, typename U = int>
  int
  bar ()
  {
    return sizeof (U);
  }
  
! template <typename T, int N = 42>
  int
  baz ()
  {
--- 1,23 ----
  // C++20 P1766R1 - Mitigating minor modules maladies
! // { dg-module-do run }
  // { dg-additional-options "-fmodules-ts" }
  
  import M;
  
  int
! foo (int i = 42)			// { dg-bogus "default argument given for parameter 1 of 'int foo\\\(int\\\)'" "PR99000" { xfail *-*-* } }
  {
    return i;
  }
  
! template <typename T, typename U = int>	// { dg-bogus "redefinition of default argument for 'class U'" "PR99000" { xfail *-*-* } }
  int
  bar ()
  {
    return sizeof (U);
  }
  
! template <typename T, int N = 42>	// { dg-bogus "redefinition of default argument for 'int N'" "PR99000" { xfail *-*-* } }
  int
  baz ()
  {
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/default-arg-5_a.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/default-arg-5_a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/default-arg-5_a.C	Sun Aug 31 22:32:24 2025
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/default-arg-5_a.C	Thu Jan  1 00:00:00 1970
***************
*** 1,23 ****
- // C++20 P1766R1 - Mitigating minor modules maladies
- // { dg-additional-options "-fmodules-ts -Wno-global-module" }
- // { dg-module-cmi M }
- 
- module;
- 
- int foo (int i = 42);
- template <typename T, typename U = int>
- int bar ();
- template <typename T, int N = 42>
- int baz ();
- 
- export module M;
- 
- export inline int
- qux ()
- {
-   return foo () + bar <int> () + baz <int> ();
- }
- 
- export using ::foo;
- export using ::bar;
- export using ::baz;
--- 0 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/default-arg-5_b.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/default-arg-5_b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/default-arg-5_b.C	Sun Aug 31 22:32:24 2025
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/default-arg-5_b.C	Thu Jan  1 00:00:00 1970
***************
*** 1,35 ****
- // C++20 P1766R1 - Mitigating minor modules maladies
- // { dg-additional-options "-fmodules-ts" }
- 
- import M;
- 
- int
- foo (int i = 42)			// { dg-error "default argument given for parameter 1 of 'int foo\\\(int\\\)'" }
- {
-   return i;
- }
- 
- template <typename T, typename U = int>	// { dg-error "redefinition of default argument for 'class U'" }
- int
- bar ()
- {
-   return sizeof (U);
- }
- 
- template <typename T, int N = 42>	// { dg-error "redefinition of default argument for 'int N'" }
- int
- baz ()
- {
-   return N;
- }
- 
- int
- main ()
- {
-   if (foo () + bar <int> () + baz <int> () != qux ())
-     __builtin_abort ();
-   if (foo () != foo (42)
-       || bar <int> () != bar <int, int> ()
-       || baz <int> () != baz <int, 42> ())
-     __builtin_abort ();
- }
--- 0 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/gmf-5.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/gmf-5.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/gmf-5.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/gmf-5.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,12 ----
+ // { dg-additional-options "-fmodules -Wno-global-module -fdump-lang-module" }
+ // { dg-module-cmi M }
+ 
+ module;
+ namespace test {
+   struct S {};
+   void go(S);
+ }
+ export module M;
+ 
+ // Ideally we don't emit any namespaces that only have discarded entries
+ // { dg-final { scan-lang-dump-not {Writing namespace:[0-9]* '::test'} module } }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-10_c.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-10_c.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-10_c.C	Sun Aug 31 22:32:24 2025
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-10_c.C	Sun Sep  7 22:33:13 2025
***************
*** 1,6 ****
! // { dg-additional-options -fmodules }
  
  import M2;
  
  A::AT var1;
  AT var2;			// { dg-error "AT" }
--- 1,8 ----
! // { dg-additional-options "-fmodules -fdump-lang-module" }
  
  import M2;
  
  A::AT var1;
  AT var2;			// { dg-error "AT" }
+ 
+ // { dg-final { scan-lang-dump {Ignoring using-directives because module M1 is not visible} module } }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-12_a.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-12_a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-12_a.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-12_a.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,17 ----
+ // PR c++/121724
+ // { dg-additional-options "-fmodules -Wno-global-module" }
+ // { dg-module-cmi foo }
+ 
+ module;
+ namespace A {
+   inline namespace X {
+     namespace B {
+     }
+   }
+ }
+ export module foo;
+ export namespace A {
+   namespace B {
+     struct S {};
+   }
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-12_b.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-12_b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-12_b.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-12_b.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,6 ----
+ // PR c++/121724
+ // { dg-additional-options "-fmodules" }
+ 
+ import foo;
+ using T = A::B::S;
+ using T = A::X::B::S;
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-13_a.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-13_a.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-13_a.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-13_a.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,16 ----
+ // PR c++/121702
+ // { dg-additional-options "-fmodules -fdump-lang-module" }
+ // { dg-module-cmi a }
+ 
+ export module a;
+ export namespace a {
+   constexpr int f() { return 42; }
+ }
+ 
+ namespace x {}
+ namespace y {
+   export using namespace x;
+ }
+ 
+ // { dg-final { scan-lang-dump {Using-directives 1} module } }
+ // { dg-final { scan-lang-dump {Writing using-directive in '::y' for '::x'} module } }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-13_b.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-13_b.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-13_b.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-13_b.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,32 ----
+ // PR c++/121702
+ // { dg-additional-options "-fmodules -Wno-global-module -fdump-lang-module" }
+ // { dg-module-cmi b }
+ 
+ module;
+ 
+ namespace gmf::blah {}
+ namespace gmf::other {}
+ 
+ export module b;
+ export import a;
+ // { dg-final { scan-lang-dump {Read using-directive in '::y' for '::x'} module } }
+ 
+ export namespace b {
+   using namespace a;
+   using namespace gmf::blah;
+ }
+ namespace c {
+   using namespace gmf;
+   export using namespace gmf;
+   using namespace a;
+ }
+ 
+ // { dg-final { scan-lang-dump {Using-directives 3} module } }
+ 
+ // { dg-final { scan-lang-dump {Writing using-directive in '::b' for '::a'} module } }
+ // { dg-final { scan-lang-dump {Writing using-directive in '::b' for '::gmf::blah'} module } }
+ // { dg-final { scan-lang-dump {Writing using-directive in '::c' for '::gmf'} module } }
+ // { dg-final { scan-lang-dump-not {Writing using-directive in '::y' for '::x'} module } }
+ 
+ // { dg-final { scan-lang-dump {Writing namespace:[0-9]* '::gmf::blah', public} module } }
+ // { dg-final { scan-lang-dump-not {Writing namespace:[0-9]* '::gmf::other'} module } }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-13_c.C gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-13_c.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/modules/namespace-13_c.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/modules/namespace-13_c.C	Sun Sep  7 22:33:13 2025
***************
*** 0 ****
--- 1,17 ----
+ // PR c++/121702
+ // { dg-additional-options "-fmodules" }
+ 
+ import b;
+ namespace gmf::blah {
+   constexpr int g() { return 123; }
+ }
+ namespace gmf::other {
+   constexpr int h() { return 99; }
+ }
+ namespace x {
+   constexpr int i() { return 5; }
+ }
+ static_assert(b::f() == 42);
+ static_assert(b::g() == 123);
+ static_assert(c::other::h() == 99);
+ static_assert(y::i() == 5);
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/pr121757.C gcc-16-20250907/gcc/testsuite/g++.dg/pr121757.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/pr121757.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/pr121757.C	Sun Sep  7 22:33:14 2025
***************
*** 0 ****
--- 1,19 ----
+ // { dg-require-effective-target shared }
+ // { dg-require-effective-target lto }
+ // { dg-options "-O2 -flto -shared" }
+ 
+ struct QAbstractFileEngine {
+   virtual bool seek(long long);
+ };
+ struct QQmlPreviewFileEngine : QAbstractFileEngine {
+   bool seek(long long);
+   int m_contents;
+   QAbstractFileEngine * m_fallback;
+ };
+ bool f(void*);
+ bool QQmlPreviewFileEngine::seek(long long newPos) {
+   if (m_fallback)
+     return  m_fallback->seek(newPos);
+   else
+     return f(&m_contents);
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/tls/pr107393-1.C gcc-16-20250907/gcc/testsuite/g++.dg/tls/pr107393-1.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/tls/pr107393-1.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/tls/pr107393-1.C	Sun Sep  7 22:33:15 2025
***************
*** 0 ****
--- 1,14 ----
+ // { dg-do compile { target c++11 } }
+ // { dg-require-effective-target fpic }
+ // { dg-require-effective-target tls }
+ // { dg-options "-O2 -fno-pic -fdump-ipa-whole-program" }
+ // { dg-add-options tls }
+ 
+ struct Dtor;
+ template <typename> struct X { static thread_local Dtor m; };
+ template <typename T> thread_local Dtor X<T>::m;
+ extern template Dtor X<char>::m;
+ void *e2 = &X<char>::m;
+ 
+ // tls_model should be tls-initial-exec due to extern template.
+ // { dg-final { scan-ipa-dump "Varpool flags: tls-initial-exec" "whole-program" } }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/tls/pr107393-2.C gcc-16-20250907/gcc/testsuite/g++.dg/tls/pr107393-2.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/tls/pr107393-2.C	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/tls/pr107393-2.C	Sun Sep  7 22:33:15 2025
***************
*** 0 ****
--- 1,29 ----
+ // { dg-do compile }
+ // { dg-require-effective-target fpic }
+ // { dg-require-effective-target tls }
+ // { dg-options "-O2 -fno-pic -fdump-ipa-whole-program" }
+ // { dg-add-options tls }
+ 
+ template<class T>
+ struct S {
+   static __thread int i;
+ };
+ 
+ template<class T>
+ __thread int S<T>::i;
+ 
+ extern template
+ __thread int S<void>::i;
+ 
+ int &vi()
+ {
+   return S<void>::i;
+ }
+ 
+ int &ci()
+ {
+   return S<char>::i;
+ }
+ 
+ // tls_model should be tls-initial-exec due to extern template.
+ // { dg-final { scan-ipa-dump "Varpool flags: tls-initial-exec" "whole-program" } }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/tree-ssa/vector-compare-1.C gcc-16-20250907/gcc/testsuite/g++.dg/tree-ssa/vector-compare-1.C
*** gcc-16-20250831/gcc/testsuite/g++.dg/tree-ssa/vector-compare-1.C	Sun Aug 31 22:32:28 2025
--- gcc-16-20250907/gcc/testsuite/g++.dg/tree-ssa/vector-compare-1.C	Sun Sep  7 22:33:15 2025
***************
*** 1,4 ****
! // { dg-do compile { target c++11 } }
  // { dg-options "-O2 -fdump-tree-optimized" }
  
  // PR tree-optimization/116651
--- 1,4 ----
! // { dg-do compile { target { c++11 && non_strict_align } } }
  // { dg-options "-O2 -fdump-tree-optimized" }
  
  // PR tree-optimization/116651
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.dg/vect/pr121685-1.cc gcc-16-20250907/gcc/testsuite/g++.dg/vect/pr121685-1.cc
*** gcc-16-20250831/gcc/testsuite/g++.dg/vect/pr121685-1.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/g++.dg/vect/pr121685-1.cc	Sun Sep  7 22:33:15 2025
***************
*** 0 ****
--- 1,20 ----
+ // { dg-do compile }
+ // { dg-additional-options "-mavx2" { target avx2 } }
+ 
+ #include <vector>
+ 
+ class Foo
+ {
+ public:
+     void fun (std::vector<int>& blacksq);
+     std::vector<int> m_mcowner;
+ };
+ 
+ void Foo::fun(std::vector<int>& blacksq)
+ {
+   for (unsigned int i = 0; i < (unsigned int)blacksq.size(); i++)
+     if (blacksq[i])
+       m_mcowner[i]++;
+ }
+ 
+ // { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { target avx2 } } }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/g++.target/aarch64/spaceship_1.C gcc-16-20250907/gcc/testsuite/g++.target/aarch64/spaceship_1.C
*** gcc-16-20250831/gcc/testsuite/g++.target/aarch64/spaceship_1.C	Sun Aug 31 22:32:28 2025
--- gcc-16-20250907/gcc/testsuite/g++.target/aarch64/spaceship_1.C	Sun Sep  7 22:33:16 2025
***************
*** 34,41 ****
  ** _Z8ss_floatff:
  **	fcmpe	s0, s1
  **	csinv	(w[0-9]+), wzr, wzr, pl
! **	cset	(w[0-9]+), vs
! **	csinc	w0, \1, \2, ls
  **	ret
  */
  SPACESHIP_FN(float);
--- 34,42 ----
  ** _Z8ss_floatff:
  **	fcmpe	s0, s1
  **	csinv	(w[0-9]+), wzr, wzr, pl
! **	mov	(w[0-9]+), -129
! **	csel	(w[0-9]+), \2, wzr, vs
! **	csinc	w0, \1, \3, ls
  **	ret
  */
  SPACESHIP_FN(float);
*************** SPACESHIP_FN_NN(float);
*** 53,60 ****
  ** _Z9ss_doubledd:
  **	fcmpe	d0, d1
  **	csinv	(w[0-9]+), wzr, wzr, pl
! **	cset	(w[0-9]+), vs
! **	csinc	w0, \1, \2, ls
  **	ret
  */
  SPACESHIP_FN(double);
--- 54,62 ----
  ** _Z9ss_doubledd:
  **	fcmpe	d0, d1
  **	csinv	(w[0-9]+), wzr, wzr, pl
! **	mov	(w[0-9]+), -129
! **	csel	(w[0-9]+), \2, wzr, vs
! **	csinc	w0, \1, \3, ls
  **	ret
  */
  SPACESHIP_FN(double);
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.c-torture/execute/builtins/lib/abs.c gcc-16-20250907/gcc/testsuite/gcc.c-torture/execute/builtins/lib/abs.c
*** gcc-16-20250831/gcc/testsuite/gcc.c-torture/execute/builtins/lib/abs.c	Sun Aug 31 22:32:30 2025
--- gcc-16-20250907/gcc/testsuite/gcc.c-torture/execute/builtins/lib/abs.c	Sun Sep  7 22:33:18 2025
*************** ullabs (long long x)
*** 67,73 ****
  
  __attribute__ ((__noinline__))
  uintmax_t
! uimaxabs (intmax_t x)
  {
    ABORT_INSIDE_MAIN;
    return x < 0 ? -(uintmax_t) x : x;
--- 67,73 ----
  
  __attribute__ ((__noinline__))
  uintmax_t
! umaxabs (intmax_t x)
  {
    ABORT_INSIDE_MAIN;
    return x < 0 ? -(uintmax_t) x : x;
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.c-torture/execute/builtins/uabs-2.c gcc-16-20250907/gcc/testsuite/gcc.c-torture/execute/builtins/uabs-2.c
*** gcc-16-20250831/gcc/testsuite/gcc.c-torture/execute/builtins/uabs-2.c	Sun Aug 31 22:32:30 2025
--- gcc-16-20250907/gcc/testsuite/gcc.c-torture/execute/builtins/uabs-2.c	Sun Sep  7 22:33:18 2025
***************
*** 1,4 ****
! /* Test for builtin uabs, ulabs, ullabs, uimaxabs.  */
  /* Origin: Joseph Myers <jsm28@cam.ac.uk> */
  
  #include <limits.h>
--- 1,4 ----
! /* Test for builtin uabs, ulabs, ullabs, umaxabs.  */
  /* Origin: Joseph Myers <jsm28@cam.ac.uk> */
  
  #include <limits.h>
*************** typedef unsigned __INTMAX_TYPE__ uintmax
*** 9,15 ****
  extern unsigned int uabs (int);
  extern unsigned long ulabs (long);
  extern unsigned long long ullabs (long long);
! extern uintmax_t uimaxabs (intmax_t);
  extern void abort (void);
  extern void link_error (void);
  
--- 9,15 ----
  extern unsigned int uabs (int);
  extern unsigned long ulabs (long);
  extern unsigned long long ullabs (long long);
! extern uintmax_t umaxabs (intmax_t);
  extern void abort (void);
  extern void link_error (void);
  
*************** main_test (void)
*** 96,123 ****
      abort ();
    if (ullabs (__LONG_LONG_MAX__) != __LONG_LONG_MAX__)
      link_error ();
!   if (uimaxabs (imax0) != 0)
      abort ();
!   if (uimaxabs (0) != 0)
      link_error ();
!   if (uimaxabs (imax1) != 1)
      abort ();
!   if (uimaxabs (1) != 1)
      link_error ();
!   if (uimaxabs (imaxm1) != 1)
      abort ();
!   if (uimaxabs (-1) != 1)
      link_error ();
!   if (uimaxabs (imaxmin) != INTMAX_MAX)
      abort ();
!   if (uimaxabs (imaxmin - 1) != (uintmax_t) 1 + INTMAX_MAX)
      abort ();
!   if (uimaxabs (-INTMAX_MAX) != INTMAX_MAX)
      link_error ();
!   if (uimaxabs (-INTMAX_MAX - 1) != (uintmax_t) 1 + INTMAX_MAX)
      link_error ();
!   if (uimaxabs (imaxmax) != INTMAX_MAX)
      abort ();
!   if (uimaxabs (INTMAX_MAX) != INTMAX_MAX)
      link_error ();
  }
--- 96,123 ----
      abort ();
    if (ullabs (__LONG_LONG_MAX__) != __LONG_LONG_MAX__)
      link_error ();
!   if (umaxabs (imax0) != 0)
      abort ();
!   if (umaxabs (0) != 0)
      link_error ();
!   if (umaxabs (imax1) != 1)
      abort ();
!   if (umaxabs (1) != 1)
      link_error ();
!   if (umaxabs (imaxm1) != 1)
      abort ();
!   if (umaxabs (-1) != 1)
      link_error ();
!   if (umaxabs (imaxmin) != INTMAX_MAX)
      abort ();
!   if (umaxabs (imaxmin - 1) != (uintmax_t) 1 + INTMAX_MAX)
      abort ();
!   if (umaxabs (-INTMAX_MAX) != INTMAX_MAX)
      link_error ();
!   if (umaxabs (-INTMAX_MAX - 1) != (uintmax_t) 1 + INTMAX_MAX)
      link_error ();
!   if (umaxabs (imaxmax) != INTMAX_MAX)
      abort ();
!   if (umaxabs (INTMAX_MAX) != INTMAX_MAX)
      link_error ();
  }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.c-torture/execute/builtins/uabs-3.c gcc-16-20250907/gcc/testsuite/gcc.c-torture/execute/builtins/uabs-3.c
*** gcc-16-20250831/gcc/testsuite/gcc.c-torture/execute/builtins/uabs-3.c	Sun Aug 31 22:32:30 2025
--- gcc-16-20250907/gcc/testsuite/gcc.c-torture/execute/builtins/uabs-3.c	Sun Sep  7 22:33:18 2025
***************
*** 1,4 ****
! /* Test for builtin uabs, ulabs, ullabs, uimaxabs.  Test for __builtin versions. */
  /* Origin: Joseph Myers <jsm28@cam.ac.uk> */
  
  #include <limits.h>
--- 1,4 ----
! /* Test for builtin uabs, ulabs, ullabs, umaxabs.  Test for __builtin versions. */
  /* Origin: Joseph Myers <jsm28@cam.ac.uk> */
  
  #include <limits.h>
*************** main_test (void)
*** 92,119 ****
      abort ();
    if (__builtin_ullabs (__LONG_LONG_MAX__) != __LONG_LONG_MAX__)
      link_error ();
!   if (__builtin_uimaxabs (imax0) != 0)
      abort ();
!   if (__builtin_uimaxabs (0) != 0)
      link_error ();
!   if (__builtin_uimaxabs (imax1) != 1)
      abort ();
!   if (__builtin_uimaxabs (1) != 1)
      link_error ();
!   if (__builtin_uimaxabs (imaxm1) != 1)
      abort ();
!   if (__builtin_uimaxabs (-1) != 1)
      link_error ();
!   if (__builtin_uimaxabs (imaxmin) != INTMAX_MAX)
      abort ();
!   if (__builtin_uimaxabs (imaxmin - 1) != (uintmax_t) 1 + INTMAX_MAX)
      abort ();
!   if (__builtin_uimaxabs (-INTMAX_MAX) != INTMAX_MAX)
      link_error ();
!   if (__builtin_uimaxabs (-INTMAX_MAX - 1) != (uintmax_t) 1 + INTMAX_MAX)
      link_error ();
!   if (__builtin_uimaxabs (imaxmax) != INTMAX_MAX)
      abort ();
!   if (__builtin_uimaxabs (INTMAX_MAX) != INTMAX_MAX)
      link_error ();
  }
--- 92,119 ----
      abort ();
    if (__builtin_ullabs (__LONG_LONG_MAX__) != __LONG_LONG_MAX__)
      link_error ();
!   if (__builtin_umaxabs (imax0) != 0)
      abort ();
!   if (__builtin_umaxabs (0) != 0)
      link_error ();
!   if (__builtin_umaxabs (imax1) != 1)
      abort ();
!   if (__builtin_umaxabs (1) != 1)
      link_error ();
!   if (__builtin_umaxabs (imaxm1) != 1)
      abort ();
!   if (__builtin_umaxabs (-1) != 1)
      link_error ();
!   if (__builtin_umaxabs (imaxmin) != INTMAX_MAX)
      abort ();
!   if (__builtin_umaxabs (imaxmin - 1) != (uintmax_t) 1 + INTMAX_MAX)
      abort ();
!   if (__builtin_umaxabs (-INTMAX_MAX) != INTMAX_MAX)
      link_error ();
!   if (__builtin_umaxabs (-INTMAX_MAX - 1) != (uintmax_t) 1 + INTMAX_MAX)
      link_error ();
!   if (__builtin_umaxabs (imaxmax) != INTMAX_MAX)
      abort ();
!   if (__builtin_umaxabs (INTMAX_MAX) != INTMAX_MAX)
      link_error ();
  }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/asm-hard-reg-4.c gcc-16-20250907/gcc/testsuite/gcc.dg/asm-hard-reg-4.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/asm-hard-reg-4.c	Sun Aug 31 22:32:30 2025
--- gcc-16-20250907/gcc/testsuite/gcc.dg/asm-hard-reg-4.c	Sun Sep  7 22:33:20 2025
***************
*** 6,12 ****
  /* { dg-final { scan-assembler-times "foo\tv5" 4 { target { aarch64*-*-* } } } } */
  #elif defined (__arm__)
  # define FPR "{d5}"
! /* { dg-additional-options "-march=armv7-a+fp -mfloat-abi=hard" { target arm*-*-* } } */
  /* { dg-final { scan-assembler-times "foo\ts10" 4 { target { arm*-*-* } } } } */
  #elif defined (__powerpc__) || defined (__POWERPC__)
  # define FPR "{5}"
--- 6,12 ----
  /* { dg-final { scan-assembler-times "foo\tv5" 4 { target { aarch64*-*-* } } } } */
  #elif defined (__arm__)
  # define FPR "{d5}"
! /* { dg-additional-options "-mcpu=unset -march=armv7-a+fp -mfloat-abi=hard" { target arm*-*-* } } */
  /* { dg-final { scan-assembler-times "foo\ts10" 4 { target { arm*-*-* } } } } */
  #elif defined (__powerpc__) || defined (__POWERPC__)
  # define FPR "{5}"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/asm-hard-reg-error-3.c gcc-16-20250907/gcc/testsuite/gcc.dg/asm-hard-reg-error-3.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/asm-hard-reg-error-3.c	Sun Aug 31 22:32:30 2025
--- gcc-16-20250907/gcc/testsuite/gcc.dg/asm-hard-reg-error-3.c	Sun Sep  7 22:33:20 2025
***************
*** 1,6 ****
! /* { dg-do compile { target arm-*-* s390-*-* } } */
  /* { dg-options "-std=c99" } we need long long */
! /* { dg-additional-options "-march=armv7-a -marm" { target arm-*-* } } */
  
  /* Test register pairs.  */
  
--- 1,6 ----
! /* { dg-do compile { target arm*-*-* s390-*-* } } */
  /* { dg-options "-std=c99" } we need long long */
! /* { dg-additional-options "-mcpu=unset -march=armv7-a+fp -marm" { target arm*-*-* } } */
  
  /* Test register pairs.  */
  
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/cpp/c2y-counter-1.c gcc-16-20250907/gcc/testsuite/gcc.dg/cpp/c2y-counter-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/cpp/c2y-counter-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/cpp/c2y-counter-1.c	Sun Sep  7 22:33:21 2025
***************
*** 0 ****
--- 1,44 ----
+ /* N3457 - The __COUNTER__ predefined macro */
+ /* { dg-do run } */
+ /* { dg-options "-std=c2y -pedantic-errors" } */
+ 
+ #ifndef __COUNTER__
+ #error "__COUNTER__ not defined"
+ #endif
+ 
+ #define A(X) X + X
+ static_assert (A(__COUNTER__) == 0);
+ #define B(X)
+ B(__COUNTER__)
+ static_assert (__COUNTER__ == 1);
+ #define C(...) __VA_OPT__()
+ C(__COUNTER__)
+ static_assert (__COUNTER__ == 3);
+ #define D(...) __VA_OPT__(a)
+ int D(__COUNTER__) = 1;
+ static_assert (__COUNTER__ == 5);
+ #define E(X) #X
+ const char *b = E(__COUNTER__);
+ #define F(X) a##X
+ int F(__COUNTER__) = 2;
+ static_assert (__COUNTER__ == 6);
+ #define G(X) b##X = X
+ int G(__COUNTER__);
+ static_assert (__COUNTER__ == 8);
+ #if !defined(__COUNTER__) || (__COUNTER__ + 1 != __COUNTER__ + 0)
+ #error "Unexpected __COUNTER__ behavior")
+ #endif
+ static_assert (__COUNTER__ == 11);
+ 
+ extern int strcmp (const char *, const char *);
+ extern void abort ();
+ 
+ int
+ main ()
+ {
+   if (a != 1
+       || strcmp (b, "__COUNTER__")
+       || a__COUNTER__ != 2
+       || b__COUNTER__ != 7)
+     abort ();
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/fixed-point/bitint-1.c gcc-16-20250907/gcc/testsuite/gcc.dg/fixed-point/bitint-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/fixed-point/bitint-1.c	Sun Aug 31 22:32:31 2025
--- gcc-16-20250907/gcc/testsuite/gcc.dg/fixed-point/bitint-1.c	Sun Sep  7 22:33:21 2025
*************** void
*** 6,10 ****
--- 6,11 ----
  foo (void)
  {
    _Sat _BitInt (42) a;		/* { dg-error "both '_Sat' and '_BitInt' in declaration specifiers" } */
+ 				/* { dg-error "'_Sat' is used without '_Fract' or '_Accum'" "" { target *-*-* } .-1 } */
    _BitInt (42) _Sat b;		/* { dg-error "both '_Sat' and '_BitInt' in declaration specifiers" } */
  }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/pr121663.c gcc-16-20250907/gcc/testsuite/gcc.dg/pr121663.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/pr121663.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/pr121663.c	Sun Sep  7 22:33:22 2025
***************
*** 0 ****
--- 1,9 ----
+ /* PR middle-end/121663 */
+ /* { dg-do compile } */
+ /* { dg-options "" } */
+ 
+ void
+ foo (void)
+ {
+ #line 4294967295
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/pr89828.c gcc-16-20250907/gcc/testsuite/gcc.dg/pr89828.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/pr89828.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/pr89828.c	Sun Sep  7 22:33:22 2025
***************
*** 0 ****
--- 1,49 ----
+ /* { dg-do compile { target rx-*-* } } */
+ /* { dg-options "-O2 -g -fno-omit-frame-pointer" } */
+ struct baz;
+ struct foo {
+   struct baz *c;
+   unsigned int flags;
+ };
+ struct bar {
+   const struct bar *b;
+   void (*func)(struct foo *a, struct baz *c, int flags);
+ };
+ struct baz {
+   int flag;
+   const struct bar *b;
+ };
+ static inline
+ __attribute__((always_inline))
+ __attribute__((no_instrument_function)) void inline1(struct foo *a)
+ {
+   a->flags |= 1;
+ }
+ static inline
+ __attribute__((always_inline))
+ __attribute__((no_instrument_function)) int inline2(struct baz *c)
+ {
+   return c->flag == 1;
+ }
+ extern const struct bar _bar;
+ extern void func(struct foo *a);
+ void pr89828(struct foo *a, struct baz *c, int flags)
+ {
+   const struct bar *b;
+ 
+   if (c->b == a->c->b) {
+     a->c->b->func(a, c, flags);
+   } else {
+     for (b = (&_bar); b; b = b->b) {
+       if (b == a->c->b)
+ 	break;
+       if (b == c->b) {
+ 	func(a);
+ 	break;
+       }
+     }
+   }
+ 
+   if (inline2(a->c))
+     inline1(a);
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/scantest-lto.c gcc-16-20250907/gcc/testsuite/gcc.dg/scantest-lto.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/scantest-lto.c	Sun Aug 31 22:32:32 2025
--- gcc-16-20250907/gcc/testsuite/gcc.dg/scantest-lto.c	Sun Sep  7 22:33:22 2025
***************
*** 1,5 ****
--- 1,6 ----
  /* { dg-do compile { target lto } }
  /* { dg-options "-O2 -flto" } */
+ /* { dg-additional-options "-fno-unwind-tables -fno-asynchronous-unwind-tables" { target *-*-darwin* } } */
  
  void foo ()
  {
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/torture/pr121695-1.c gcc-16-20250907/gcc/testsuite/gcc.dg/torture/pr121695-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/torture/pr121695-1.c	Sun Aug 31 22:32:33 2025
--- gcc-16-20250907/gcc/testsuite/gcc.dg/torture/pr121695-1.c	Sun Sep  7 22:33:22 2025
***************
*** 1,17 ****
  /* { dg-do compile } */
  /* PR tree-optimization/121695 */
  
! int ac;
  char p;
! int *r;
! static unsigned t = 7;
! int q() {
!   int v;
  af: {
!   int ag[3];
!   int *ah = &ag[1];
    for (; ac;) {
!     int ai = 3971866093;
      if (0 >= *ah && (*r = 1))
        *ah &= ai;
      else {
--- 1,17 ----
  /* { dg-do compile } */
  /* PR tree-optimization/121695 */
  
! __INT32_TYPE__ ac;
  char p;
! __INT32_TYPE__ *r;
! static __UINT32_TYPE__ t = 7;
! __INT32_TYPE__ q() {
!   __INT32_TYPE__ v;
  af: {
!   __INT32_TYPE__ ag[3];
!   __INT32_TYPE__ *ah = &ag[1];
    for (; ac;) {
!     __INT32_TYPE__ ai = 3971866093;
      if (0 >= *ah && (*r = 1))
        *ah &= ai;
      else {
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/torture/pr121756.c gcc-16-20250907/gcc/testsuite/gcc.dg/torture/pr121756.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/torture/pr121756.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/torture/pr121756.c	Sun Sep  7 22:33:22 2025
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do compile } */
+ 
+ int a, b, *c = &b;
+ static void g(int i) {
+   int d = 0, e, f[] = {a}, j = a;
+   e = b;
+   if (e - i)
+     return;
+   a = 0;
+ h:
+   if (e) {
+     e = j;
+     if (f[3])
+       goto k;
+     goto h;
+   }
+   while (1) {    d = -1;
+     while (1) {
+       if (d - 1 - j < 0)
+         return;
+     k:
+       if (f[1])
+         break;
+     }
+   }
+ }
+ int main() {
+   g(1);
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/copy-prop-aggregate-struct-1.c gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/copy-prop-aggregate-struct-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/copy-prop-aggregate-struct-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/copy-prop-aggregate-struct-1.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,21 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-forwprop1-details -fdump-tree-optimized" } */
+ /* PR tree-optimization/121841 */
+ 
+ struct U2 {
+    int i[1024];
+ };
+ 
+ struct U2 g_284[1] = {{0UL}};
+ struct U2 g_283[1];
+ 
+ /* g_284[0] and g_283[0] are known not to
+    overlap so a copy prop can happen. */
+ void func_1() {
+   struct U2 removeme;
+   removeme = g_284[0];
+   g_283[0] =  removeme;
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "after previous" 1 "forwprop1" } } */
+ /* { dg-final { scan-tree-dump-not "removeme " "optimized" } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/copy-prop-aggregate-union-1.c gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/copy-prop-aggregate-union-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/copy-prop-aggregate-union-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/copy-prop-aggregate-union-1.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O1 -fdump-tree-forwprop1-details" } */
+ /* PR tree-optimization/107051 */
+ 
+ 
+ union U2 {
+    unsigned  f0;
+    char * f1;
+ };
+ 
+ /* Since g_284[0] and g_284[1] are known not overlap,
+    copy prop can happen.  */
+ union U2 g_284[2] = {{0UL},{0xC2488F72L}};
+ 
+ int e;
+ void func_1() {
+ 	union U2 c = {7};
+ 	int *d[2];
+ 	for (; e;)
+ 		*d[1] = 0;
+ 	g_284[0] = c = g_284[1];
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "after previous" 1 "forwprop1" } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/cswtch-6.c gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/cswtch-6.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/cswtch-6.c	Sun Aug 31 22:32:33 2025
--- gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/cswtch-6.c	Sun Sep  7 22:33:23 2025
*************** f1 (int v, int w)
*** 40,43 ****
    foo (i, j);
  }
  
! /* { dg-final { scan-assembler ".rodata.cst16" } } */
--- 40,43 ----
    foo (i, j);
  }
  
! /* { dg-final { scan-assembler ".rodata.cst16" { xfail { sparc*-*-solaris2* && { ! gas } } } } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/cswtch-7.c gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/cswtch-7.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/cswtch-7.c	Sun Aug 31 22:32:33 2025
--- gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/cswtch-7.c	Sun Sep  7 22:33:23 2025
*************** f1 (int v, int w)
*** 45,48 ****
    foo (i, j);
  }
  
! /* { dg-final { scan-assembler ".rodata.cst32" } } */
--- 45,48 ----
    foo (i, j);
  }
  
! /* { dg-final { scan-assembler ".rodata.cst32" { xfail { sparc*-*-solaris2* && { ! gas } } } } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/ptrdiff-1.c gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/ptrdiff-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/ptrdiff-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/ptrdiff-1.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,45 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -fdump-tree-optimized" } */
+ 
+ /* PR tree-optimization/121355 */
+ 
+ #define array_size 2
+ struct s1
+ {
+   int t[array_size];
+ };
+ 
+ struct s2
+ {
+   int p;
+   struct s1 t;
+ };
+ static inline int *b(struct s1 *t)
+ {
+   return t->t;
+ }
+ static inline int *e(struct s1 *t)
+ {
+   return b(t) + array_size;
+ }
+ void g(struct s2 *t)
+ {
+   struct s1 *t2 = &t->t;
+   int *te = e(t2);
+   int *ts = b(t2);
+   int tt = te - ts;
+ /*
+   _6 = t_3(D) + 12;
+   _8 = &MEM[(struct s1 *)t_3(D) + 4B].t;
+   _1 = _6 - _8;
+ 
+   _1 should be optimized to 2*sizeof(int) == 8.
+  */
+ 
+   if (tt != array_size)
+     __builtin_abort();
+ }
+ 
+ /* the call to abort should be removed. */
+ 
+ /* { dg-final { scan-tree-dump-not "abort " "optimized" } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-104.c gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-104.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-104.c	Sun Aug 31 22:32:33 2025
--- gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-104.c	Sun Sep  7 22:33:23 2025
*************** int main() {
*** 21,24 ****
    *c = &d;
  }
  
! /* { dg-final { scan-tree-dump-not "foo" "fre1" { xfail *-*-* } } } */
--- 21,24 ----
    *c = &d;
  }
  
! /* { dg-final { scan-tree-dump-not "foo" "fre1" } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-110.c gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-110.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-110.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-110.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O -fdump-tree-fre1-details" } */
+ 
+ struct A { int x; int y; };
+ struct B { struct A a; int k; };
+ 
+ int foo (struct A *a, struct B *b)
+ {
+   *a = (struct A){};
+   *b = (struct B){};
+   return a->x;
+ }
+ 
+ /* { dg-final { scan-tree-dump "Skipping possible redundant definition" "fre1" } } */
+ /* { dg-final { scan-tree-dump "return 0;" "fre1" } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/uninit-pr108466-1.c gcc-16-20250907/gcc/testsuite/gcc.dg/uninit-pr108466-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/uninit-pr108466-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/uninit-pr108466-1.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -Wmaybe-uninitialized" } */
+ 
+ /* PR tree-optimization/108466 */
+ /* The location of the uninitialized warning was missing due
+    to phi factoring.  */
+ 
+ typedef unsigned long long T;
+ 
+ T f(void);
+ unsigned char g(void)
+ {
+   T a;
+ 
+   if (f())
+     a = f();
+   if (f())
+     return 0;
+   else
+     return a; /* { dg-warning "may be used" } */
+ }
+ 
+ 
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121744-1.c gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121744-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121744-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121744-1.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-mavx2" { target avx2 } } */
+ 
+ unsigned long a[1024];
+ unsigned int b[1024];
+ 
+ void foo()
+ {
+   for (int i = 0; i < 1024; ++i)
+     a[i] = 1ul << b[i];
+ }
+ 
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { target vect_var_shift } } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121754.c gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121754.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121754.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121754.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ 
+ float a;
+ void
+ fn1 (int b)
+ {
+   for (; b < 10; b++)
+     {
+       a = 01.;
+       for (int c = 0; c < 2000; c++)
+         a *= 0.99;
+     }
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121758.c gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121758.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121758.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121758.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile } */
+ 
+ long g_2205, g_3005;
+ int g_3320;
+ void main()
+ {
+   for (; g_2205; g_2205 += 1)
+     {
+       g_3005 = 0;
+       for (; g_3005 <= 8; g_3005 += 1)
+ 	g_3320 &= 611 & (unsigned char)g_3005;
+     }
+ }
+ 
+ /* { dg-final { scan-tree-dump-not "failed to update reduction index" "vect" } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121767.c gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121767.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121767.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121767.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,9 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-mcpu=neoverse-v2" { target aarch64-*-* } } */
+ 
+ int foo (int x, int y, int n)
+ {
+   for (int i = 0; i < n; ++i)
+     x = x % y;
+   return x;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121768.c gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121768.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/vect/pr121768.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/vect/pr121768.c	Sun Sep  7 22:33:23 2025
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile } */
+ /* { dg-additional-options "-fno-tree-dce -fno-inline" } */
+ 
+ int a, b, c;
+ char d(char p) { return p; }
+ int main () {
+   while (c) {
+     for (b = 2; b; b--) {
+       int *g = &a;
+       *g = d((d(*g) >= 128) | b);
+     }
+     c--;
+   }
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.dg/vect/vect-pr61247.c gcc-16-20250907/gcc/testsuite/gcc.dg/vect/vect-pr61247.c
*** gcc-16-20250831/gcc/testsuite/gcc.dg/vect/vect-pr61247.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.dg/vect/vect-pr61247.c	Sun Sep  7 22:33:24 2025
***************
*** 0 ****
--- 1,17 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target vect_int } */
+ 
+ #include <stddef.h>
+ 
+ int foo (int *p, size_t sz)
+ {
+   int sum = 0;
+   for (unsigned i = 0; i < sz; ++i)
+     sum += p[i];
+   return sum;
+ }
+ 
+ /* The possibly wrapping IV together header copying confused SCEV
+    enough to fail vectorization even when versioning with niter
+    assumptions.  */
+ /* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/aarch64/simd/pr121749.c gcc-16-20250907/gcc/testsuite/gcc.target/aarch64/simd/pr121749.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/aarch64/simd/pr121749.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/aarch64/simd/pr121749.c	Sun Sep  7 22:33:25 2025
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do assemble } */
+ /* { dg-options "-O2" } */
+ 
+ #include <arm_neon.h>
+ 
+ uint32_t
+ foo (uint64_t v0)
+ {
+   return vqshrnd_n_u64 (vshrd_n_u64 (v0, 26), 7);
+ }
+ 
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/aarch64/sve/usminmax_di.c gcc-16-20250907/gcc/testsuite/gcc.target/aarch64/sve/usminmax_di.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/aarch64/sve/usminmax_di.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/aarch64/sve/usminmax_di.c	Sun Sep  7 22:33:28 2025
***************
*** 0 ****
--- 1,44 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 --param aarch64-autovec-preference=asimd-only" } */
+ 
+ #define MIN(a, b) ((a) < (b) ? (a) : (b))
+ #define MAX(a, b) ((a) > (b) ? (a) : (b))
+ 
+ #define FUNC(T, N, S)   \
+ void min_##S (T * __restrict__ a, T * __restrict__ b, T * __restrict__ c)  \
+ {									   \
+   int i;								   \
+   for (i = 0; i < N; i++)						   \
+     c[i] = MIN (a[i], b[i]);						   \
+ }									   \
+ void max_##S (T * __restrict__ a, T * __restrict__ b, T * __restrict__ c)  \
+ {									   \
+   int i;								   \
+   for (i = 0; i < N; i++)						   \
+     c[i] = MAX (a[i], b[i]);						   \
+ }									   \
+ void min_imm_##S (T * __restrict__ a, T * __restrict__ b, T * __restrict__ c) \
+ {									      \
+   int i;								      \
+   for (i = 0; i < N; i++)						      \
+     c[i] = MIN (a[i], 5);						      \
+ }									      \
+ void max_imm_##S (T * __restrict__ a, T * __restrict__ b, T * __restrict__ c) \
+ {									      \
+   int i;								      \
+   for (i = 0; i < N; i++)						      \
+     c[i] = MAX (a[i], 8);						      \
+ }
+ 
+ /* { dg-final { scan-assembler-times {\tsmax\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
+ /* { dg-final { scan-assembler-times {\tsmin\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
+ /* { dg-final { scan-assembler-times {\tsmax\tz[0-9]+\.d, z[0-9]+\.d, #8\n} 1 } } */
+ /* { dg-final { scan-assembler-times {\tsmin\tz[0-9]+\.d, z[0-9]+\.d, #5\n} 1 } } */
+ FUNC (long long, 2, di)
+ 
+ /* { dg-final { scan-assembler-times {\tumax\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
+ /* { dg-final { scan-assembler-times {\tumin\tz[0-9]+\.d, p[0-7]/m, z[0-9]+\.d, z[0-9]+\.d\n} 1 } } */
+ /* { dg-final { scan-assembler-times {\tumax\tz[0-9]+\.d, z[0-9]+\.d, #8\n} 1 } } */
+ /* { dg-final { scan-assembler-times {\tumin\tz[0-9]+\.d, z[0-9]+\.d, #5\n} 1 } } */
+ FUNC (unsigned long long, 2, udi)
+ 
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/aarch64/vect-pr121754.c gcc-16-20250907/gcc/testsuite/gcc.target/aarch64/vect-pr121754.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/aarch64/vect-pr121754.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/aarch64/vect-pr121754.c	Sun Sep  7 22:33:28 2025
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -ftree-vectorize -mcpu=neoverse-v2" } */
+ 
+ float a;
+ void
+ fn1 (int b)
+ {
+   for (; b < 10; b++)
+     {
+       a = 01.;
+       for (int c = 0; c < 2000; c++)
+         a *= 0.99;
+     }
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/arm/simd/vset_lane_u8.c gcc-16-20250907/gcc/testsuite/gcc.target/arm/simd/vset_lane_u8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/arm/simd/vset_lane_u8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/arm/simd/vset_lane_u8.c	Sun Sep  7 22:33:31 2025
***************
*** 0 ****
--- 1,32 ----
+ /* { dg-options "-O2 -fno-inline" } */
+ /* { dg-add-options arm_neon } */
+ #include <stdint.h>
+ #include "arm_neon.h"
+ 
+ volatile uint8_t v40 = 255;
+ 
+ volatile uint8x8_t result = {
+ #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+   0, 0, 0, 0, 0, 0, 0, 255
+ #else
+   255, 0, 0, 0, 0, 0, 0, 0
+ #endif
+ };
+ 
+ void check (uint8x8_t v)
+ {
+   int i;
+   for (i = 0; i < 8; i++)
+     if (v[i] != result[i])
+       __builtin_abort ();
+ }
+ 
+ int main ()
+ {
+   uint8_t v116[16] = {0};
+   uint8x8_t v117 = vld1_dup_u8(v116); // 0, ..., 0
+   uint8x8_t v119 = vset_lane_u8(v40, v117, 7); // 0, ..., 0, 0xff
+   check (v119);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/i386/memset-strategy-10.c gcc-16-20250907/gcc/testsuite/gcc.target/i386/memset-strategy-10.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/i386/memset-strategy-10.c	Sun Aug 31 22:32:56 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/i386/memset-strategy-10.c	Sun Sep  7 22:33:33 2025
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-Os -march=x86-64 -mstringop-strategy=vector_loop" } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
  /* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-Os -march=x86-64 -mstringop-strategy=vector_loop -fasynchronous-unwind-tables -fdwarf2-cfi-asm" } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
  /* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
  
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/i386/memset-strategy-13.c gcc-16-20250907/gcc/testsuite/gcc.target/i386/memset-strategy-13.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/i386/memset-strategy-13.c	Sun Aug 31 22:32:56 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/i386/memset-strategy-13.c	Sun Sep  7 22:33:33 2025
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-Os -mno-sse -mstringop-strategy=unrolled_loop" } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
  /* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
  
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-Os -mno-sse -mstringop-strategy=unrolled_loop -fasynchronous-unwind-tables -fdwarf2-cfi-asm" } */
  /* Keep labels and directives ('.cfi_startproc', '.cfi_endproc').  */
  /* { dg-final { check-function-bodies "**" "" "" { target { ! ia32 } } {^\t?\.} } } */
  
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/i386/pr121699.c gcc-16-20250907/gcc/testsuite/gcc.target/i386/pr121699.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/i386/pr121699.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/i386/pr121699.c	Sun Sep  7 22:33:33 2025
***************
*** 0 ****
--- 1,23 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=znver4 -O3" } */
+ 
+ typedef struct
+ {
+   int u32;
+ } nir_const_value;
+ 
+ nir_const_value *evaluate_prmt_nv__dst_val;
+ 
+ int evaluate_prmt_nv__src_0, evaluate_prmt_nv_src;
+ 
+ void
+ evaluate_prmt_nv (unsigned num_components)
+ {
+   for (unsigned _i = 0; _i < num_components; _i++)
+     {
+       char x = evaluate_prmt_nv_src;
+       if (evaluate_prmt_nv__src_0)
+         x = x >> 7;
+       evaluate_prmt_nv__dst_val[_i].u32 = x;
+     }
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-1.c gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-1.c	Sun Aug 31 22:32:56 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-1.c	Sun Sep  7 22:33:33 2025
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-mgfni -mavx512vl -mavx512bw -mavx512f -O3" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 14 } } */
  
  #ifndef N
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-mgfni -mavx512vl -mavx512bw -mavx512f -O3 -march=x86-64 -mtune=generic" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 14 } } */
  
  #ifndef N
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c	Sun Aug 31 22:32:56 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-2.c	Sun Sep  7 22:33:33 2025
***************
*** 1,5 ****
  /* { dg-do run } */
! /* { dg-options "-mgfni -mavx512vl -mavx512bw -mavx512f -O3 -Wno-shift-count-negative" } */
  
  #include <string.h>
  
--- 1,5 ----
  /* { dg-do run } */
! /* { dg-options "-mgfni -mavx512vl -mavx512bw -mavx512f -O3 -Wno-shift-count-negative -march=x86-64 -mtune=generic" } */
  
  #include <string.h>
  
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-3.c gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-3.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-3.c	Sun Aug 31 22:32:56 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-3.c	Sun Sep  7 22:33:33 2025
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-mgfni -mavx512bw -mavx512f -O3" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 12 } } */
  
  /* Based on a test case from Andrew Pinski */
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-mgfni -mavx512bw -mavx512f -O3 -march=x86-64 -mtune=generic" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 12 } } */
  
  /* Based on a test case from Andrew Pinski */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-5.c gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-5.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-5.c	Sun Aug 31 22:32:56 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-5.c	Sun Sep  7 22:33:33 2025
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-mgfni -mavx -O3 -Wno-shift-count-negative" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 31 } } */
  
  #include "shift-gf2p8affine-2.c"
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-mgfni -mavx -O3 -Wno-shift-count-negative -march=x86-64 -mtune=generic" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 31 } } */
  
  #include "shift-gf2p8affine-2.c"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-6.c gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-6.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-6.c	Sun Aug 31 22:32:56 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-6.c	Sun Sep  7 22:33:33 2025
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-mgfni -O3 -Wno-shift-count-negative" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 0 } } */
  
  #include "shift-gf2p8affine-2.c"
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-mgfni -O3 -Wno-shift-count-negative -march=x86-64 -mtune=generic" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 0 } } */
  
  #include "shift-gf2p8affine-2.c"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-7.c gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-7.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-7.c	Sun Aug 31 22:32:56 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/i386/shift-gf2p8affine-7.c	Sun Sep  7 22:33:33 2025
***************
*** 1,5 ****
  /* { dg-do compile } */
! /* { dg-options "-mgfni -mavx512vl -mavx512bw -mavx512f -O3 -Wno-shift-count-negative" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 53 } } */
  
  #include "shift-gf2p8affine-2.c"
--- 1,5 ----
  /* { dg-do compile } */
! /* { dg-options "-mgfni -mavx512vl -mavx512bw -mavx512f -O3 -Wno-shift-count-negative -mtune=generic -march=x86-64" } */
  /* { dg-final { scan-assembler-times "vgf2p8affineqb" 53 } } */
  
  #include "shift-gf2p8affine-2.c"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c	Sun Sep  7 22:34:05 2025
***************
*** 4,11 ****
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-align-1.c.  */
- #include <stdlib.h>
- #include <stdarg.h>
  
  /* Compile time known misalignment. Cannot use loop peeling to align
     the store.  */
--- 4,9 ----
*************** main1 (struct foo * __restrict__ p)
*** 28,50 ****
      {
        p->y[i] = x[i];
      }
- 
-   /* check results:  */
-   for (i = 0; i < N; i++)
-     {
-       if (p->y[i] != x[i])
- 	abort ();
-     }
-   return 0;
- }
- 
- 
- int main (void)
- {
-   int i;
-   struct foo *p = malloc (2*sizeof (struct foo));
-   
-   main1 (p);
    return 0;
  }
  
--- 26,31 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-10.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-10.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-10.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-10.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,39 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+ 
+ /* Taken from vect/vect-95.c.  */
+ #include <stdlib.h>
+ #include <stdarg.h>
+ 
+ #include "vsx-vectorize-2.c"
+ 
+ __attribute__ ((noinline))
+ void bar (float *pd, float *pa, float *pb, float *pc) 
+ {
+   int i;
+ 
+   /* check results:  */
+   for (i = 0; i < N; i++)
+     {
+       if (pa[i] != (pb[i] * pc[i]))
+ 	abort ();
+       if (pd[i] != 5.0)
+ 	abort ();
+     }
+ 
+   return;
+ }
+ 
+ int main (void)
+ {
+   int i;
+   float a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   float d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   float b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+   float c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+ 
+   main1 (N,&d[1],a,b,c);
+   main1 (N-2,&d[1],a,b,c);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-11.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-11.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-11.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-11.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+ 
+ /* Taken from vect/vect-95.c.  */
+ #include <stdlib.h>
+ #include <stdarg.h>
+ 
+ #include "vsx-vectorize-3.c"
+ 
+ __attribute__ ((noinline))
+ void bar (short *pa, short *pb, short *pc) 
+ {
+   int i;
+ 
+   /* check results:  */
+   for (i = 0; i < N; i++)
+     {
+       if (pa[i] != (pb[i] * pc[i]))
+ 	abort ();
+     }
+ 
+   return;
+ }
+ 
+ int main (void)
+ {
+   int i;
+   short a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   short b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+   short c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+ 
+   main1 (N,a,b,c);
+   main1 (N-2,a,b,c);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-12.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-12.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-12.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-12.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+ 
+ /* Taken from vect/vect-95.c.  */
+ #include <stdlib.h>
+ #include <stdarg.h>
+ 
+ #include "vsx-vectorize-4.c"
+ 
+ __attribute__ ((noinline))
+ void bar (double *pa, double *pb, double *pc) 
+ {
+   int i;
+ 
+   /* check results:  */
+   for (i = 0; i < N; i++)
+     {
+       if (pa[i] != (pb[i] * pc[i]))
+ 	abort ();
+     }
+ 
+   return;
+ }
+ 
+ int main (void)
+ {
+   int i;
+   double a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   double b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+   double c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+ 
+   main1 (N,a,b,c);
+   main1 (N-2,a,b,c);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-13.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-13.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-13.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-13.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,36 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+ 
+ /* Taken from vect/vect-95.c.  */
+ #include <stdlib.h>
+ #include <stdarg.h>
+ 
+ #include "vsx-vectorize-5.c"
+ 
+ __attribute__ ((noinline))
+ void bar (char *pa, char *pb, char *pc) 
+ {
+   int i;
+ 
+   /* check results:  */
+   for (i = 0; i < N; i++)
+     {
+       if (pa[i] != (pb[i] + pc[i]))
+ 	abort ();
+     }
+ 
+   return;
+ }
+ 
+ int main (void)
+ {
+   int i;
+   char a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   char b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+   char c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+ 
+   main1 (N,a,b,c);
+   main1 (N-2,a,b,c);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-14.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-14.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-14.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-14.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,39 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+ 
+ /* Taken from vect/vect-95.c.  */
+ #include <stdlib.h>
+ #include <stdarg.h>
+ 
+ #include "vsx-vectorize-6.c"
+ 
+ __attribute__ ((noinline))
+ void bar (double *pd, double *pa, double *pb, double *pc) 
+ {
+   int i;
+ 
+   /* check results:  */
+   for (i = 0; i < N; i++)
+     {
+       if (pa[i] != (pb[i] * pc[i]))
+ 	abort ();
+       if (pd[i] != 5.0)
+ 	abort ();
+     }
+ 
+   return;
+ }
+ 
+ int main (void)
+ {
+   int i;
+   double a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   double d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   double b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+   double c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+ 
+   main1 (N,&d[1],a,b,c);
+   main1 (N-2,&d[1],a,b,c);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-15.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-15.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-15.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-15.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,39 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+ 
+ /* Taken from vect/vect-95.c.  */
+ #include <stdlib.h>
+ #include <stdarg.h>
+ 
+ #include "vsx-vectorize-7.c"
+ 
+ __attribute__ ((noinline))
+ void bar (int *pd, int *pa, int *pb, int *pc) 
+ {
+   int i;
+ 
+   /* check results:  */
+   for (i = 0; i < N; i++)
+     {
+       if (pa[i] != (pb[i] * pc[i]))
+ 	abort ();
+       if (pd[i] != 5.0)
+ 	abort ();
+     }
+ 
+   return;
+ }
+ 
+ int main (void)
+ {
+   int i;
+   int a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   int d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   int b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+   int c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+ 
+   main1 (N,&d[1],a,b,c);
+   main1 (N-2,&d[1],a,b,c);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-16.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-16.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,39 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */
+ 
+ /* Taken from vect/vect-95.c.  */
+ #include <stdlib.h>
+ #include <stdarg.h>
+ 
+ #include "vsx-vectorize-8.c"
+ 
+ __attribute__ ((noinline))
+ void bar (short *pd, short *pa, short *pb, short *pc) 
+ {
+   int i;
+ 
+   /* check results:  */
+   for (i = 0; i < N; i++)
+     {
+       if (pa[i] != (pb[i] * pc[i]))
+ 	abort ();
+       if (pd[i] != 5.0)
+ 	abort ();
+     }
+ 
+   return;
+ }
+ 
+ int main (void)
+ {
+   int i;
+   short a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   short d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
+   short b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
+   short c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
+ 
+   main1 (N,&d[1],a,b,c);
+   main1 (N-2,&d[1],a,b,c);
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c	Sun Sep  7 22:34:05 2025
***************
*** 4,31 ****
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
- #include <stdlib.h>
- #include <stdarg.h>
  
  #define N 256
  
! __attribute__ ((noinline))
! void bar (float *pd, float *pa, float *pb, float *pc) 
! {
!   int i;
! 
!   /* check results:  */
!   for (i = 0; i < N; i++)
!     {
!       if (pa[i] != (pb[i] * pc[i]))
! 	abort ();
!       if (pd[i] != 5.0)
! 	abort ();
!     }
! 
!   return;
! }
! 
  
  __attribute__ ((noinline)) int
  main1 (int n, float * __restrict__ pd, float * __restrict__ pa, float * __restrict__ pb, float * __restrict__ pc)
--- 4,13 ----
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
  
  #define N 256
  
! void bar (float *pd, float *pa, float *pb, float *pc);
  
  __attribute__ ((noinline)) int
  main1 (int n, float * __restrict__ pd, float * __restrict__ pa, float * __restrict__ pb, float * __restrict__ pc)
*************** main1 (int n, float * __restrict__ pd, f
*** 42,61 ****
  
    return 0;
  }
- 
- int main (void)
- {
-   int i;
-   float a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   float d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   float b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-   float c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
- 
-   main1 (N,&d[1],a,b,c);
-   main1 (N-2,&d[1],a,b,c);
- 
-   return 0;
- }
  
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
  /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
--- 24,29 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c	Sun Sep  7 22:34:05 2025
***************
*** 4,29 ****
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
- #include <stdlib.h>
- #include <stdarg.h>
  
  #define N 256
  
! __attribute__ ((noinline))
! void bar (short *pa, short *pb, short *pc) 
! {
!   int i;
! 
!   /* check results:  */
!   for (i = 0; i < N; i++)
!     {
!       if (pa[i] != (pb[i] * pc[i]))
! 	abort ();
!     }
! 
!   return;
! }
! 
  
  __attribute__ ((noinline)) int
  main1 (int n, short * __restrict__ pa, short * __restrict__ pb, short * __restrict__ pc)
--- 4,13 ----
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
  
  #define N 256
  
! void bar (short *pa, short *pb, short *pc);
  
  __attribute__ ((noinline)) int
  main1 (int n, short * __restrict__ pa, short * __restrict__ pb, short * __restrict__ pc)
*************** main1 (int n, short * __restrict__ pa, s
*** 39,57 ****
  
    return 0;
  }
- 
- int main (void)
- {
-   int i;
-   short a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   short b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-   short c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
- 
-   main1 (N,a,b,c);
-   main1 (N-2,a,b,c);
- 
-   return 0;
- }
  
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
  /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
--- 23,28 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c	Sun Sep  7 22:34:05 2025
***************
*** 4,29 ****
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
- #include <stdlib.h>
- #include <stdarg.h>
  
  #define N 256
  
! __attribute__ ((noinline))
! void bar (double *pa, double *pb, double *pc) 
! {
!   int i;
! 
!   /* check results:  */
!   for (i = 0; i < N; i++)
!     {
!       if (pa[i] != (pb[i] * pc[i]))
! 	abort ();
!     }
! 
!   return;
! }
! 
  
  __attribute__ ((noinline)) int
  main1 (int n, double * __restrict__ pa, double * __restrict__ pb, double * __restrict__ pc)
--- 4,13 ----
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
  
  #define N 256
  
! void bar (double *pa, double *pb, double *pc);
  
  __attribute__ ((noinline)) int
  main1 (int n, double * __restrict__ pa, double * __restrict__ pb, double * __restrict__ pc)
*************** main1 (int n, double * __restrict__ pa,
*** 39,57 ****
  
    return 0;
  }
- 
- int main (void)
- {
-   int i;
-   double a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   double b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-   double c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
- 
-   main1 (N,a,b,c);
-   main1 (N-2,a,b,c);
- 
-   return 0;
- }
  
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
  /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
--- 23,28 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c	Sun Sep  7 22:34:05 2025
***************
*** 4,29 ****
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
- #include <stdlib.h>
- #include <stdarg.h>
  
  #define N 256
  
! __attribute__ ((noinline))
! void bar (char *pa, char *pb, char *pc) 
! {
!   int i;
! 
!   /* check results:  */
!   for (i = 0; i < N; i++)
!     {
!       if (pa[i] != (pb[i] + pc[i]))
! 	abort ();
!     }
! 
!   return;
! }
! 
  
  __attribute__ ((noinline)) int
  main1 (int n, char * __restrict__ pa, char * __restrict__ pb, char * __restrict__ pc)
--- 4,13 ----
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
  
  #define N 256
  
! void bar (char *pa, char *pb, char *pc);
  
  __attribute__ ((noinline)) int
  main1 (int n, char * __restrict__ pa, char * __restrict__ pb, char * __restrict__ pc)
*************** main1 (int n, char * __restrict__ pa, ch
*** 39,57 ****
  
    return 0;
  }
- 
- int main (void)
- {
-   int i;
-   char a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   char b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-   char c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
- 
-   main1 (N,a,b,c);
-   main1 (N-2,a,b,c);
- 
-   return 0;
- }
  
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
  /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */
--- 23,28 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c	Sun Sep  7 22:34:05 2025
***************
*** 4,31 ****
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
- #include <stdlib.h>
- #include <stdarg.h>
  
  #define N 256
  
! __attribute__ ((noinline))
! void bar (double *pd, double *pa, double *pb, double *pc) 
! {
!   int i;
! 
!   /* check results:  */
!   for (i = 0; i < N; i++)
!     {
!       if (pa[i] != (pb[i] * pc[i]))
! 	abort ();
!       if (pd[i] != 5.0)
! 	abort ();
!     }
! 
!   return;
! }
! 
  
  __attribute__ ((noinline)) int
  main1 (int n, double * __restrict__ pd, double * __restrict__ pa, double * __restrict__ pb, double * __restrict__ pc)
--- 4,13 ----
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
  
  #define N 256
  
! void bar (double *pd, double *pa, double *pb, double *pc);
  
  __attribute__ ((noinline)) int
  main1 (int n, double * __restrict__ pd, double * __restrict__ pa, double * __restrict__ pb, double * __restrict__ pc)
*************** main1 (int n, double * __restrict__ pd,
*** 42,61 ****
  
    return 0;
  }
- 
- int main (void)
- {
-   int i;
-   double a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   double d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   double b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-   double c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
- 
-   main1 (N,&d[1],a,b,c);
-   main1 (N-2,&d[1],a,b,c);
- 
-   return 0;
- }
  
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
  /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
--- 24,29 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c	Sun Sep  7 22:34:05 2025
***************
*** 4,31 ****
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
- #include <stdlib.h>
- #include <stdarg.h>
  
  #define N 256
  
! __attribute__ ((noinline))
! void bar (int *pd, int *pa, int *pb, int *pc) 
! {
!   int i;
! 
!   /* check results:  */
!   for (i = 0; i < N; i++)
!     {
!       if (pa[i] != (pb[i] * pc[i]))
! 	abort ();
!       if (pd[i] != 5.0)
! 	abort ();
!     }
! 
!   return;
! }
! 
  
  __attribute__ ((noinline)) int
  main1 (int n, int * __restrict__ pd, int * __restrict__ pa, int * __restrict__ pb, int * __restrict__ pc)
--- 4,13 ----
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
  
  #define N 256
  
! void bar (int *pd, int *pa, int *pb, int *pc);
  
  __attribute__ ((noinline)) int
  main1 (int n, int * __restrict__ pd, int * __restrict__ pa, int * __restrict__ pb, int * __restrict__ pc)
*************** main1 (int n, int * __restrict__ pd, int
*** 42,61 ****
  
    return 0;
  }
- 
- int main (void)
- {
-   int i;
-   int a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   int d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   int b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-   int c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
- 
-   main1 (N,&d[1],a,b,c);
-   main1 (N-2,&d[1],a,b,c);
- 
-   return 0;
- }
  
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
  /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" {xfail { {! vect_hw_misalign } || powerpc*-*-* } } } } */
--- 24,29 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c	Sun Sep  7 22:34:05 2025
***************
*** 4,31 ****
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
- #include <stdlib.h>
- #include <stdarg.h>
  
  #define N 256
  
! __attribute__ ((noinline))
! void bar (short *pd, short *pa, short *pb, short *pc) 
! {
!   int i;
! 
!   /* check results:  */
!   for (i = 0; i < N; i++)
!     {
!       if (pa[i] != (pb[i] * pc[i]))
! 	abort ();
!       if (pd[i] != 5.0)
! 	abort ();
!     }
! 
!   return;
! }
! 
  
  __attribute__ ((noinline)) int
  main1 (int n, short * __restrict__ pd, short * __restrict__ pa, short * __restrict__ pb, short * __restrict__ pc)
--- 4,13 ----
  /* { dg-require-effective-target powerpc_vsx } */
  
  /* Taken from vect/vect-95.c.  */
  
  #define N 256
  
! void bar (short *pd, short *pa, short *pb, short *pc);
  
  __attribute__ ((noinline)) int
  main1 (int n, short * __restrict__ pd, short * __restrict__ pa, short * __restrict__ pb, short * __restrict__ pc)
*************** main1 (int n, short * __restrict__ pd, s
*** 42,61 ****
  
    return 0;
  }
- 
- int main (void)
- {
-   int i;
-   short a[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   short d[N+1] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__)));
-   short b[N] = {0,3,6,9,12,15,18,21,24,27,30,33,36,39,42,45,48,51,54,57};
-   short c[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19};
- 
-   main1 (N,&d[1],a,b,c);
-   main1 (N-2,&d[1],a,b,c);
- 
-   return 0;
- }
  
  /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
  /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */
--- 24,29 ----
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-9.c gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-9.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-9.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-9.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,24 ----
+ /* { dg-do run } */
+ /* { dg-options "-O2 -ftree-vectorize -fno-tree-loop-distribute-patterns -fno-vect-cost-model -fdump-tree-vect-details" } */
+ 
+ /* Taken from vect/vect-align-1.c.  */
+ #include <stdlib.h>
+ #include <stdarg.h>
+ 
+ #include "vsx-vectorize-1.c"
+ 
+ int main (void)
+ {
+   int i;
+   struct foo *p = malloc (2*sizeof (struct foo));
+   
+   main1 (p);
+ 
+   /* check results:  */
+   for (i = 0; i < N; i++)
+     {
+       if (p->y[i] != x[i])
+ 	abort ();
+     }
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/amo/pr121213.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/amo/pr121213.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/amo/pr121213.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/amo/pr121213.c	Sun Sep  7 22:34:05 2025
*************** void test1(unsigned* lock) {
*** 13,17 ****
  
  /* { dg-final { scan-assembler-not "\tli" } } */
  /* { dg-final { scan-assembler-times "\tamoswap...aq\t\[axt\]\[0-9\],zero," 2 } } */
! /* { dg-final { scan-assembler-not "\tsext" { xfail *-*-* } } } */
  
--- 13,17 ----
  
  /* { dg-final { scan-assembler-not "\tli" } } */
  /* { dg-final { scan-assembler-times "\tamoswap...aq\t\[axt\]\[0-9\],zero," 2 } } */
! /* { dg-final { scan-assembler-not "\tsext" } } */
  
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/can_inline_p_test-01.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/can_inline_p_test-01.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/can_inline_p_test-01.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/can_inline_p_test-01.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-einline-details" } */
+ 
+ #include "riscv_vector.h"
+ int
+ __attribute__((target("arch=+v")))
+ foo (){
+    return __riscv_vsetvl_e8m8 (100);
+ }
+ 
+ 
+ int bar(){
+   return foo();
+ }
+ 
+ /* { dg-final { scan-tree-dump {not inlinable: bar/\d+ -> foo/\d+, target specific option mismatch} "einline" } } */
+ /* { dg-final { scan-tree-dump-not {\(inlined\)} "einline" } } */
+ /* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Og" ""} } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/can_inline_p_test-02.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/can_inline_p_test-02.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/can_inline_p_test-02.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/can_inline_p_test-02.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-einline-details" } */
+ 
+ #include "riscv_vector.h"
+ int
+ __attribute__((target("arch=+v")))
+ foo (){
+    return __riscv_vsetvl_e8m8 (100);
+ }
+ 
+ 
+ int
+ __attribute__((target("arch=+zve32x")))
+ bar(){
+   return foo();
+ }
+ 
+ /* { dg-final { scan-tree-dump {not inlinable: bar/\d+ -> foo/\d+, target specific option mismatch} "einline" } } */
+ /* { dg-final { scan-tree-dump-not {\(inlined\)} "einline" } } */
+ /* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Og" ""} } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/can_inline_p_test-03.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/can_inline_p_test-03.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/can_inline_p_test-03.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/can_inline_p_test-03.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,19 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-einline-details" } */
+ 
+ #include "riscv_vector.h"
+ int
+ __attribute__((target("arch=+zve32x")))
+ foo (){
+    return __riscv_vsetvl_e8m8 (100);
+ }
+ 
+ 
+ int
+ __attribute__((target("arch=+v")))
+ bar(){
+   return foo();
+ }
+ 
+ /* { dg-final { scan-tree-dump {Inlining foo/\d+ into bar/\d+} "einline" } } */
+ /* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Og" ""} } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/can_inline_p_test-04.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/can_inline_p_test-04.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/can_inline_p_test-04.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/can_inline_p_test-04.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-einline-details" } */
+ 
+ #include "riscv_vector.h"
+ int
+ __attribute__((target("arch=+v,+zvl256b")))
+ foo (){
+    return __riscv_vsetvl_e8m8 (100);
+ }
+ 
+ 
+ int
+ __attribute__((target("arch=+v")))
+ bar(){
+   return foo();
+ }
+ 
+ /* { dg-final { scan-tree-dump {not inlinable: bar/\d+ -> foo/\d+, target specific option mismatch} "einline" } } */
+ /* { dg-final { scan-tree-dump-not {\(inlined\)} "einline" } } */
+ /* { dg-skip-if "" { *-*-* } {"-O0" "-O1" "-Og" ""} } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/lto/pr110812_0.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/lto/pr110812_0.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/lto/pr110812_0.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/lto/pr110812_0.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,9 ----
+ /* { dg-lto-do link } */
+ /* { dg-lto-options { { -flto -march=rv64gc -mabi=lp64d } } } */
+ /* { dg-extra-ld-options "-nostdlib" } */
+ 
+ void foo();
+ 
+ int _start(){
+     foo();
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/lto/pr110812_1.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/lto/pr110812_1.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/lto/pr110812_1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/lto/pr110812_1.c	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,9 ----
+ /* { dg-options { -flto -march=rv64gcv -mabi=lp64d } } */
+ 
+ #include "riscv_vector.h"
+ uint8_t *x, *y;
+ void foo () {
+    int vl = __riscv_vsetvl_e8m8 (100);
+    vint8m8_t a = __riscv_vle8_v_i8m8 (x, 100);
+    __riscv_vse8_v_i8m8 (y, a, 100);
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/lto/riscv-lto.exp gcc-16-20250907/gcc/testsuite/gcc.target/riscv/lto/riscv-lto.exp
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/lto/riscv-lto.exp	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/lto/riscv-lto.exp	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,61 ----
+ # Copyright (C) 2025 Free Software Foundation, Inc.
+ 
+ # This program is free software; you can redistribute it and/or modify
+ # it under the terms of the GNU General Public License as published by
+ # the Free Software Foundation; either version 3 of the License, or
+ # (at your option) any later version.
+ #
+ # This program is distributed in the hope that it will be useful,
+ # but WITHOUT ANY WARRANTY; without even the implied warranty of
+ # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ # GNU General Public License for more details.
+ #
+ # You should have received a copy of the GNU General Public License
+ # along with GCC; see the file COPYING3.  If not see
+ # <http://www.gnu.org/licenses/>.
+ 
+ # Exit immediately if this isn't an RISC-V target.
+ if ![istarget riscv*-*-*] then {
+   return
+ }
+ 
+ # Test link-time optimization across multiple files.
+ #
+ # Programs are broken into multiple files.  Each one is compiled
+ # separately with LTO information.  The final executable is generated
+ # by collecting all the generated object files using regular LTO or WHOPR.
+ 
+ if $tracelevel then {
+     strace $tracelevel
+ }
+ 
+ # Load procedures from common libraries.
+ load_lib standard.exp
+ load_lib gcc.exp
+ 
+ # Load the language-independent compabibility support procedures.
+ load_lib lto.exp
+ 
+ # If LTO has not been enabled, bail.
+ if { ![check_effective_target_lto] } {
+     return
+ }
+ 
+ gcc_init
+ lto_init no-mathlib
+ 
+ # Define an identifier for use with this suite to avoid name conflicts
+ # with other lto tests running at the same time.
+ set sid "c_lto"
+ 
+ # Main loop.
+ foreach src [lsort [find $srcdir/$subdir *_0.c]] {
+     # If we're only testing specific files and this isn't one of them, skip it.
+     if ![runtest_file_p $runtests $src] then {
+ 	continue
+     }
+ 
+     lto-execute $src $sid
+ }
+ 
+ lto_finish
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/lto/riscv_vector.h gcc-16-20250907/gcc/testsuite/gcc.target/riscv/lto/riscv_vector.h
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/lto/riscv_vector.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/lto/riscv_vector.h	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,11 ----
+ /* Wrapper of riscv_vector.h, prevent riscv_vector.h including stdint.h from
+    C library, that might cause problem on testing RV32 related testcase when
+    we disable multilib.  */
+ #ifndef _RISCV_VECTOR_WRAP_H
+ 
+ #define _GCC_WRAP_STDINT_H
+ #include "stdint-gcc.h"
+ #include_next <riscv_vector.h>
+ #define _RISCV_VECTOR_WRAP_H
+ 
+ #endif
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/riscv.exp gcc-16-20250907/gcc/testsuite/gcc.target/riscv/riscv.exp
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/riscv.exp	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/riscv.exp	Sun Sep  7 22:34:05 2025
*************** gcc-dg-runtest [lsort [glob -nocomplain
*** 40,45 ****
--- 40,47 ----
  	"" $DEFAULT_CFLAGS
  gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/sched1-spills/*.{\[cS\],cpp}]] \
  	"" $DEFAULT_CFLAGS
+ gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/xandes/*.\[cS\]]] \
+ 	"" $DEFAULT_CFLAGS
  
  # Saturation alu
  foreach opt {
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/riscv_vector.h gcc-16-20250907/gcc/testsuite/gcc.target/riscv/riscv_vector.h
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/riscv_vector.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/riscv_vector.h	Sun Sep  7 22:34:05 2025
***************
*** 0 ****
--- 1,11 ----
+ /* Wrapper of riscv_vector.h, prevent riscv_vector.h including stdint.h from
+    C library, that might cause problem on testing RV32 related testcase when
+    we disable multilib.  */
+ #ifndef _RISCV_VECTOR_WRAP_H
+ 
+ #define _GCC_WRAP_STDINT_H
+ #include "stdint-gcc.h"
+ #include_next <riscv_vector.h>
+ #define _RISCV_VECTOR_WRAP_H
+ 
+ #endif
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121510.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121510.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121510.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121510.c	Sun Sep  7 22:34:07 2025
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gcv_zvfhmin -mabi=lp64d -O3" } */
+ 
+ long *print_bfloat_block;
+ void ftoastr(float);
+ void print_bfloat() {
+   for (;;) {
+     long j;
+     union {
+       _Float16 x;
+       char b[]
+     } u;
+     j = 0;
+     for (; j < sizeof 0; j++)
+       u.b[j] = print_bfloat_block[j];
+     ftoastr(u.x);
+   }
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121742.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121742.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121742.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121742.c	Sun Sep  7 22:34:07 2025
***************
*** 0 ****
--- 1,30 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target riscv_v_ok } */
+ /* { dg-options "-march=rv64gcv -mabi=lp64d -O2" } */
+ 
+ typedef unsigned long uint64_t;
+ typedef unsigned int uint32_t;
+ typedef unsigned char uint8_t;
+ typedef uint8_t a __attribute__((vector_size(4)));
+ int b, c;
+ 
+ uint64_t d() {
+   a e = {5, 9, 1, 5};
+   a bla = {0, 0, 0, 0};
+   int *f = &b;
+   uint32_t g = 0;
+   int i = 0;
+   for (; i < 2; i++)
+     for (c = 0; c <= 2; c++) {
+       *f ^= e[3] + 9;
+       e = __builtin_shufflevector(
+           ~__builtin_shufflevector(bla, e, 1, 4, 3, 4), e, 0, 1, 1, 7);
+     }
+   return g;
+ }
+ 
+ int main() {
+   int j = d ();
+   if (b != 0)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121780.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121780.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121780.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121780.c	Sun Sep  7 22:34:07 2025
***************
*** 0 ****
--- 1,47 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target riscv_v_ok } */
+ /* { dg-options "-march=rv64gcv -mabi=lp64d -O1 -Wno-overflow" } */
+ 
+ typedef char int8_t;
+ typedef unsigned char uint8_t;
+ typedef short int16_t;
+ typedef int int32_t;
+ typedef unsigned int uint32_t;
+ typedef long int64_t;
+ typedef unsigned long uint64_t;
+ 
+ typedef uint8_t a;
+ typedef a b __attribute__((vector_size(4)));
+ typedef a c __attribute__((vector_size(8)));
+ int d[10];
+ struct {
+   int16_t e;
+ } f;
+ int64_t g;
+ int32_t j(int32_t, int32_t, int8_t, uint8_t, int64_t) {
+   c k = {20927, 0, 9, 6, 6, 2};
+   int *l = &d[1];
+   for (;;) {
+     asm goto("" : : : : m);
+     k = __builtin_shufflevector(
+         __builtin_shufflevector(k, k, 3, 1, 1, 9, 4, 5, 9, 0),
+         __builtin_shufflevector((b){}, (b){}, 1, 3, 7, 6, 0, 0, 6, 2), 10, 2, 1,
+         7, 7, 7, 4, 5);
+     for (; f.e >= 0;) {
+       *l = k[7];
+       uint32_t n[][7][6] = {};
+       return n[0][5][0];
+     m:
+     }
+   }
+ }
+ 
+ int main() {
+   uint64_t o = 1;
+   j(o, g, g, o, 0);
+   int BS_CHECKSUM = 5;
+   for (int i = 0; i < 10; i++)
+     BS_CHECKSUM ^= d[i];
+   if (BS_CHECKSUM != 7)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121781.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121781.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121781.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr121781.c	Sun Sep  7 22:34:07 2025
***************
*** 0 ****
--- 1,53 ----
+ /* { dg-do run } */
+ /* { dg-require-effective-target riscv_v_ok } */
+ /* { dg-options "-march=rv64gcv -mabi=lp64d -O1" } */
+ 
+ typedef unsigned char uint8_t;
+ typedef short int16_t;
+ typedef unsigned short uint16_t;
+ typedef int int32_t;
+ typedef unsigned int uint32_t;
+ typedef unsigned long uint64_t;
+ 
+ typedef int16_t a;
+ typedef uint16_t b;
+ typedef b c __attribute__((vector_size(8)));
+ typedef a d __attribute__((vector_size(8)));
+ typedef b e __attribute__((vector_size(16)));
+ int f[10];
+ uint16_t g, l, k;
+ int32_t j;
+ int32_t m(uint32_t, const uint32_t *);
+ int32_t *n(uint64_t, uint8_t);
+ uint8_t o() {
+   int p = 7;
+   m(p, 0);
+   return 0;
+ }
+ int32_t m(uint32_t, const uint32_t *) {
+   int32_t q = l;
+   n(q, 0);
+   return k;
+ }
+ int32_t *n(uint64_t, uint8_t) {
+   c r = {1, 6, 8, 30};
+   d s = {};
+   e u;
+   int *t = &f[7];
+   for (j = 9; j; j--) {
+     *t ^= s[0];
+     r = __builtin_shufflevector(r * r, r, 2, 5, 7, 2);
+     for (g = 0; g != 1; g = g + 3)
+       s = (d)__builtin_shufflevector(
+           __builtin_shufflevector(u, (e){}, 3, 1, 1, 1), r, 4, 6, 0, 2);
+   }
+   return &j;
+ }
+ int main() {
+   o();
+   int BS_CHECKSUM = 5;
+   for (int i = 0; i < 10; i++)
+     BS_CHECKSUM ^= f[i];
+   if (BS_CHECKSUM != 0xffffffffffffced1ull)
+     __builtin_abort ();
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/J gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/J
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/J	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/J	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,58 ----
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800  1) /* { dg-do compile } */
+ cd1ce3b326d4 (demin.han    2024-03-13 18:43:26 +0800  2) /* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 -mrvv-max-lmul=m8 -ffast-math -fdump-tree-optimized" } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800  3) 
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800  4) #include "def.h"
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800  5) 
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800  6) DEF_OP_V (nearbyintf16, 1, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800  7) DEF_OP_V (nearbyintf16, 2, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800  8) DEF_OP_V (nearbyintf16, 4, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800  9) DEF_OP_V (nearbyintf16, 8, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 10) DEF_OP_V (nearbyintf16, 16, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 11) DEF_OP_V (nearbyintf16, 32, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 12) DEF_OP_V (nearbyintf16, 64, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 13) DEF_OP_V (nearbyintf16, 128, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 14) DEF_OP_V (nearbyintf16, 256, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 15) DEF_OP_V (nearbyintf16, 512, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 16) DEF_OP_V (nearbyintf16, 1024, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 17) DEF_OP_V (nearbyintf16, 2048, _Float16, __builtin_nearbyintf16)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 18) 
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 19) DEF_OP_V (nearbyintf, 1, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 20) DEF_OP_V (nearbyintf, 2, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 21) DEF_OP_V (nearbyintf, 4, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 22) DEF_OP_V (nearbyintf, 8, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 23) DEF_OP_V (nearbyintf, 16, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 24) DEF_OP_V (nearbyintf, 32, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 25) DEF_OP_V (nearbyintf, 64, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 26) DEF_OP_V (nearbyintf, 128, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 27) DEF_OP_V (nearbyintf, 256, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 28) DEF_OP_V (nearbyintf, 512, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 29) DEF_OP_V (nearbyintf, 1024, float, __builtin_nearbyintf)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 30) 
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 31) DEF_OP_V (nearbyint, 1, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 32) DEF_OP_V (nearbyint, 2, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 33) DEF_OP_V (nearbyint, 4, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 34) DEF_OP_V (nearbyint, 8, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 35) DEF_OP_V (nearbyint, 16, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 36) DEF_OP_V (nearbyint, 32, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 37) DEF_OP_V (nearbyint, 64, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 38) DEF_OP_V (nearbyint, 128, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 39) DEF_OP_V (nearbyint, 256, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 40) DEF_OP_V (nearbyint, 512, double, __builtin_nearbyint)
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 41) 
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 42) /* { dg-final { scan-assembler-not {csrr} } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 43) /* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 44) /* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 45) /* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 46) /* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 47) /* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 48) /* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 49) /* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 50) /* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 51) /* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 52) /* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 53) /* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 54) /* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 55) /* { dg-final { scan-assembler-times {vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t} 30 } } */
+ e2023d2d5ff2 (Pan Li       2023-09-25 10:04:36 +0800 56) /* { dg-final { scan-assembler-times {vfcvt\.f\.x\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t} 30 } } */
+ f5696e9b1113 (Vineet Gupta 2025-08-13 20:20:34 -0700 57) /* { dg-final { scan-assembler-times {frflags\s+[atx][0-9]+} 32 } } */
+ f5696e9b1113 (Vineet Gupta 2025-08-13 20:20:34 -0700 58) /* { dg-final { scan-assembler-times {fsflags\s+[atx][0-9]+} 32 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-2.c	Sun Sep  7 22:34:08 2025
*************** DEF_MINMAX_VX (max, 128, double, >)
*** 39,43 ****
  DEF_MINMAX_VX (max, 256, double, >)
  DEF_MINMAX_VX (max, 512, double, >)
  
! /* { dg-final { scan-assembler-times {vfmax\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 30 } } */
  /* { dg-final { scan-assembler-not {csrr} } } */
--- 39,43 ----
  DEF_MINMAX_VX (max, 256, double, >)
  DEF_MINMAX_VX (max, 512, double, >)
  
! /* { dg-final { scan-assembler-times {vfmax\.vf\s+v[0-9]+,\s*v[0-9]+,\s*f[ast]?[0-9]+} 30 } } */
  /* { dg-final { scan-assembler-not {csrr} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/floating-point-max-4.c	Sun Sep  7 22:34:08 2025
*************** DEF_MINMAX_VX (max, 128, double, >=)
*** 39,43 ****
  DEF_MINMAX_VX (max, 256, double, >=)
  DEF_MINMAX_VX (max, 512, double, >=)
  
! /* { dg-final { scan-assembler-times {vfmax\.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 30 } } */
  /* { dg-final { scan-assembler-not {csrr} } } */
--- 39,43 ----
  DEF_MINMAX_VX (max, 256, double, >=)
  DEF_MINMAX_VX (max, 512, double, >=)
  
! /* { dg-final { scan-assembler-times {vfmax\.vf\s+v[0-9]+,\s*v[0-9]+,\s*f[ast]?[0-9]+} 30 } } */
  /* { dg-final { scan-assembler-not {csrr} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c	Sun Sep  7 22:34:08 2025
*************** DEF_VF_BINOP_CASE_0 (_Float16, *, mul)
*** 20,25 ****
--- 20,27 ----
  DEF_VF_BINOP_REVERSE_CASE_0 (_Float16, /, rdiv)
  DEF_VF_BINOP_CASE_2_WRAP (_Float16, MIN_FUNC_0_WRAP (_Float16), min)
  DEF_VF_BINOP_CASE_2_WRAP (_Float16, MIN_FUNC_1_WRAP (_Float16), min)
+ DEF_VF_BINOP_CASE_2_WRAP (_Float16, MAX_FUNC_0_WRAP (_Float16), max)
+ DEF_VF_BINOP_CASE_2_WRAP (_Float16, MAX_FUNC_1_WRAP (_Float16), max)
  
  /* { dg-final { scan-assembler-times {vfmadd.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfmsub.vf} 1 } } */
*************** DEF_VF_BINOP_CASE_2_WRAP (_Float16, MIN_
*** 33,37 ****
--- 35,41 ----
  /* { dg-final { scan-assembler-times {vfwmsac.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfwnmacc.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfwnmsac.vf} 1 } } */
+ /* { dg-final { scan-assembler-times {vfmul.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfrdiv.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfmin.vf} 2 } } */
+ /* { dg-final { scan-assembler-times {vfmax.vf} 2 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c	Sun Sep  7 22:34:08 2025
*************** DEF_VF_BINOP_CASE_0 (float, *, mul)
*** 20,25 ****
--- 20,27 ----
  DEF_VF_BINOP_REVERSE_CASE_0 (float, /, rdiv)
  DEF_VF_BINOP_CASE_2_WRAP (float, MIN_FUNC_0_WRAP (float), min)
  DEF_VF_BINOP_CASE_2_WRAP (float, MIN_FUNC_1_WRAP (float), min)
+ DEF_VF_BINOP_CASE_2_WRAP (float, MAX_FUNC_0_WRAP (float), max)
+ DEF_VF_BINOP_CASE_2_WRAP (float, MAX_FUNC_1_WRAP (float), max)
  
  /* { dg-final { scan-assembler-times {vfmadd.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfmsub.vf} 1 } } */
*************** DEF_VF_BINOP_CASE_2_WRAP (float, MIN_FUN
*** 36,38 ****
--- 38,41 ----
  /* { dg-final { scan-assembler-times {vfmul.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfrdiv.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfmin.vf} 2 } } */
+ /* { dg-final { scan-assembler-times {vfmax.vf} 2 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f64.c	Sun Sep  7 22:34:08 2025
*************** DEF_VF_BINOP_CASE_0 (double, *, mul)
*** 16,21 ****
--- 16,23 ----
  DEF_VF_BINOP_REVERSE_CASE_0 (double, /, rdiv)
  DEF_VF_BINOP_CASE_2_WRAP (double, MIN_FUNC_0_WRAP (double), min)
  DEF_VF_BINOP_CASE_2_WRAP (double, MIN_FUNC_1_WRAP (double), min)
+ DEF_VF_BINOP_CASE_2_WRAP (double, MAX_FUNC_0_WRAP (double), max)
+ DEF_VF_BINOP_CASE_2_WRAP (double, MAX_FUNC_1_WRAP (double), max)
  
  /* { dg-final { scan-assembler-times {vfmadd.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfmsub.vf} 1 } } */
*************** DEF_VF_BINOP_CASE_2_WRAP (double, MIN_FU
*** 28,30 ****
--- 30,33 ----
  /* { dg-final { scan-assembler-times {vfmul.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfrdiv.vf} 1 } } */
  /* { dg-final { scan-assembler-times {vfmin.vf} 2 } } */
+ /* { dg-final { scan-assembler-times {vfmax.vf} 2 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c	Sun Sep  7 22:34:08 2025
***************
*** 18,21 ****
--- 18,22 ----
  /* { dg-final { scan-assembler-not {vfmul.vf} } } */
  /* { dg-final { scan-assembler-not {vfrdiv.vf} } } */
  /* { dg-final { scan-assembler-not {vfmin.vf} } } */
+ /* { dg-final { scan-assembler-not {vfmax.vf} } } */
  /* { dg-final { scan-assembler-times {fcvt.s.h} 4 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c	Sun Sep  7 22:34:08 2025
***************
*** 18,21 ****
--- 18,22 ----
  /* { dg-final { scan-assembler-not {vfmul.vf} } } */
  /* { dg-final { scan-assembler-not {vfrdiv.vf} } } */
  /* { dg-final { scan-assembler-not {vfmin.vf} } } */
+ /* { dg-final { scan-assembler-not {vfmax.vf} } } */
  /* { dg-final { scan-assembler-times {fcvt.d.s} 4 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f64.c	Sun Sep  7 22:34:08 2025
***************
*** 14,16 ****
--- 14,17 ----
  /* { dg-final { scan-assembler-not {vfmul.vf} } } */
  /* { dg-final { scan-assembler-not {vfrdiv.vf} } } */
  /* { dg-final { scan-assembler-not {vfmin.vf} } } */
+ /* { dg-final { scan-assembler-not {vfmax.vf} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c	Sun Sep  7 22:34:08 2025
*************** DEF_VF_BINOP_CASE_3_WRAP (_Float16, MIN_
*** 22,27 ****
--- 22,31 ----
  			  VF_BINOP_FUNC_BODY_X128)
  DEF_VF_BINOP_CASE_3_WRAP (_Float16, MIN_FUNC_1_WRAP (_Float16), min,
  			  VF_BINOP_FUNC_BODY_X128)
+ DEF_VF_BINOP_CASE_3_WRAP (_Float16, MAX_FUNC_0_WRAP (_Float16), max,
+ 			  VF_BINOP_FUNC_BODY_X128)
+ DEF_VF_BINOP_CASE_3_WRAP (_Float16, MAX_FUNC_1_WRAP (_Float16), max,
+ 			  VF_BINOP_FUNC_BODY_X128)
  
  /* { dg-final { scan-assembler {vfmadd.vf} } } */
  /* { dg-final { scan-assembler {vfmsub.vf} } } */
*************** DEF_VF_BINOP_CASE_3_WRAP (_Float16, MIN_
*** 38,40 ****
--- 42,45 ----
  /* { dg-final { scan-assembler {vfmul.vf} } } */
  /* { dg-final { scan-assembler {vfrdiv.vf} } } */
  /* { dg-final { scan-assembler {vfmin.vf} } } */
+ /* { dg-final { scan-assembler {vfmax.vf} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c	Sun Sep  7 22:34:08 2025
*************** DEF_VF_BINOP_CASE_3_WRAP (float, MIN_FUN
*** 22,27 ****
--- 22,31 ----
  			  VF_BINOP_FUNC_BODY_X128)
  DEF_VF_BINOP_CASE_3_WRAP (float, MIN_FUNC_1_WRAP (float), min,
  			  VF_BINOP_FUNC_BODY_X128)
+ DEF_VF_BINOP_CASE_3_WRAP (float, MAX_FUNC_0_WRAP (float), max,
+ 			  VF_BINOP_FUNC_BODY_X128)
+ DEF_VF_BINOP_CASE_3_WRAP (float, MAX_FUNC_1_WRAP (float), max,
+ 			  VF_BINOP_FUNC_BODY_X128)
  
  /* { dg-final { scan-assembler {vfmadd.vf} } } */
  /* { dg-final { scan-assembler {vfmsub.vf} } } */
*************** DEF_VF_BINOP_CASE_3_WRAP (float, MIN_FUN
*** 38,40 ****
--- 42,45 ----
  /* { dg-final { scan-assembler {vfmul.vf} } } */
  /* { dg-final { scan-assembler {vfrdiv.vf} } } */
  /* { dg-final { scan-assembler {vfmin.vf} } } */
+ /* { dg-final { scan-assembler {vfmax.vf} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f64.c	Sun Sep  7 22:34:08 2025
*************** DEF_VF_BINOP_CASE_3_WRAP (double, MIN_FU
*** 18,23 ****
--- 18,27 ----
  			  VF_BINOP_FUNC_BODY_X128)
  DEF_VF_BINOP_CASE_3_WRAP (double, MIN_FUNC_1_WRAP (double), min,
  			  VF_BINOP_FUNC_BODY_X128)
+ DEF_VF_BINOP_CASE_3_WRAP (double, MAX_FUNC_0_WRAP (double), max,
+ 			  VF_BINOP_FUNC_BODY_X128)
+ DEF_VF_BINOP_CASE_3_WRAP (double, MAX_FUNC_1_WRAP (double), max,
+ 			  VF_BINOP_FUNC_BODY_X128)
  
  /* { dg-final { scan-assembler {vfmadd.vf} } } */
  /* { dg-final { scan-assembler {vfmsub.vf} } } */
*************** DEF_VF_BINOP_CASE_3_WRAP (double, MIN_FU
*** 30,32 ****
--- 34,37 ----
  /* { dg-final { scan-assembler {vfmul.vf} } } */
  /* { dg-final { scan-assembler {vfrdiv.vf} } } */
  /* { dg-final { scan-assembler {vfmin.vf} } } */
+ /* { dg-final { scan-assembler {vfmax.vf} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c	Sun Sep  7 22:34:08 2025
***************
*** 18,21 ****
--- 18,22 ----
  /* { dg-final { scan-assembler-not {vfmul.vf} } } */
  /* { dg-final { scan-assembler-not {vfrdiv.vf} } } */
  /* { dg-final { scan-assembler-not {vfmin.vf} } } */
+ /* { dg-final { scan-assembler-not {vfmax.vf} } } */
  /* { dg-final { scan-assembler {fcvt.s.h} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c	Sun Sep  7 22:34:08 2025
***************
*** 18,21 ****
--- 18,22 ----
  /* { dg-final { scan-assembler-not {vfmul.vf} } } */
  /* { dg-final { scan-assembler-not {vfrdiv.vf} } } */
  /* { dg-final { scan-assembler-not {vfmin.vf} } } */
+ /* { dg-final { scan-assembler-not {vfmax.vf} } } */
  /* { dg-final { scan-assembler {fcvt.d.s} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c	Sun Aug 31 22:32:59 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f64.c	Sun Sep  7 22:34:08 2025
***************
*** 14,16 ****
--- 14,17 ----
  /* { dg-final { scan-assembler-not {vfmul.vf} } } */
  /* { dg-final { scan-assembler-not {vfrdiv.vf} } } */
  /* { dg-final { scan-assembler-not {vfmin.vf} } } */
+ /* { dg-final { scan-assembler-not {vfmax.vf} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_binop.h gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_binop.h
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_binop.h	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_binop.h	Sun Sep  7 22:34:08 2025
***************
*** 130,135 ****
--- 130,141 ----
  #define DEF_MIN_1(T)                                                           \
    static inline T test_##T##_min_1 (T a, T b) { return a >= b ? b : a; }
  
+ #define DEF_MAX_0(T)                                                           \
+   static inline T test_##T##_max_0 (T a, T b) { return a > b ? a : b; }
+ 
+ #define DEF_MAX_1(T)                                                           \
+   static inline T test_##T##_max_1 (T a, T b) { return a >= b ? a : b; }
+ 
  DEF_MIN_0 (_Float16)
  DEF_MIN_0 (float)
  DEF_MIN_0 (double)
*************** DEF_MIN_1 (_Float16)
*** 138,149 ****
--- 144,169 ----
  DEF_MIN_1 (float)
  DEF_MIN_1 (double)
  
+ DEF_MAX_0 (_Float16)
+ DEF_MAX_0 (float)
+ DEF_MAX_0 (double)
+ 
+ DEF_MAX_1 (_Float16)
+ DEF_MAX_1 (float)
+ DEF_MAX_1 (double)
+ 
  #define MIN_FUNC_0(T) test_##T##_min_0
  #define MIN_FUNC_0_WRAP(T) MIN_FUNC_0 (T)
  
  #define MIN_FUNC_1(T) test_##T##_min_1
  #define MIN_FUNC_1_WRAP(T) MIN_FUNC_1 (T)
  
+ #define MAX_FUNC_0(T) test_##T##_max_0
+ #define MAX_FUNC_0_WRAP(T) MAX_FUNC_0 (T)
+ 
+ #define MAX_FUNC_1(T) test_##T##_max_1
+ #define MAX_FUNC_1_WRAP(T) MAX_FUNC_1 (T)
+ 
  #define DEF_VF_BINOP_CASE_2(T, FUNC, NAME)                                     \
    void test_vf_binop_##NAME##_##FUNC##_##T##_case_2 (T *restrict out,          \
  						     T *restrict in, T f,      \
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_binop_data.h gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_binop_data.h
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_binop_data.h	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_binop_data.h	Sun Sep  7 22:34:08 2025
*************** double TEST_BINOP_DATA(double, min)[][4]
*** 447,451 ****
--- 447,597 ----
      },
    },
  };
+ _Float16 TEST_BINOP_DATA(_Float16, max)[][4][N] =
+ {
+   {
+     { 0x1.e000000000000p+4f16 },
+     {
+     0x1.8fc0000000000p+4f16, 0x1.8fc0000000000p+4f16, 0x1.8fc0000000000p+4f16, 0x1.8fc0000000000p+4f16,
+     0x1.b880000000000p+6f16, 0x1.b880000000000p+6f16, 0x1.b880000000000p+6f16, 0x1.b880000000000p+6f16,
+     0x1.a4c0000000000p+5f16, 0x1.a4c0000000000p+5f16, 0x1.a4c0000000000p+5f16, 0x1.a4c0000000000p+5f16,
+     0x1.6f80000000000p+4f16, 0x1.6f80000000000p+4f16, 0x1.6f80000000000p+4f16, 0x1.6f80000000000p+4f16,
+     },
+     {
+     0x1.e000000000000p+4f16, 0x1.e000000000000p+4f16, 0x1.e000000000000p+4f16, 0x1.e000000000000p+4f16,
+     0x1.b880000000000p+6f16, 0x1.b880000000000p+6f16, 0x1.b880000000000p+6f16, 0x1.b880000000000p+6f16,
+     0x1.a4c0000000000p+5f16, 0x1.a4c0000000000p+5f16, 0x1.a4c0000000000p+5f16, 0x1.a4c0000000000p+5f16,
+     0x1.e000000000000p+4f16, 0x1.e000000000000p+4f16, 0x1.e000000000000p+4f16, 0x1.e000000000000p+4f16,
+     },
+   },
+   {
+     { -0x1.e000000000000p+4f16 },
+     {
+     -0x1.53c0000000000p+5f16, -0x1.53c0000000000p+5f16, -0x1.53c0000000000p+5f16, -0x1.53c0000000000p+5f16,
+     0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16,
+     -0x1.ffc0000000000p+7f16, -0x1.ffc0000000000p+7f16, -0x1.ffc0000000000p+7f16, -0x1.ffc0000000000p+7f16,
+     -0x1.94c0000000000p+6f16, -0x1.94c0000000000p+6f16, -0x1.94c0000000000p+6f16, -0x1.94c0000000000p+6f16,
+     },
+     {
+     -0x1.e000000000000p+4f16, -0x1.e000000000000p+4f16, -0x1.e000000000000p+4f16, -0x1.e000000000000p+4f16,
+     0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16,
+     -0x1.e000000000000p+4f16, -0x1.e000000000000p+4f16, -0x1.e000000000000p+4f16, -0x1.e000000000000p+4f16,
+     -0x1.e000000000000p+4f16, -0x1.e000000000000p+4f16, -0x1.e000000000000p+4f16, -0x1.e000000000000p+4f16,
+     },
+   },
+   {
+     { -0x0.0p+0f16 },
+     {
+     -0x1.53c0000000000p+5f16, -0x1.53c0000000000p+5f16, -0x1.53c0000000000p+5f16, -0x1.53c0000000000p+5f16,
+     0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16,
+     -0x1.ffc0000000000p+7f16, -0x1.ffc0000000000p+7f16, -0x1.ffc0000000000p+7f16, -0x1.ffc0000000000p+7f16,
+     -0x1.94c0000000000p+6f16, -0x1.94c0000000000p+6f16, -0x1.94c0000000000p+6f16, -0x1.94c0000000000p+6f16,
+     },
+     {
+     -0x0.0p+0f16, -0x0.0p+0f16, -0x0.0p+0f16, -0x0.0p+0f16,
+     0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16, 0x1.c300000000000p+6f16,
+     -0x0.0p+0f16, -0x0.0p+0f16, -0x0.0p+0f16, -0x0.0p+0f16,
+     -0x0.0p+0f16, -0x0.0p+0f16, -0x0.0p+0f16, -0x0.0p+0f16,
+     },
+   },
+ };
+ 
+ float TEST_BINOP_DATA(float, max)[][4][N] =
+ {
+   {
+     { 0x1.4d11200000000p+61f },
+     {
+     0x1.8fe1540000000p+60f, 0x1.8fe1540000000p+60f, 0x1.8fe1540000000p+60f, 0x1.8fe1540000000p+60f,
+     0x1.b8b5320000000p+62f, 0x1.b8b5320000000p+62f, 0x1.b8b5320000000p+62f, 0x1.b8b5320000000p+62f,
+     0x1.a4eb340000000p+61f, 0x1.a4eb340000000p+61f, 0x1.a4eb340000000p+61f, 0x1.a4eb340000000p+61f,
+     0x1.6faeda0000000p+60f, 0x1.6faeda0000000p+60f, 0x1.6faeda0000000p+60f, 0x1.6faeda0000000p+60f,
+     },
+     {
+     0x1.4d11200000000p+61f, 0x1.4d11200000000p+61f, 0x1.4d11200000000p+61f, 0x1.4d11200000000p+61f,
+     0x1.b8b5320000000p+62f, 0x1.b8b5320000000p+62f, 0x1.b8b5320000000p+62f, 0x1.b8b5320000000p+62f,
+     0x1.a4eb340000000p+61f, 0x1.a4eb340000000p+61f, 0x1.a4eb340000000p+61f, 0x1.a4eb340000000p+61f,
+     0x1.4d11200000000p+61f, 0x1.4d11200000000p+61f, 0x1.4d11200000000p+61f, 0x1.4d11200000000p+61f,
+     },
+   },
+   {
+     { 0x1.0000000000000p+0f },
+     {
+     -0x1.53e0ba0000000p+61f, -0x1.53e0ba0000000p+61f, -0x1.53e0ba0000000p+61f, -0x1.53e0ba0000000p+61f,
+     0x1.c3397c0000000p+62f, 0x1.c3397c0000000p+62f, 0x1.c3397c0000000p+62f, 0x1.c3397c0000000p+62f,
+     -0x1.ffe2020000000p+63f, -0x1.ffe2020000000p+63f, -0x1.ffe2020000000p+63f, -0x1.ffe2020000000p+63f,
+     -0x1.94d2a80000000p+62f, -0x1.94d2a80000000p+62f, -0x1.94d2a80000000p+62f, -0x1.94d2a80000000p+62f,
+     },
+     {
+     0x1.0000000000000p+0f, 0x1.0000000000000p+0f, 0x1.0000000000000p+0f, 0x1.0000000000000p+0f,
+     0x1.c3397c0000000p+62f, 0x1.c3397c0000000p+62f, 0x1.c3397c0000000p+62f, 0x1.c3397c0000000p+62f,
+     0x1.0000000000000p+0f, 0x1.0000000000000p+0f, 0x1.0000000000000p+0f, 0x1.0000000000000p+0f,
+     0x1.0000000000000p+0f, 0x1.0000000000000p+0f, 0x1.0000000000000p+0f, 0x1.0000000000000p+0f,
+     },
+   },
+   {
+     { -0x0.0p+0f },
+     {
+     -0x1.062a340000000p+61f, -0x1.062a340000000p+61f, -0x1.062a340000000p+61f, -0x1.062a340000000p+61f,
+     -0x1.e573960000000p+63f, -0x1.e573960000000p+63f, -0x1.e573960000000p+63f, -0x1.e573960000000p+63f,
+     0x1.96d5c20000000p+60f, 0x1.96d5c20000000p+60f, 0x1.96d5c20000000p+60f, 0x1.96d5c20000000p+60f,
+     -0x1.08eb620000000p+61f, -0x1.08eb620000000p+61f, -0x1.08eb620000000p+61f, -0x1.08eb620000000p+61f,
+     },
+     {
+     -0x0.0p+0f, -0x0.0p+0f, -0x0.0p+0f, -0x0.0p+0f,
+     -0x0.0p+0f, -0x0.0p+0f, -0x0.0p+0f, -0x0.0p+0f,
+     0x1.96d5c20000000p+60f, 0x1.96d5c20000000p+60f, 0x1.96d5c20000000p+60f, 0x1.96d5c20000000p+60f,
+     -0x0.0p+0f, -0x0.0p+0f, -0x0.0p+0f, -0x0.0p+0f,
+     },
+   },
+ };
+ 
+ double TEST_BINOP_DATA(double, max)[][4][N] =
+ {
+   {
+     { 0x1.317e5ef3ab327p+509 },
+     {
+     0x1.8fe1565f12a78p+508, 0x1.8fe1565f12a78p+508, 0x1.8fe1565f12a78p+508, 0x1.8fe1565f12a78p+508,
+     0x1.b8b533d821ccap+510, 0x1.b8b533d821ccap+510, 0x1.b8b533d821ccap+510, 0x1.b8b533d821ccap+510,
+     0x1.a4eb35b744a54p+509, 0x1.a4eb35b744a54p+509, 0x1.a4eb35b744a54p+509, 0x1.a4eb35b744a54p+509,
+     0x1.6faedb6395f48p+508, 0x1.6faedb6395f48p+508, 0x1.6faedb6395f48p+508, 0x1.6faedb6395f48p+508,
+     },
+     {
+     0x1.317e5ef3ab327p+509, 0x1.317e5ef3ab327p+509, 0x1.317e5ef3ab327p+509, 0x1.317e5ef3ab327p+509,
+     0x1.b8b533d821ccap+510, 0x1.b8b533d821ccap+510, 0x1.b8b533d821ccap+510, 0x1.b8b533d821ccap+510,
+     0x1.a4eb35b744a54p+509, 0x1.a4eb35b744a54p+509, 0x1.a4eb35b744a54p+509, 0x1.a4eb35b744a54p+509,
+     0x1.317e5ef3ab327p+509, 0x1.317e5ef3ab327p+509, 0x1.317e5ef3ab327p+509, 0x1.317e5ef3ab327p+509,
+     },
+   },
+   {
+     { 0x1.0000000000000p+0 },
+     {
+     -0x1.53e0bc0170fe8p+509, -0x1.53e0bc0170fe8p+509, -0x1.53e0bc0170fe8p+509, -0x1.53e0bc0170fe8p+509,
+     0x1.c3397ceebc142p+510, 0x1.c3397ceebc142p+510, 0x1.c3397ceebc142p+510, 0x1.c3397ceebc142p+510,
+     -0x1.ffe2046f999e3p+511, -0x1.ffe2046f999e3p+511, -0x1.ffe2046f999e3p+511, -0x1.ffe2046f999e3p+511,
+     -0x1.94d2a9003ee18p+510, -0x1.94d2a9003ee18p+510, -0x1.94d2a9003ee18p+510, -0x1.94d2a9003ee18p+510,
+     },
+     {
+     0x1.0000000000000p+0, 0x1.0000000000000p+0, 0x1.0000000000000p+0, 0x1.0000000000000p+0,
+     0x1.c3397ceebc142p+510, 0x1.c3397ceebc142p+510, 0x1.c3397ceebc142p+510, 0x1.c3397ceebc142p+510,
+     0x1.0000000000000p+0, 0x1.0000000000000p+0, 0x1.0000000000000p+0, 0x1.0000000000000p+0,
+     0x1.0000000000000p+0, 0x1.0000000000000p+0, 0x1.0000000000000p+0, 0x1.0000000000000p+0,
+     },
+   },
+   {
+     { -0x1.317e5ef3ab327p+509 },
+     {
+     -0x1.062a35a13cec0p+509, -0x1.062a35a13cec0p+509, -0x1.062a35a13cec0p+509, -0x1.062a35a13cec0p+509,
+     -0x1.e5739808c344dp+511, -0x1.e5739808c344dp+511, -0x1.e5739808c344dp+511, -0x1.e5739808c344dp+511,
+     0x1.96d5c3ca79e38p+508, 0x1.96d5c3ca79e38p+508, 0x1.96d5c3ca79e38p+508, 0x1.96d5c3ca79e38p+508,
+     -0x1.08eb6307cef78p+509, -0x1.08eb6307cef78p+509, -0x1.08eb6307cef78p+509, -0x1.08eb6307cef78p+509,
+     },
+     {
+     -0x1.062a35a13cec0p+509, -0x1.062a35a13cec0p+509, -0x1.062a35a13cec0p+509, -0x1.062a35a13cec0p+509,
+     -0x1.317e5ef3ab327p+509, -0x1.317e5ef3ab327p+509, -0x1.317e5ef3ab327p+509, -0x1.317e5ef3ab327p+509,
+     0x1.96d5c3ca79e38p+508, 0x1.96d5c3ca79e38p+508, 0x1.96d5c3ca79e38p+508, 0x1.96d5c3ca79e38p+508,
+     -0x1.08eb6307cef78p+509, -0x1.08eb6307cef78p+509, -0x1.08eb6307cef78p+509, -0x1.08eb6307cef78p+509,
+     },
+   },
+ };
  
  #endif
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f16.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,20 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-require-effective-target riscv_v_ok } */
+ /* { dg-require-effective-target riscv_zvfh_ok } */
+ /* { dg-add-options "riscv_v" } */
+ /* { dg-add-options "riscv_zvfh" } */
+ /* { dg-additional-options "--param=fpr2vr-cost=0" } */
+ 
+ #include "vf_binop.h"
+ #include "vf_binop_data.h"
+ 
+ #define T    _Float16
+ #define FUNC MAX_FUNC_0_WRAP(T)
+ #define NAME max
+ 
+ DEF_VF_BINOP_CASE_2_WRAP (T, FUNC, NAME)
+ 
+ #define TEST_DATA                        TEST_BINOP_DATA_WRAP(T, NAME)
+ #define TEST_RUN(T, NAME, out, in, f, n) RUN_VF_BINOP_CASE_2_WRAP(T, NAME, FUNC, out, in, f, n)
+ 
+ #include "vf_binop_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f32.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f32.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "--param=fpr2vr-cost=0" } */
+ 
+ #include "vf_binop.h"
+ #include "vf_binop_data.h"
+ 
+ #define T    float
+ #define FUNC MAX_FUNC_0_WRAP(T)
+ #define NAME max
+ 
+ DEF_VF_BINOP_CASE_2_WRAP (T, FUNC, NAME)
+ 
+ #define TEST_DATA                        TEST_BINOP_DATA_WRAP(T, NAME)
+ #define TEST_RUN(T, NAME, out, in, f, n) RUN_VF_BINOP_CASE_2_WRAP(T, NAME, FUNC, out, in, f, n)
+ 
+ #include "vf_binop_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f64.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vf_vfmax-run-1-f64.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "--param=fpr2vr-cost=0" } */
+ 
+ #include "vf_binop.h"
+ #include "vf_binop_data.h"
+ 
+ #define T    double
+ #define FUNC MAX_FUNC_0_WRAP(T)
+ #define NAME max
+ 
+ DEF_VF_BINOP_CASE_2_WRAP (T, FUNC, NAME)
+ 
+ #define TEST_DATA                        TEST_BINOP_DATA_WRAP(T, NAME)
+ #define TEST_RUN(T, NAME, out, in, f, n) RUN_VF_BINOP_CASE_2_WRAP(T, NAME, FUNC, out, in, f, n)
+ 
+ #include "vf_binop_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-times {vaadd.vx} 2 } } */
  /* { dg-final { scan-assembler-times {vmacc.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vnmsac.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmadd.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vnmsub.vx} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-times {vaadd.vx} 2 } } */
  /* { dg-final { scan-assembler-times {vmacc.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vnmsac.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmadd.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vnmsub.vx} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 28,30 ****
--- 28,32 ----
     } } } } */
  /* { dg-final { scan-assembler-times {vmacc.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vnmsac.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmadd.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vnmsub.vx} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-times {vaadd.vx} 2 } } */
  /* { dg-final { scan-assembler-times {vmacc.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vnmsac.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmadd.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vnmsub.vx} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-times {vaaddu.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmacc.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vnmsac.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmadd.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vnmsub.vx} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-times {vaaddu.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vmacc.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vnmsac.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmadd.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vnmsub.vx} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 27,29 ****
--- 27,31 ----
     } } } } } */
  /* { dg-final { scan-assembler-times {vmacc.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vnmsac.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmadd.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vnmsub.vx} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-times {vaaddu.vx} 2 } } */
  /* { dg-final { scan-assembler-times {vmacc.vx} 1 } } */
  /* { dg-final { scan-assembler-times {vnmsac.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vmadd.vx} 1 } } */
+ /* { dg-final { scan-assembler-times {vnmsub.vx} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-not {vaadd.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-not {vaadd.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-not {vaadd.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-not {vaadd.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-not {vaaddu.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-not {vaaddu.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-not {vaaddu.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-not {vaaddu.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-not {vaadd.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-not {vaadd.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-not {vaadd.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_SIGNED_0(T)
*** 25,27 ****
--- 25,29 ----
  /* { dg-final { scan-assembler-not {vaadd.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-not {vaaddu.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-not {vaaddu.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-not {vaaddu.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c	Sun Sep  7 22:34:08 2025
*************** TEST_TERNARY_VX_UNSIGNED_0(T)
*** 24,26 ****
--- 24,28 ----
  /* { dg-final { scan-assembler-not {vaaddu.vx} } } */
  /* { dg-final { scan-assembler-not {vmacc.vx} } } */
  /* { dg-final { scan-assembler-not {vnmsac.vx} } } */
+ /* { dg-final { scan-assembler-not {vmadd.vx} } } */
+ /* { dg-final { scan-assembler-not {vnmsub.vx} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary.h gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary.h
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary.h	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary.h	Sun Sep  7 22:34:08 2025
*************** typedef signed __int128 int128_t;
*** 12,23 ****
  #endif
  
  #define DEF_VX_TERNARY_CASE_0(T, OP_1, OP_2, NAME)                        \
! void                                                                      \
  test_vx_ternary_##NAME##_##T##_case_0 (T * restrict vd, T * restrict vs2, \
                                         T rs1, unsigned n)                 \
  {                                                                         \
!   for (unsigned i = 0; i < n; i++)                                        \
      vd[i] = vd[i] OP_2 vs2[i] OP_1 rs1;                                   \
  }
  #define DEF_VX_TERNARY_CASE_0_WRAP(T, OP_1, OP_2, NAME) \
    DEF_VX_TERNARY_CASE_0(T, OP_1, OP_2, NAME)
--- 12,27 ----
  #endif
  
  #define DEF_VX_TERNARY_CASE_0(T, OP_1, OP_2, NAME)                        \
! T                                                                         \
  test_vx_ternary_##NAME##_##T##_case_0 (T * restrict vd, T * restrict vs2, \
                                         T rs1, unsigned n)                 \
  {                                                                         \
!   unsigned i;                                                             \
!                                                                           \
!   for (i = 0; i < n; i++)                                                 \
      vd[i] = vd[i] OP_2 vs2[i] OP_1 rs1;                                   \
+                                                                           \
+   return vs2[i - 1];                                                      \
  }
  #define DEF_VX_TERNARY_CASE_0_WRAP(T, OP_1, OP_2, NAME) \
    DEF_VX_TERNARY_CASE_0(T, OP_1, OP_2, NAME)
*************** test_vx_ternary_##NAME##_##T##_case_0 (T
*** 26,37 ****
--- 30,60 ----
  #define RUN_VX_TERNARY_CASE_0_WRAP(T, NAME, vd, vs2, rs1, n) \
    RUN_VX_TERNARY_CASE_0(T, NAME, vd, vs2, rs1, n)
  
+ #define DEF_VX_TERNARY_CASE_1(T, OP_1, OP_2, NAME)                        \
+ void                                                                      \
+ test_vx_ternary_##NAME##_##T##_case_1 (T * restrict vd, T * restrict vs2, \
+                                        T rs1, unsigned n)                 \
+ {                                                                         \
+   for (unsigned i = 0; i < n; i++)                                        \
+     vd[i] = vs2[i] OP_2 rs1 OP_1 vd[i];                                   \
+ }
+ #define DEF_VX_TERNARY_CASE_1_WRAP(T, OP_1, OP_2, NAME) \
+   DEF_VX_TERNARY_CASE_1(T, OP_1, OP_2, NAME)
+ #define RUN_VX_TERNARY_CASE_1(T, NAME, vd, vs2, rs1, n) \
+   test_vx_ternary_##NAME##_##T##_case_1 (vd, vs2, rs1, n)
+ #define RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1(T, NAME, vd, vs2, rs1, n)
+ 
  #define TEST_TERNARY_VX_SIGNED_0(T)                                \
    DEF_VX_TERNARY_CASE_0_WRAP(T, *, +, macc)                        \
+   DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, madd)                        \
    DEF_VX_TERNARY_CASE_0_WRAP(T, *, -, nmsac)                       \
+   DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, nmsub)                       \
  
  #define TEST_TERNARY_VX_UNSIGNED_0(T)                              \
    DEF_VX_TERNARY_CASE_0_WRAP(T, *, +, macc)                        \
+   DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, madd)                        \
    DEF_VX_TERNARY_CASE_0_WRAP(T, *, -, nmsac)                       \
+   DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, nmsub)                       \
  
  #endif
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary_data.h gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary_data.h
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary_data.h	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_ternary_data.h	Sun Sep  7 22:34:08 2025
*************** uint64_t TEST_TERNARY_DATA(uint64_t, nms
*** 742,745 ****
--- 742,1481 ----
    },
  };
  
+ int8_t TEST_TERNARY_DATA(int8_t, madd)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+       -1, -1, -1, -1,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -1, -1, -1, -1,
+       -2, -2, -2, -2,
+     },
+     {
+        1,  1,  1,  1,
+        3,  3,  3,  3,
+       -1, -1, -1, -1,
+       -3, -3, -3, -3,
+     },
+   },
+   {
+     { 127 }, /* rs1 */
+     { /* vs2 */
+        127,  127,  127,  127,
+          2,    2,    2,    2,
+          0,    0,    0,    0,
+       -128, -128, -128, -128,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        9,  9,  9,  9,
+       -8, -8, -8, -8,
+       -2, -2, -2, -2,
+     },
+     {
+        127,  127,  127,  127,
+        121,  121,  121,  121,
+          8,    8,    8,    8,
+       -126, -126, -126, -126,
+     },
+   },
+ };
+ 
+ int16_t TEST_TERNARY_DATA(int16_t, madd)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+       -1, -1, -1, -1,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -1, -1, -1, -1,
+       -2, -2, -2, -2,
+     },
+     {
+        1,  1,  1,  1,
+        3,  3,  3,  3,
+       -1, -1, -1, -1,
+       -3, -3, -3, -3,
+     },
+   },
+   {
+     { 32767 }, /* rs1 */
+     { /* vs2 */
+        32767,  32767,  32767,  32767,
+            2,      2,      2,      2,
+            0,      0,      0,      0,
+       -32768, -32768, -32768, -32768,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        9,  9,  9,  9,
+       -8, -8, -8, -8,
+       -2, -2, -2, -2,
+     },
+     {
+        32767,  32767,  32767,  32767,
+        32761,  32761,  32761,  32761,
+            8,      8,      8,      8,
+       -32766, -32766, -32766, -32766,
+     },
+   },
+ };
+ 
+ int32_t TEST_TERNARY_DATA(int32_t, madd)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+       -1, -1, -1, -1,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -1, -1, -1, -1,
+       -2, -2, -2, -2,
+     },
+     {
+        1,  1,  1,  1,
+        3,  3,  3,  3,
+       -1, -1, -1, -1,
+       -3, -3, -3, -3,
+     },
+   },
+   {
+     { 2147483647 }, /* rs1 */
+     { /* vs2 */
+        2147483647,  2147483647,  2147483647,  2147483647,
+                 2,           2,           2,           2,
+                 0,           0,           0,           0,
+       -2147483648, -2147483648, -2147483648, -2147483648,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        9,  9,  9,  9,
+       -8, -8, -8, -8,
+       -2, -2, -2, -2,
+     },
+     {
+        2147483647,  2147483647,  2147483647,  2147483647,
+        2147483641,  2147483641,  2147483641,  2147483641,
+                 8,           8,           8,           8,
+       -2147483646, -2147483646, -2147483646, -2147483646,
+     },
+   },
+ };
+ 
+ int64_t TEST_TERNARY_DATA(int64_t, madd)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+       -1, -1, -1, -1,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -1, -1, -1, -1,
+       -2, -2, -2, -2,
+     },
+     {
+        1,  1,  1,  1,
+        3,  3,  3,  3,
+       -1, -1, -1, -1,
+       -3, -3, -3, -3,
+     },
+   },
+   {
+     { 9223372036854775807ull }, /* rs1 */
+     { /* vs2 */
+        9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,
+                             2,                       2,                       2,                       2,
+                             0,                       0,                       0,                       0,
+       -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        9,  9,  9,  9,
+       -8, -8, -8, -8,
+       -2, -2, -2, -2,
+     },
+     {
+        9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,
+        9223372036854775801ull,  9223372036854775801ull,  9223372036854775801ull,  9223372036854775801ull,
+                             8,                       8,                       8,                       8,
+       -9223372036854775806ull, -9223372036854775806ull, -9223372036854775806ull, -9223372036854775806ull,
+     },
+   },
+ };
+ 
+ uint8_t TEST_TERNARY_DATA(uint8_t, madd)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+        4,  4,  4,  4,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        6,  6,  6,  6,
+        3,  3,  3,  3,
+     },
+     {
+        1,  1,  1,  1,
+        3,  3,  3,  3,
+        6,  6,  6,  6,
+        7,  7,  7,  7,
+     },
+   },
+   {
+     { 255 }, /* rs1 */
+     { /* vs2 */
+        127,  127,  127,  127,
+        255,  255,  255,  255,
+          0,    0,    0,    0,
+        128,  128,  128,  128,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        5,  5,  5,  5,
+        3,  3,  3,  3,
+        1,  1,  1,  1,
+     },
+     {
+        127,  127,  127,  127,
+        250,  250,  250,  250,
+        253,  253,  253,  253,
+        127,  127,  127,  127,
+     },
+   },
+ };
+ 
+ uint16_t TEST_TERNARY_DATA(uint16_t, madd)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+        4,  4,  4,  4,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        6,  6,  6,  6,
+        3,  3,  3,  3,
+     },
+     {
+        1,  1,  1,  1,
+        3,  3,  3,  3,
+        6,  6,  6,  6,
+        7,  7,  7,  7,
+     },
+   },
+   {
+     { 65535 }, /* rs1 */
+     { /* vs2 */
+        32767,  32767,  32767,  32767,
+        65535,  65535,  65535,  65535,
+            0,      0,      0,      0,
+        32768,  32768,  32768,  32768,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        5,  5,  5,  5,
+        3,  3,  3,  3,
+        1,  1,  1,  1,
+     },
+     {
+        32767,  32767,  32767,  32767,
+        65530,  65530,  65530,  65530,
+        65533,  65533,  65533,  65533,
+        32767,  32767,  32767,  32767,
+     },
+   },
+ };
+ 
+ uint32_t TEST_TERNARY_DATA(uint32_t, madd)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+        4,  4,  4,  4,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        6,  6,  6,  6,
+        3,  3,  3,  3,
+     },
+     {
+        1,  1,  1,  1,
+        3,  3,  3,  3,
+        6,  6,  6,  6,
+        7,  7,  7,  7,
+     },
+   },
+   {
+     { 4294967295 }, /* rs1 */
+     { /* vs2 */
+        2147483647,  2147483647,  2147483647,  2147483647,
+        4294967295,  4294967295,  4294967295,  4294967295,
+                 0,           0,           0,           0,
+        2147483648,  2147483648,  2147483648,  2147483648,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        5,  5,  5,  5,
+        3,  3,  3,  3,
+        1,  1,  1,  1,
+     },
+     {
+        2147483647,  2147483647,  2147483647,  2147483647,
+        4294967290,  4294967290,  4294967290,  4294967290,
+        4294967293,  4294967293,  4294967293,  4294967293,
+        2147483647,  2147483647,  2147483647,  2147483647,
+     },
+   },
+ };
+ 
+ uint64_t TEST_TERNARY_DATA(uint64_t, madd)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+        4,  4,  4,  4,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        6,  6,  6,  6,
+        3,  3,  3,  3,
+     },
+     {
+        1,  1,  1,  1,
+        3,  3,  3,  3,
+        6,  6,  6,  6,
+        7,  7,  7,  7,
+     },
+   },
+   {
+     { 18446744073709551615ull }, /* rs1 */
+     { /* vs2 */
+        9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,
+       18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull, 18446744073709551615ull,
+                             0,                       0,                       0,                       0,
+        9223372036854775808ull,  9223372036854775808ull,  9223372036854775808ull,  9223372036854775808ull,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        5,  5,  5,  5,
+        3,  3,  3,  3,
+        1,  1,  1,  1,
+     },
+     {
+        9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,
+       18446744073709551610ull, 18446744073709551610ull, 18446744073709551610ull, 18446744073709551610ull,
+       18446744073709551613ull, 18446744073709551613ull, 18446744073709551613ull, 18446744073709551613ull,
+        9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,
+     },
+   },
+ };
+ 
+ int8_t TEST_TERNARY_DATA(int8_t, nmsub)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+       -1, -1, -1, -1,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -1, -1, -1, -1,
+       -2, -2, -2, -2,
+     },
+     {
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+     },
+   },
+   {
+     { 127 }, /* rs1 */
+     { /* vs2 */
+        127,  127,  127,  127,
+          2,    2,    2,    2,
+          0,    0,    0,    0,
+       -128, -128, -128, -128,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -8, -8, -8, -8,
+       -2, -2, -2, -2,
+     },
+     {
+        127,  127,  127,  127,
+       -125, -125, -125, -125,
+         -8,   -8,   -8,   -8,
+        126,  126,  126,  126,
+     },
+   },
+ };
+ 
+ int16_t TEST_TERNARY_DATA(int16_t, nmsub)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+       -1, -1, -1, -1,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -1, -1, -1, -1,
+       -2, -2, -2, -2,
+     },
+     {
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+     },
+   },
+   {
+     { 32767 }, /* rs1 */
+     { /* vs2 */
+        32767,  32767,  32767,  32767,
+            2,      2,      2,      2,
+            0,      0,      0,      0,
+       -32768, -32768, -32768, -32768,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -8, -8, -8, -8,
+       -2, -2, -2, -2,
+     },
+     {
+        32767,  32767,  32767,  32767,
+       -32765, -32765, -32765, -32765,
+           -8,     -8,     -8,     -8,
+        32766,  32766,  32766,  32766,
+     },
+   },
+ };
+ 
+ int32_t TEST_TERNARY_DATA(int32_t, nmsub)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+       -1, -1, -1, -1,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -1, -1, -1, -1,
+       -2, -2, -2, -2,
+     },
+     {
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+     },
+   },
+   {
+     { 2147483647 }, /* rs1 */
+     { /* vs2 */
+        2147483647,  2147483647,  2147483647,  2147483647,
+                 2,           2,           2,           2,
+                 0,           0,           0,           0,
+       -2147483648, -2147483648, -2147483648, -2147483648,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -8, -8, -8, -8,
+       -2, -2, -2, -2,
+     },
+     {
+        2147483647,  2147483647,  2147483647,  2147483647,
+       -2147483645, -2147483645, -2147483645, -2147483645,
+                -8,          -8,          -8,          -8,
+        2147483646,  2147483646,  2147483646,  2147483646,
+     },
+   },
+ };
+ 
+ int64_t TEST_TERNARY_DATA(int64_t, nmsub)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        0,  0,  0,  0,
+       -1, -1, -1, -1,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -1, -1, -1, -1,
+       -2, -2, -2, -2,
+     },
+     {
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+     },
+   },
+   {
+     { 9223372036854775807ull }, /* rs1 */
+     { /* vs2 */
+        9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,
+                             2,                       2,                       2,                       2,
+                             0,                       0,                       0,                       0,
+       -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull, -9223372036854775808ull,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+       -8, -8, -8, -8,
+       -2, -2, -2, -2,
+     },
+     {
+        9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,  9223372036854775807ull,
+       -9223372036854775805ull, -9223372036854775805ull, -9223372036854775805ull, -9223372036854775805ull,
+                            -8,                      -8,                      -8,                      -8,
+        9223372036854775806ull,  9223372036854775806ull,  9223372036854775806ull,  9223372036854775806ull,
+     },
+   },
+ };
+ 
+ uint8_t TEST_TERNARY_DATA(uint8_t, nmsub)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        8,  8,  8,  8,
+        7,  7,  7,  7,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+     },
+     {
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        7,  7,  7,  7,
+        5,  5,  5,  5,
+     },
+   },
+   {
+     { 128 }, /* rs1 */
+     { /* vs2 */
+        127,  127,  127,  127,
+        255,  255,  255,  255,
+        254,  254,  254,  254,
+        252,  252,  252,  252,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        8,  8,  8,  8,
+        2,  2,  2,  2,
+     },
+     {
+        127,  127,  127,  127,
+        127,  127,  127,  127,
+        254,  254,  254,  254,
+        252,  252,  252,  252,
+     },
+   },
+ };
+ 
+ uint16_t TEST_TERNARY_DATA(uint16_t, nmsub)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        8,  8,  8,  8,
+        7,  7,  7,  7,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+     },
+     {
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        7,  7,  7,  7,
+        5,  5,  5,  5,
+     },
+   },
+   {
+     { 32768 }, /* rs1 */
+     { /* vs2 */
+        32767,  32767,  32767,  32767,
+        65535,  65535,  65535,  65535,
+        65534,  65534,  65534,  65534,
+        65532,  65532,  65532,  65532,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        8,  8,  8,  8,
+        2,  2,  2,  2,
+     },
+     {
+        32767,  32767,  32767,  32767,
+        32767,  32767,  32767,  32767,
+        65534,  65534,  65534,  65534,
+        65532,  65532,  65532,  65532,
+     },
+   },
+ };
+ 
+ uint32_t TEST_TERNARY_DATA(uint32_t, nmsub)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        8,  8,  8,  8,
+        7,  7,  7,  7,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+     },
+     {
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        7,  7,  7,  7,
+        5,  5,  5,  5,
+     },
+   },
+   {
+     { 2147483648 }, /* rs1 */
+     { /* vs2 */
+        2147483647,  2147483647,  2147483647,  2147483647,
+        4294967295,  4294967295,  4294967295,  4294967295,
+        4294967294,  4294967294,  4294967294,  4294967294,
+        4294967292,  4294967292,  4294967292,  4294967292,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        8,  8,  8,  8,
+        2,  2,  2,  2,
+     },
+     {
+        2147483647,  2147483647,  2147483647,  2147483647,
+        2147483647,  2147483647,  2147483647,  2147483647,
+        4294967294,  4294967294,  4294967294,  4294967294,
+        4294967292,  4294967292,  4294967292,  4294967292,
+     },
+   },
+ };
+ 
+ uint64_t TEST_TERNARY_DATA(uint64_t, nmsub)[][4][N] =
+ {
+   {
+     { 1 }, /* rs1 */
+     { /* vs2 */
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+        8,  8,  8,  8,
+        7,  7,  7,  7,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        2,  2,  2,  2,
+     },
+     {
+        1,  1,  1,  1,
+        1,  1,  1,  1,
+        7,  7,  7,  7,
+        5,  5,  5,  5,
+     },
+   },
+   {
+     { 9223372036854775808ull }, /* rs1 */
+     { /* vs2 */
+         9223372036854775807ull,   9223372036854775807ull,   9223372036854775807ull,   9223372036854775807ull,
+        18446744073709551615ull,  18446744073709551615ull,  18446744073709551615ull,  18446744073709551615ull,
+        18446744073709551614ull,  18446744073709551614ull,  18446744073709551614ull,  18446744073709551614ull,
+        18446744073709551612ull,  18446744073709551612ull,  18446744073709551612ull,  18446744073709551612ull,
+     },
+     { /* vd */
+        0,  0,  0,  0,
+        1,  1,  1,  1,
+        8,  8,  8,  8,
+        2,  2,  2,  2,
+     },
+     {
+         9223372036854775807ull,   9223372036854775807ull,   9223372036854775807ull,   9223372036854775807ull,
+         9223372036854775807ull,   9223372036854775807ull,   9223372036854775807ull,   9223372036854775807ull,
+        18446744073709551614ull,  18446744073709551614ull,  18446744073709551614ull,  18446744073709551614ull,
+        18446744073709551612ull,  18446744073709551612ull,  18446744073709551612ull,  18446744073709551612ull,
+     },
+   },
+ };
+ 
  #endif
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i16.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          int16_t
+ #define NAME       madd
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i32.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i32.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          int32_t
+ #define NAME       madd
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i64.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i64.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          int64_t
+ #define NAME       madd
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-i8.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          int8_t
+ #define NAME       madd
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u16.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          uint16_t
+ #define NAME       madd
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u32.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u32.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          uint32_t
+ #define NAME       madd
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u64.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u64.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          uint64_t
+ #define NAME       madd
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vmadd-run-1-u8.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          uint8_t
+ #define NAME       madd
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, +, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i16.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          int16_t
+ #define NAME       nmsub
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i32.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i32.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          int32_t
+ #define NAME       nmsub
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i64.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i64.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          int64_t
+ #define NAME       nmsub
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-i8.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          int8_t
+ #define NAME       nmsub
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u16.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          uint16_t
+ #define NAME       nmsub
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u32.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u32.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u32.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u32.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          uint32_t
+ #define NAME       nmsub
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u64.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u64.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u64.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u64.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          uint64_t
+ #define NAME       nmsub
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vnmsub-run-1-u8.c	Sun Sep  7 22:34:08 2025
***************
*** 0 ****
--- 1,16 ----
+ /* { dg-do run { target { riscv_v } } } */
+ /* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+ 
+ #include "vx_ternary.h"
+ #include "vx_ternary_data.h"
+ 
+ #define T          uint8_t
+ #define NAME       nmsub
+ #define TEST_DATA  TEST_TERNARY_DATA_WRAP(T, NAME)
+ 
+ DEF_VX_TERNARY_CASE_1_WRAP(T, *, -, NAME)
+ 
+ #define TEST_RUN(T, NAME, vd, vs2, rs1, n) \
+   RUN_VX_TERNARY_CASE_1_WRAP(T, NAME, vd, vs2, rs1, n)
+ 
+ #include "vx_ternary_run.h"
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp	Sun Aug 31 22:33:00 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/rvv.exp	Sun Sep  7 22:34:08 2025
*************** dg-runtest [lsort [glob -nocomplain $src
*** 43,48 ****
--- 43,50 ----
  	"" $CFLAGS
  dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/xtheadvector/*.\[cS\]]] \
  	"" $CFLAGS
+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/xandesvector/*.\[cS\]]] \
+ 	"" $CFLAGS
  gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vsetvl/*.\[cS\]]] \
  	"" $CFLAGS
  dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/autovec/*.\[cS\]]] \
*************** foreach op $AUTOVEC_TEST_OPTS {
*** 149,153 ****
--- 151,165 ----
      "$op" ""
  }
  
+ set POLICY [list {policy} {non-policy} ]
+ set OVERLOAD [list {overloaded} {non-overloaded} ]
+ foreach po $POLICY {
+   foreach ov $OVERLOAD {
+     # For Andes Vector feature tests
+     dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/xandesvector/$po/$ov/*.\[cS\]]] \
+       "" $CFLAGS
+   }
+ }
+ 
  # All done.
  dg-finish
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dots.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dots.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dots.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dots.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,132 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2 (vint32mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32mf2(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1 (vint32m1_t vd, vint8m1_t vs1, vint8m1_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m1(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2 (vint32m2_t vd, vint8m2_t vs1, vint8m2_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m2(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4 (vint32m4_t vd, vint8m4_t vs1, vint8m4_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m4(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8 (vint32m8_t vd, vint8m8_t vs1, vint8m8_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m8(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1 (vint64m1_t vd, vint16m1_t vs1, vint16m1_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m1(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2 (vint64m2_t vd, vint16m2_t vs1, vint16m2_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m2(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4 (vint64m4_t vd, vint16m4_t vs1, vint16m4_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m4(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8 (vint64m8_t vd, vint16m8_t vs1, vint16m8_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m8(vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_m (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 			      vint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32mf2_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_m (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			     vint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m1_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_m (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			     vint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m2_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_m (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			     vint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m4_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_m (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			     vint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m8_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_m (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			     vint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m1_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_m (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			     vint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m2_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_m (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			     vint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m4_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_m (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			     vint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m8_m (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dots[ivxfswum.]*\s+} 18 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotsu.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotsu.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotsu.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotsu.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,132 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2 (vint32mf2_t vd, vint8mf2_t vs1, vuint8mf2_t vs2,
+ 			     size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32mf2(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1 (vint32m1_t vd, vint8m1_t vs1, vuint8m1_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m1(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2 (vint32m2_t vd, vint8m2_t vs1, vuint8m2_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m2(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4 (vint32m4_t vd, vint8m4_t vs1, vuint8m4_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m4(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8 (vint32m8_t vd, vint8m8_t vs1, vuint8m8_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m8(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1 (vint64m1_t vd, vint16m1_t vs1, vuint16m1_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m1(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2 (vint64m2_t vd, vint16m2_t vs1, vuint16m2_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m2(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4 (vint64m4_t vd, vint16m4_t vs1, vuint16m4_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m4(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8 (vint64m8_t vd, vint16m8_t vs1, vuint16m8_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m8(vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_m (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 			       vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32mf2_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_m (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			      vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m1_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_m (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			      vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m2_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_m (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			      vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m4_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_m (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			      vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m8_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_m (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			      vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m1_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_m (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			      vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m2_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_m (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			      vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m4_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_m (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			      vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m8_m (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dotsu[ivxfswum.]*\s+} 18 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotu.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotu.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotu.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotu.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,132 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2 (vuint32mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32mf2(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1 (vuint32m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m1(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2 (vuint32m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m2(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4 (vuint32m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m4(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8 (vuint32m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m8(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1 (vuint64m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m1(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2 (vuint64m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m2(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4 (vuint64m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m4(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8 (vuint64m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m8(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2_m (vbool64_t vm, vuint32mf2_t vd, vuint8mf2_t vs1,
+ 			      vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32mf2_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1_m (vbool32_t vm, vuint32m1_t vd, vuint8m1_t vs1,
+ 			     vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m1_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2_m (vbool16_t vm, vuint32m2_t vd, vuint8m2_t vs1,
+ 			     vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m2_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4_m (vbool8_t vm, vuint32m4_t vd, vuint8m4_t vs1,
+ 			     vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m4_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8_m (vbool4_t vm, vuint32m8_t vd, vuint8m8_t vs1,
+ 			     vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m8_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1_m (vbool64_t vm, vuint64m1_t vd, vuint16m1_t vs1,
+ 			     vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m1_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2_m (vbool32_t vm, vuint64m2_t vd, vuint16m2_t vs1,
+ 			     vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m2_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4_m (vbool16_t vm, vuint64m4_t vd, vuint16m4_t vs1,
+ 			     vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m4_m (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8_m (vbool8_t vm, vuint64m8_t vd, vuint16m8_t vs1,
+ 			     vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m8_m (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dotu[ivxfswum.]*\s+} 18 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,46 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
+ 
+ #include <andes_vector.h>
+ 
+ vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4(vfloat32mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16mf4(vs2, vl);
+ }
+ 
+ vbfloat16mf2_t test_nds_vfncvt_bf16_s_bf16mf2(vfloat32m1_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16mf2(vs2, vl);
+ }
+ 
+ vbfloat16m1_t test_nds_vfncvt_bf16_s_bf16m1(vfloat32m2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m1(vs2, vl);
+ }
+ 
+ vbfloat16m2_t test_nds_vfncvt_bf16_s_bf16m2(vfloat32m4_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m2(vs2, vl);
+ }
+ 
+ vbfloat16m4_t test_nds_vfncvt_bf16_s_bf16m4(vfloat32m8_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m4(vs2, vl);
+ }
+ 
+ vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4_rm(vfloat32mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16mf4_rm(vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16mf2_t test_nds_vfncvt_bf16_s_bf16mf2_rm(vfloat32m1_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16mf2_rm(vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m1_t test_nds_vfncvt_bf16_s_bf16m1_rm(vfloat32m2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m1_rm(vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m2_t test_nds_vfncvt_bf16_s_bf16m2_rm(vfloat32m4_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m2_rm(vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m4_t test_nds_vfncvt_bf16_s_bf16m4_rm(vfloat32m8_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m4_rm(vs2, __RISCV_FRM_RNE, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*a0,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vmv[1248]r\.v\s+[0-9v,]+\s+nds\.vfncvt\.bf16\.s[ivxfswum.]*\s+} 10 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadb.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadb.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadb.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadb.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,103 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_zvfh_xandesvpackfph -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_zvfh_xandesvpackfph -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4(vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4(op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2(vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2(op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1(vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1(op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2(vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2(op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4(vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4(op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8(vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8(op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm(vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm(vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm(vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm(vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm(vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm(vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_m(vbool64_t mask, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_m(vbool32_t mask, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_m(vbool16_t mask, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_m(vbool8_t mask, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_m(vbool4_t mask, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_m(vbool2_t mask, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ /* { dg-final { scan-assembler-times {nds\.vfpmadb\.vf\s+} 24 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadt.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadt.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadt.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadt.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,103 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_zvfh_xandesvpackfph -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_zvfh_xandesvpackfph -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4(vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4(op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2(vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2(op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1(vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1(op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2(vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2(op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4(vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4(op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8(vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8(op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_m(mask, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm(vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm(vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm(vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm(vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm(vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm(vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_rm(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_m(vbool64_t mask, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_m(vbool32_t mask, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_m(vbool16_t mask, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_m(vbool8_t mask, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_m(vbool4_t mask, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_m(vbool2_t mask, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_rm_m(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ /* { dg-final { scan-assembler-times {nds\.vfpmadt\.vf\s+} 24 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
+ 
+ #include <andes_vector.h>
+ 
+ vfloat32mf2_t test_nds_vfwcvt_s_bf16_f32mf2(vbfloat16mf4_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_bf16_f32mf2(vs2, vl);
+ }
+ 
+ vfloat32m1_t test_nds_vfwcvt_s_bf16_f32m1(vbfloat16mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_bf16_f32m1(vs2, vl);
+ }
+ 
+ vfloat32m2_t test_nds_vfwcvt_s_bf16_f32m2(vbfloat16m1_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_bf16_f32m2(vs2, vl);
+ }
+ 
+ vfloat32m4_t test_nds_vfwcvt_s_bf16_f32m4(vbfloat16m2_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_bf16_f32m4(vs2, vl);
+ }
+ 
+ vfloat32m8_t test_nds_vfwcvt_s_bf16_f32m8(vbfloat16m4_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_bf16_f32m8(vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*a0,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vmv[1248]r\.v\s+[0-9v,]+\s+nds\.vfwcvt\.s\.bf16[ivxfswum.]*\s+} 5 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vln8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vln8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vln8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vln8.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,62 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvsintload -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvsintload -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint8mf8_t test_vln8_v_i8mf8(const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf8(rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4(const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf4(rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2(const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf2(rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1(const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m1(rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2(const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m2(rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4(const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m4(rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8(const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m8(rs1, vl);
+ }
+ 
+ vint8mf8_t test_vln8_v_i8mf8_m(vbool64_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf8_m(vm, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_m(vbool32_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf4_m(vm, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_m(vbool16_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf2_m(vm, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_m(vbool8_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m1_m(vm, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_m(vbool4_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m2_m(vm, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_m(vbool2_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m4_m(vm, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_m(vbool1_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m8_m(vm, rs1, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vln8\.v\s+} 14 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dots.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dots.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dots.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dots.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,132 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2 (vint32mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dots(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1 (vint32m1_t vd, vint8m1_t vs1, vint8m1_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2 (vint32m2_t vd, vint8m2_t vs1, vint8m2_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4 (vint32m4_t vd, vint8m4_t vs1, vint8m4_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8 (vint32m8_t vd, vint8m8_t vs1, vint8m8_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1 (vint64m1_t vd, vint16m1_t vs1, vint16m1_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2 (vint64m2_t vd, vint16m2_t vs1, vint16m2_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4 (vint64m4_t vd, vint16m4_t vs1, vint16m4_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8 (vint64m8_t vd, vint16m8_t vs1, vint16m8_t vs2,
+ 			   size_t vl)
+ {
+   return __riscv_nds_vd4dots(vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_m (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 			      vint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_m (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			     vint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_m (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			     vint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_m (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			     vint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_m (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			     vint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_m (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			     vint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_m (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			     vint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_m (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			     vint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_m (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			     vint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dots[ivxfswum.]*\s+} 18 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotsu.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotsu.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotsu.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotsu.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,132 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2 (vint32mf2_t vd, vint8mf2_t vs1, vuint8mf2_t vs2,
+ 			     size_t vl)
+ {
+   return __riscv_nds_vd4dotsu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1 (vint32m1_t vd, vint8m1_t vs1, vuint8m1_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2 (vint32m2_t vd, vint8m2_t vs1, vuint8m2_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4 (vint32m4_t vd, vint8m4_t vs1, vuint8m4_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8 (vint32m8_t vd, vint8m8_t vs1, vuint8m8_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1 (vint64m1_t vd, vint16m1_t vs1, vuint16m1_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2 (vint64m2_t vd, vint16m2_t vs1, vuint16m2_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4 (vint64m4_t vd, vint16m4_t vs1, vuint16m4_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8 (vint64m8_t vd, vint16m8_t vs1, vuint16m8_t vs2,
+ 			    size_t vl)
+ {
+   return __riscv_nds_vd4dotsu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_m (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 			       vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_m (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			      vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_m (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			      vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_m (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			      vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_m (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			      vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_m (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			      vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_m (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			      vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_m (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			      vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_m (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			      vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dotsu[ivxfswum.]*\s+} 18 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotu.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotu.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotu.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotu.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,132 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vuint32mf2_t
+ test_vd4dotu_vv_u32mf2 (vuint32mf2_t vd, vuint8mf2_t vs1, vuint8mf2_t vs2,
+ 			size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_vd4dotu_vv_u32m1 (vuint32m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2,
+ 		       size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_vd4dotu_vv_u32m2 (vuint32m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2,
+ 		       size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_vd4dotu_vv_u32m4 (vuint32m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2,
+ 		       size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_vd4dotu_vv_u32m8 (vuint32m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2,
+ 		       size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_vd4dotu_vv_u64m1 (vuint64m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2,
+ 		       size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_vd4dotu_vv_u64m2 (vuint64m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2,
+ 		       size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_vd4dotu_vv_u64m4 (vuint64m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2,
+ 		       size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_vd4dotu_vv_u64m8 (vuint64m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2,
+ 		       size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vd, vs1, vs2, vl);
+ }
+ 
+ vuint32mf2_t
+ test_vd4dotu_vv_u32mf2_m (vbool64_t vm, vuint32mf2_t vd, vuint8mf2_t vs1,
+ 			  vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_vd4dotu_vv_u32m1_m (vbool32_t vm, vuint32m1_t vd, vuint8m1_t vs1,
+ 			 vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_vd4dotu_vv_u32m2_m (vbool16_t vm, vuint32m2_t vd, vuint8m2_t vs1,
+ 			 vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_vd4dotu_vv_u32m4_m (vbool8_t vm, vuint32m4_t vd, vuint8m4_t vs1,
+ 			 vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_vd4dotu_vv_u32m8_m (vbool4_t vm, vuint32m8_t vd, vuint8m8_t vs1,
+ 			 vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_vd4dotu_vv_u64m1_m (vbool64_t vm, vuint64m1_t vd, vuint16m1_t vs1,
+ 			 vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_vd4dotu_vv_u64m2_m (vbool32_t vm, vuint64m2_t vd, vuint16m2_t vs1,
+ 			 vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_vd4dotu_vv_u64m4_m (vbool16_t vm, vuint64m4_t vd, vuint16m4_t vs1,
+ 			 vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_vd4dotu_vv_u64m8_m (vbool8_t vm, vuint64m8_t vd, vuint16m8_t vs1,
+ 			 vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dotu[ivxfswum.]*\s+} 18 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,46 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
+ 
+ #include <andes_vector.h>
+ 
+ vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4(vfloat32mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, vl);
+ }
+ 
+ vbfloat16mf2_t test_nds_vfncvt_bf16_s_bf16mf2(vfloat32m1_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, vl);
+ }
+ 
+ vbfloat16m1_t test_nds_vfncvt_bf16_s_bf16m1(vfloat32m2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, vl);
+ }
+ 
+ vbfloat16m2_t test_nds_vfncvt_bf16_s_bf16m2(vfloat32m4_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, vl);
+ }
+ 
+ vbfloat16m4_t test_nds_vfncvt_bf16_s_bf16m4(vfloat32m8_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, vl);
+ }
+ 
+ vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4_rm(vfloat32mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16mf2_t test_nds_vfncvt_bf16_s_bf16mf2_rm(vfloat32m1_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m1_t test_nds_vfncvt_bf16_s_bf16m1_rm(vfloat32m2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m2_t test_nds_vfncvt_bf16_s_bf16m2_rm(vfloat32m4_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m4_t test_nds_vfncvt_bf16_s_bf16m4_rm(vfloat32m8_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16(vs2, __RISCV_FRM_RNE, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*a0,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vmv[1248]r\.v\s+[0-9v,]+\s+nds\.vfncvt\.bf16\.s[ivxfswum.]*\s+} 10 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadb.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadb.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadb.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadb.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,103 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_zvfh_xandesvpackfph -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_zvfh_xandesvpackfph -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4(vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2(vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1(vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2(vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4(vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8(vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm(vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm(vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm(vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm(vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm(vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm(vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_m(vbool64_t mask, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_m(vbool32_t mask, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_m(vbool16_t mask, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_m(vbool8_t mask, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_m(vbool4_t mask, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_m(vbool2_t mask, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ /* { dg-final { scan-assembler-times {nds\.vfpmadb\.vf\s+} 24 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadt.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadt.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadt.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadt.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,103 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_zvfh_xandesvpackfph -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_zvfh_xandesvpackfph -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4(vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2(vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1(vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2(vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4(vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8(vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_m(vbool32_t mask, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_m(vbool16_t mask, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_m(vbool8_t mask, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_m(vbool4_t mask, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_m(vbool2_t mask, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm(vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm(vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm(vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm(vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm(vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm(vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_m(vbool64_t mask, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_m(vbool32_t mask, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_m(vbool16_t mask, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_m(vbool8_t mask, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_m(vbool4_t mask, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_m(vbool2_t mask, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt(mask, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ /* { dg-final { scan-assembler-times {nds\.vfpmadt\.vf\s+} 24 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
+ 
+ #include <andes_vector.h>
+ 
+ vfloat32mf2_t test_nds_vfwcvt_s_bf16_f32mf2(vbfloat16mf4_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s(vs2, vl);
+ }
+ 
+ vfloat32m1_t test_nds_vfwcvt_s_bf16_f32m1(vbfloat16mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s(vs2, vl);
+ }
+ 
+ vfloat32m2_t test_nds_vfwcvt_s_bf16_f32m2(vbfloat16m1_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s(vs2, vl);
+ }
+ 
+ vfloat32m4_t test_nds_vfwcvt_s_bf16_f32m4(vbfloat16m2_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s(vs2, vl);
+ }
+ 
+ vfloat32m8_t test_nds_vfwcvt_s_bf16_f32m8(vbfloat16m4_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s(vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*a0,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+vmv[1248]r\.v\s+[0-9v,]+\s+nds\.vfwcvt\.s\.bf16[ivxfswum.]*\s+} 5 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vln8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vln8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vln8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vln8.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,34 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvsintload -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvsintload -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint8mf8_t test_vln8_v_i8mf8_m(vbool64_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8(vm, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_m(vbool32_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8(vm, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_m(vbool16_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8(vm, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_m(vbool8_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8(vm, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_m(vbool4_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8(vm, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_m(vbool2_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8(vm, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_m(vbool1_t vm, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8(vm, rs1, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vln8\.v\s+} 7 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dots.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dots.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dots.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dots.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,258 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_tu (vint32mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32mf2_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_tu (vint32m1_t vd, vint8m1_t vs1, vint8m1_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m1_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_tu (vint32m2_t vd, vint8m2_t vs1, vint8m2_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m2_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_tu (vint32m4_t vd, vint8m4_t vs1, vint8m4_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m4_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_tu (vint32m8_t vd, vint8m8_t vs1, vint8m8_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m8_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_tu (vint64m1_t vd, vint16m1_t vs1, vint16m1_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m1_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_tu (vint64m2_t vd, vint16m2_t vs1, vint16m2_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m2_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_tu (vint64m4_t vd, vint16m4_t vs1, vint16m4_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m4_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_tu (vint64m8_t vd, vint16m8_t vs1, vint16m8_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m8_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_tum (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				vint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32mf2_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_tum (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			       vint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m1_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_tum (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			       vint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m2_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_tum (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			       vint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m4_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_tum (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			       vint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m8_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_tum (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			       vint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m1_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_tum (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			       vint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m2_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_tum (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			       vint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m4_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_tum (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			       vint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m8_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_tumu (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				 vint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32mf2_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_tumu (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 				vint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m1_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_tumu (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 				vint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m2_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_tumu (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 				vint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m4_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_tumu (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 				vint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m8_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_tumu (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 				vint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m1_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_tumu (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 				vint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m2_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_tumu (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 				vint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m4_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_tumu (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 				vint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m8_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_mu (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 			       vint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32mf2_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_mu (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			      vint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m1_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_mu (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			      vint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m2_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_mu (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			      vint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m4_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_mu (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			      vint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i32m8_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_mu (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			      vint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m1_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_mu (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			      vint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m2_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_mu (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			      vint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m4_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_mu (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			      vint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_vv_i64m8_mu (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dots[ivxfswum.]*\s+} 36 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotsu.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotsu.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotsu.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotsu.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,258 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_tu (vint32mf2_t vd, vint8mf2_t vs1, vuint8mf2_t vs2,
+ 				size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32mf2_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_tu (vint32m1_t vd, vint8m1_t vs1, vuint8m1_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m1_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_tu (vint32m2_t vd, vint8m2_t vs1, vuint8m2_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m2_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_tu (vint32m4_t vd, vint8m4_t vs1, vuint8m4_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m4_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_tu (vint32m8_t vd, vint8m8_t vs1, vuint8m8_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m8_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_tu (vint64m1_t vd, vint16m1_t vs1, vuint16m1_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m1_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_tu (vint64m2_t vd, vint16m2_t vs1, vuint16m2_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m2_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_tu (vint64m4_t vd, vint16m4_t vs1, vuint16m4_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m4_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_tu (vint64m8_t vd, vint16m8_t vs1, vuint16m8_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m8_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_tum (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				 vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32mf2_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_tum (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 				vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m1_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_tum (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 				vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m2_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_tum (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 				vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m4_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_tum (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 				vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m8_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_tum (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 				vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m1_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_tum (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 				vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m2_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_tum (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 				vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m4_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_tum (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 				vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m8_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_tumu (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				  vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32mf2_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_tumu (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 				 vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m1_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_tumu (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 				 vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m2_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_tumu (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 				 vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m4_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_tumu (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 				 vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m8_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_tumu (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 				 vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m1_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_tumu (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 				 vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m2_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_tumu (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 				 vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m4_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_tumu (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 				 vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m8_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_mu (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32mf2_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_mu (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			       vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m1_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_mu (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			       vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m2_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_mu (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			       vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m4_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_mu (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			       vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i32m8_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_mu (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			       vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m1_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_mu (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			       vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m2_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_mu (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			       vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m4_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_mu (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			       vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_vv_i64m8_mu (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dotsu[ivxfswum.]*\s+} 36 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotu.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotu.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotu.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotu.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,258 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2_tu (vuint32mf2_t vd, vuint8mf2_t vs1,
+ 			       vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32mf2_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1_tu (vuint32m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m1_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2_tu (vuint32m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m2_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4_tu (vuint32m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m4_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8_tu (vuint32m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m8_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1_tu (vuint64m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m1_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2_tu (vuint64m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m2_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4_tu (vuint64m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m4_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8_tu (vuint64m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m8_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2_tum (vbool64_t vm, vuint32mf2_t vd, vuint8mf2_t vs1,
+ 				vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32mf2_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1_tum (vbool32_t vm, vuint32m1_t vd, vuint8m1_t vs1,
+ 			       vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m1_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2_tum (vbool16_t vm, vuint32m2_t vd, vuint8m2_t vs1,
+ 			       vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m2_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4_tum (vbool8_t vm, vuint32m4_t vd, vuint8m4_t vs1,
+ 			       vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m4_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8_tum (vbool4_t vm, vuint32m8_t vd, vuint8m8_t vs1,
+ 			       vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m8_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1_tum (vbool64_t vm, vuint64m1_t vd, vuint16m1_t vs1,
+ 			       vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m1_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2_tum (vbool32_t vm, vuint64m2_t vd, vuint16m2_t vs1,
+ 			       vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m2_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4_tum (vbool16_t vm, vuint64m4_t vd, vuint16m4_t vs1,
+ 			       vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m4_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8_tum (vbool8_t vm, vuint64m8_t vd, vuint16m8_t vs1,
+ 			       vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m8_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2_tumu (vbool64_t vm, vuint32mf2_t vd, vuint8mf2_t vs1,
+ 				 vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32mf2_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1_tumu (vbool32_t vm, vuint32m1_t vd, vuint8m1_t vs1,
+ 				vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m1_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2_tumu (vbool16_t vm, vuint32m2_t vd, vuint8m2_t vs1,
+ 				vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m2_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4_tumu (vbool8_t vm, vuint32m4_t vd, vuint8m4_t vs1,
+ 				vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m4_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8_tumu (vbool4_t vm, vuint32m8_t vd, vuint8m8_t vs1,
+ 				vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m8_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1_tumu (vbool64_t vm, vuint64m1_t vd, vuint16m1_t vs1,
+ 				vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m1_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2_tumu (vbool32_t vm, vuint64m2_t vd, vuint16m2_t vs1,
+ 				vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m2_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4_tumu (vbool16_t vm, vuint64m4_t vd, vuint16m4_t vs1,
+ 				vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m4_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8_tumu (vbool8_t vm, vuint64m8_t vd, vuint16m8_t vs1,
+ 				vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m8_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2_mu (vbool64_t vm, vuint32mf2_t vd, vuint8mf2_t vs1,
+ 			       vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32mf2_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1_mu (vbool32_t vm, vuint32m1_t vd, vuint8m1_t vs1,
+ 			      vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m1_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2_mu (vbool16_t vm, vuint32m2_t vd, vuint8m2_t vs1,
+ 			      vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m2_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4_mu (vbool8_t vm, vuint32m4_t vd, vuint8m4_t vs1,
+ 			      vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m4_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8_mu (vbool4_t vm, vuint32m8_t vd, vuint8m8_t vs1,
+ 			      vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u32m8_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1_mu (vbool64_t vm, vuint64m1_t vd, vuint16m1_t vs1,
+ 			      vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m1_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2_mu (vbool32_t vm, vuint64m2_t vd, vuint16m2_t vs1,
+ 			      vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m2_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4_mu (vbool16_t vm, vuint64m4_t vd, vuint16m4_t vs1,
+ 			      vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m4_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8_mu (vbool8_t vm, vuint64m8_t vd, vuint16m8_t vs1,
+ 			      vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_vv_u64m8_mu (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dotu[ivxfswum.]*\s+} 36 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,46 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
+ 
+ #include <andes_vector.h>
+ 
+ vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4_tu(vbfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16mf4_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16mf2_t test_nds_vfncvt_bf16_s_bf16mf2_tu(vbfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16mf2_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16m1_t test_nds_vfncvt_bf16_s_bf16m1_tu(vbfloat16m1_t vd, vfloat32m2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m1_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16m2_t test_nds_vfncvt_bf16_s_bf16m2_tu(vbfloat16m2_t vd, vfloat32m4_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m2_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16m4_t test_nds_vfncvt_bf16_s_bf16m4_tu(vbfloat16m4_t vd, vfloat32m8_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m4_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4_rm_tu(vbfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16mf4_rm_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16mf2_t test_nds_vfncvt_bf16_s_bf16mf2_rm_tu(vbfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16mf2_rm_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m1_t test_nds_vfncvt_bf16_s_bf16m1_rm_tu(vbfloat16m1_t vd, vfloat32m2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m1_rm_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m2_t test_nds_vfncvt_bf16_s_bf16m2_rm_tu(vbfloat16m2_t vd, vfloat32m4_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m2_rm_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m4_t test_nds_vfncvt_bf16_s_bf16m4_rm_tu(vbfloat16m4_t vd, vfloat32m8_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_s_bf16m4_rm_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*a0,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vfncvt\.bf16\.s[ivxfswum.]*\s+} 10 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadb.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadb.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadb.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadb.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,199 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_zvfh_xandesvpackfph -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_zvfh_xandesvpackfph -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf4_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16mf2_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m1_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m2_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m4_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_vf_f16m8_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vfpmadb\.vf\s+} 48 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadt.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadt.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadt.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadt.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,199 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_zvfh_xandesvpackfph -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_zvfh_xandesvpackfph -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_rm_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_rm_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_rm_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf4_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16mf2_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m1_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m2_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m4_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_vf_f16m8_rm_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vfpmadt\.vf\s+} 48 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
+ 
+ #include <andes_vector.h>
+ 
+ vfloat32mf2_t test_nds_vfwcvt_s_bf16_f32mf2_tu(vfloat32mf2_t vd, vbfloat16mf4_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ 
+ vfloat32m1_t test_nds_vfwcvt_s_bf16_f32m1_tu(vfloat32m1_t vd, vbfloat16mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ 
+ vfloat32m2_t test_nds_vfwcvt_s_bf16_f32m2_tu(vfloat32m2_t vd, vbfloat16m1_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ 
+ vfloat32m4_t test_nds_vfwcvt_s_bf16_f32m4_tu(vfloat32m4_t vd, vbfloat16m2_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ 
+ vfloat32m8_t test_nds_vfwcvt_s_bf16_f32m8_tu(vfloat32m8_t vd, vbfloat16m4_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*a0,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vfwcvt\.s\.bf16[ivxfswum.]*\s+} 5 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vln8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vln8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vln8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vln8.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,118 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvsintload -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvsintload -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint8mf8_t test_vln8_v_i8mf8_tu(vint8mf8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf8_tu(vd, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_tu(vint8mf4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf4_tu(vd, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_tu(vint8mf2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf2_tu(vd, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_tu(vint8m1_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m1_tu(vd, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_tu(vint8m2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m2_tu(vd, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_tu(vint8m4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m4_tu(vd, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_tu(vint8m8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m8_tu(vd, rs1, vl);
+ }
+ 
+ vint8mf8_t test_vln8_v_i8mf8_tum(vbool64_t vm, vint8mf8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf8_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_tum(vbool32_t vm, vint8mf4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf4_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_tum(vbool16_t vm, vint8mf2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf2_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_tum(vbool8_t vm, vint8m1_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m1_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_tum(vbool4_t vm, vint8m2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m2_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_tum(vbool2_t vm, vint8m4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m4_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_tum(vbool1_t vm, vint8m8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m8_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf8_t test_vln8_v_i8mf8_tumu(vbool64_t vm, vint8mf8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf8_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_tumu(vbool32_t vm, vint8mf4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf4_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_tumu(vbool16_t vm, vint8mf2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf2_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_tumu(vbool8_t vm, vint8m1_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m1_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_tumu(vbool4_t vm, vint8m2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m2_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_tumu(vbool2_t vm, vint8m4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m4_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_tumu(vbool1_t vm, vint8m8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m8_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf8_t test_vln8_v_i8mf8_mu(vbool64_t vm, vint8mf8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf8_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_mu(vbool32_t vm, vint8mf4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf4_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_mu(vbool16_t vm, vint8mf2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8mf2_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_mu(vbool8_t vm, vint8m1_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m1_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_mu(vbool4_t vm, vint8m2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m2_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_mu(vbool2_t vm, vint8m4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m4_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_mu(vbool1_t vm, vint8m8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_v_i8m8_mu(vm, vd, rs1, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vln8\.v\s+} 28 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dots.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dots.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dots.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dots.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,258 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_tu (vint32mf2_t vd, vint8mf2_t vs1, vint8mf2_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dots_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_tu (vint32m1_t vd, vint8m1_t vs1, vint8m1_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_tu (vint32m2_t vd, vint8m2_t vs1, vint8m2_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_tu (vint32m4_t vd, vint8m4_t vs1, vint8m4_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_tu (vint32m8_t vd, vint8m8_t vs1, vint8m8_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_tu (vint64m1_t vd, vint16m1_t vs1, vint16m1_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_tu (vint64m2_t vd, vint16m2_t vs1, vint16m2_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_tu (vint64m4_t vd, vint16m4_t vs1, vint16m4_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_tu (vint64m8_t vd, vint16m8_t vs1, vint16m8_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dots_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_tum (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				vint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_tum (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			       vint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_tum (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			       vint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_tum (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			       vint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_tum (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			       vint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_tum (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			       vint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_tum (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			       vint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_tum (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			       vint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_tum (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			       vint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_tumu (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				 vint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_tumu (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 				vint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_tumu (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 				vint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_tumu (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 				vint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_tumu (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 				vint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_tumu (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 				vint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_tumu (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 				vint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_tumu (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 				vint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_tumu (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 				vint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dots_vv_i32mf2_mu (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 			       vint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dots_vv_i32m1_mu (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			      vint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dots_vv_i32m2_mu (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			      vint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dots_vv_i32m4_mu (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			      vint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dots_vv_i32m8_mu (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			      vint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dots_vv_i64m1_mu (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			      vint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dots_vv_i64m2_mu (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			      vint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dots_vv_i64m4_mu (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			      vint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dots_vv_i64m8_mu (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			      vint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dots_mu (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dots[ivxfswum.]*\s+} 36 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotsu.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotsu.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotsu.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotsu.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,258 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_tu (vint32mf2_t vd, vint8mf2_t vs1, vuint8mf2_t vs2,
+ 				size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_tu (vint32m1_t vd, vint8m1_t vs1, vuint8m1_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_tu (vint32m2_t vd, vint8m2_t vs1, vuint8m2_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_tu (vint32m4_t vd, vint8m4_t vs1, vuint8m4_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_tu (vint32m8_t vd, vint8m8_t vs1, vuint8m8_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_tu (vint64m1_t vd, vint16m1_t vs1, vuint16m1_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_tu (vint64m2_t vd, vint16m2_t vs1, vuint16m2_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_tu (vint64m4_t vd, vint16m4_t vs1, vuint16m4_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_tu (vint64m8_t vd, vint16m8_t vs1, vuint16m8_t vs2,
+ 			       size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_tum (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				 vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_tum (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 				vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_tum (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 				vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_tum (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 				vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_tum (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 				vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_tum (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 				vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_tum (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 				vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_tum (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 				vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_tum (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 				vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_tumu (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				  vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_tumu (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 				 vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_tumu (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 				 vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_tumu (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 				 vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_tumu (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 				 vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_tumu (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 				 vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_tumu (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 				 vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_tumu (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 				 vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_tumu (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 				 vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32mf2_t
+ test_nds_vd4dotsu_vv_i32mf2_mu (vbool64_t vm, vint32mf2_t vd, vint8mf2_t vs1,
+ 				vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m1_t
+ test_nds_vd4dotsu_vv_i32m1_mu (vbool32_t vm, vint32m1_t vd, vint8m1_t vs1,
+ 			       vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m2_t
+ test_nds_vd4dotsu_vv_i32m2_mu (vbool16_t vm, vint32m2_t vd, vint8m2_t vs1,
+ 			       vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m4_t
+ test_nds_vd4dotsu_vv_i32m4_mu (vbool8_t vm, vint32m4_t vd, vint8m4_t vs1,
+ 			       vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint32m8_t
+ test_nds_vd4dotsu_vv_i32m8_mu (vbool4_t vm, vint32m8_t vd, vint8m8_t vs1,
+ 			       vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m1_t
+ test_nds_vd4dotsu_vv_i64m1_mu (vbool64_t vm, vint64m1_t vd, vint16m1_t vs1,
+ 			       vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m2_t
+ test_nds_vd4dotsu_vv_i64m2_mu (vbool32_t vm, vint64m2_t vd, vint16m2_t vs1,
+ 			       vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m4_t
+ test_nds_vd4dotsu_vv_i64m4_mu (vbool16_t vm, vint64m4_t vd, vint16m4_t vs1,
+ 			       vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vint64m8_t
+ test_nds_vd4dotsu_vv_i64m8_mu (vbool8_t vm, vint64m8_t vd, vint16m8_t vs1,
+ 			       vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotsu_mu (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dotsu[ivxfswum.]*\s+} 36 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotu.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotu.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotu.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotu.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,258 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvdot -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvdot -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2_tu (vuint32mf2_t vd, vuint8mf2_t vs1,
+ 			       vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1_tu (vuint32m1_t vd, vuint8m1_t vs1, vuint8m1_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2_tu (vuint32m2_t vd, vuint8m2_t vs1, vuint8m2_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4_tu (vuint32m4_t vd, vuint8m4_t vs1, vuint8m4_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8_tu (vuint32m8_t vd, vuint8m8_t vs1, vuint8m8_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1_tu (vuint64m1_t vd, vuint16m1_t vs1, vuint16m1_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2_tu (vuint64m2_t vd, vuint16m2_t vs1, vuint16m2_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4_tu (vuint64m4_t vd, vuint16m4_t vs1, vuint16m4_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8_tu (vuint64m8_t vd, vuint16m8_t vs1, vuint16m8_t vs2,
+ 			      size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tu(vd, vs1, vs2, vl);
+ }
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2_tum (vbool64_t vm, vuint32mf2_t vd, vuint8mf2_t vs1,
+ 				vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1_tum (vbool32_t vm, vuint32m1_t vd, vuint8m1_t vs1,
+ 			       vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2_tum (vbool16_t vm, vuint32m2_t vd, vuint8m2_t vs1,
+ 			       vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4_tum (vbool8_t vm, vuint32m4_t vd, vuint8m4_t vs1,
+ 			       vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8_tum (vbool4_t vm, vuint32m8_t vd, vuint8m8_t vs1,
+ 			       vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1_tum (vbool64_t vm, vuint64m1_t vd, vuint16m1_t vs1,
+ 			       vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2_tum (vbool32_t vm, vuint64m2_t vd, vuint16m2_t vs1,
+ 			       vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4_tum (vbool16_t vm, vuint64m4_t vd, vuint16m4_t vs1,
+ 			       vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8_tum (vbool8_t vm, vuint64m8_t vd, vuint16m8_t vs1,
+ 			       vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tum (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2_tumu (vbool64_t vm, vuint32mf2_t vd, vuint8mf2_t vs1,
+ 				 vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1_tumu (vbool32_t vm, vuint32m1_t vd, vuint8m1_t vs1,
+ 				vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2_tumu (vbool16_t vm, vuint32m2_t vd, vuint8m2_t vs1,
+ 				vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4_tumu (vbool8_t vm, vuint32m4_t vd, vuint8m4_t vs1,
+ 				vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8_tumu (vbool4_t vm, vuint32m8_t vd, vuint8m8_t vs1,
+ 				vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1_tumu (vbool64_t vm, vuint64m1_t vd, vuint16m1_t vs1,
+ 				vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2_tumu (vbool32_t vm, vuint64m2_t vd, vuint16m2_t vs1,
+ 				vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4_tumu (vbool16_t vm, vuint64m4_t vd, vuint16m4_t vs1,
+ 				vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8_tumu (vbool8_t vm, vuint64m8_t vd, vuint16m8_t vs1,
+ 				vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_tumu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32mf2_t
+ test_nds_vd4dotu_vv_u32mf2_mu (vbool64_t vm, vuint32mf2_t vd, vuint8mf2_t vs1,
+ 			       vuint8mf2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m1_t
+ test_nds_vd4dotu_vv_u32m1_mu (vbool32_t vm, vuint32m1_t vd, vuint8m1_t vs1,
+ 			      vuint8m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m2_t
+ test_nds_vd4dotu_vv_u32m2_mu (vbool16_t vm, vuint32m2_t vd, vuint8m2_t vs1,
+ 			      vuint8m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m4_t
+ test_nds_vd4dotu_vv_u32m4_mu (vbool8_t vm, vuint32m4_t vd, vuint8m4_t vs1,
+ 			      vuint8m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint32m8_t
+ test_nds_vd4dotu_vv_u32m8_mu (vbool4_t vm, vuint32m8_t vd, vuint8m8_t vs1,
+ 			      vuint8m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m1_t
+ test_nds_vd4dotu_vv_u64m1_mu (vbool64_t vm, vuint64m1_t vd, vuint16m1_t vs1,
+ 			      vuint16m1_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m2_t
+ test_nds_vd4dotu_vv_u64m2_mu (vbool32_t vm, vuint64m2_t vd, vuint16m2_t vs1,
+ 			      vuint16m2_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m4_t
+ test_nds_vd4dotu_vv_u64m4_mu (vbool16_t vm, vuint64m4_t vd, vuint16m4_t vs1,
+ 			      vuint16m4_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_mu (vm, vd, vs1, vs2, vl);
+ }
+ 
+ vuint64m8_t
+ test_nds_vd4dotu_vv_u64m8_mu (vbool8_t vm, vuint64m8_t vd, vuint16m8_t vs1,
+ 			      vuint16m8_t vs2, size_t vl)
+ {
+   return __riscv_nds_vd4dotu_mu (vm, vd, vs1, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vd4dotu[ivxfswum.]*\s+} 36 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,46 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
+ 
+ #include <andes_vector.h>
+ 
+ vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4_tu(vbfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16mf2_t test_nds_vfncvt_bf16_s_bf16mf2_tu(vbfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16m1_t test_nds_vfncvt_bf16_s_bf16m1_tu(vbfloat16m1_t vd, vfloat32m2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16m2_t test_nds_vfncvt_bf16_s_bf16m2_tu(vbfloat16m2_t vd, vfloat32m4_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16m4_t test_nds_vfncvt_bf16_s_bf16m4_tu(vbfloat16m4_t vd, vfloat32m8_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, vl);
+ }
+ 
+ vbfloat16mf4_t test_nds_vfncvt_bf16_s_bf16mf4_rm_tu(vbfloat16mf4_t vd, vfloat32mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16mf2_t test_nds_vfncvt_bf16_s_bf16mf2_rm_tu(vbfloat16mf2_t vd, vfloat32m1_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m1_t test_nds_vfncvt_bf16_s_bf16m1_rm_tu(vbfloat16m1_t vd, vfloat32m2_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m2_t test_nds_vfncvt_bf16_s_bf16m2_rm_tu(vbfloat16m2_t vd, vfloat32m4_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vbfloat16m4_t test_nds_vfncvt_bf16_s_bf16m4_rm_tu(vbfloat16m4_t vd, vfloat32m8_t vs2, size_t vl) {
+     return __riscv_nds_vfncvt_bf16_tu(vd, vs2, __RISCV_FRM_RNE, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*a0,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vfncvt\.bf16\.s[ivxfswum.]*\s+} 10 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadb.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadb.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadb.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadb.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,199 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_zvfh_xandesvpackfph -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_zvfh_xandesvpackfph -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadb_vf_f16mf4_rm_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadb_vf_f16mf2_rm_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadb_vf_f16m1_rm_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadb_vf_f16m2_rm_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadb_vf_f16m4_rm_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadb_vf_f16m8_rm_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadb_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vfpmadb\.vf\s+} 48 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadt.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadt.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadt.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadt.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,199 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_zvfh_xandesvpackfph -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_zvfh_xandesvpackfph -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_tu(vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_tu(vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_tu(vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_tu(vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_tu(vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_tu(vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tu(maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_tum(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_tum(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_tum(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_tum(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_tum(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_tum(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tum(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_tumu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_tumu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_tumu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_tumu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_tumu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_tumu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_tumu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf4_t test_nds_vfpmadt_vf_f16mf4_rm_mu(vbool64_t mask, vfloat16mf4_t maskedoff, vfloat16mf4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16mf2_t test_nds_vfpmadt_vf_f16mf2_rm_mu(vbool32_t mask, vfloat16mf2_t maskedoff, vfloat16mf2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m1_t test_nds_vfpmadt_vf_f16m1_rm_mu(vbool16_t mask, vfloat16m1_t maskedoff, vfloat16m1_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m2_t test_nds_vfpmadt_vf_f16m2_rm_mu(vbool8_t mask, vfloat16m2_t maskedoff, vfloat16m2_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m4_t test_nds_vfpmadt_vf_f16m4_rm_mu(vbool4_t mask, vfloat16m4_t maskedoff, vfloat16m4_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ vfloat16m8_t test_nds_vfpmadt_vf_f16m8_rm_mu(vbool2_t mask, vfloat16m8_t maskedoff, vfloat16m8_t op1, float op2, size_t vl) {
+   return __riscv_nds_vfpmadt_mu(mask, maskedoff, op1, op2, __RISCV_FRM_RNE, vl);
+ }
+ 
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vfpmadt\.vf\s+} 48 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvbfhcvt -mabi=ilp32 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvbfhcvt -mabi=lp64 -O3 -fno-schedule-insns -fno-schedule-insns2" { target { rv64 } } } */
+ 
+ #include <andes_vector.h>
+ 
+ vfloat32mf2_t test_nds_vfwcvt_s_bf16_f32mf2_tu(vfloat32mf2_t vd, vbfloat16mf4_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ 
+ vfloat32m1_t test_nds_vfwcvt_s_bf16_f32m1_tu(vfloat32m1_t vd, vbfloat16mf2_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ 
+ vfloat32m2_t test_nds_vfwcvt_s_bf16_f32m2_tu(vfloat32m2_t vd, vbfloat16m1_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ 
+ vfloat32m4_t test_nds_vfwcvt_s_bf16_f32m4_tu(vfloat32m4_t vd, vbfloat16m2_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ 
+ vfloat32m8_t test_nds_vfwcvt_s_bf16_f32m8_tu(vfloat32m8_t vd, vbfloat16m4_t vs2, size_t vl) {
+     return __riscv_nds_vfwcvt_s_tu(vd, vs2, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*a0,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vfwcvt\.s\.bf16[ivxfswum.]*\s+} 5 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vln8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vln8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vln8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vln8.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,118 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gv_xandesvsintload -O3 -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gv_xandesvsintload -O3 -mabi=lp64" { target { rv64 } } } */
+ 
+ #include "andes_vector.h"
+ 
+ vint8mf8_t test_vln8_v_i8mf8_tu(vint8mf8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tu(vd, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_tu(vint8mf4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tu(vd, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_tu(vint8mf2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tu(vd, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_tu(vint8m1_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tu(vd, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_tu(vint8m2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tu(vd, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_tu(vint8m4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tu(vd, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_tu(vint8m8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tu(vd, rs1, vl);
+ }
+ 
+ vint8mf8_t test_vln8_v_i8mf8_tum(vbool64_t vm, vint8mf8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_tum(vbool32_t vm, vint8mf4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_tum(vbool16_t vm, vint8mf2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_tum(vbool8_t vm, vint8m1_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_tum(vbool4_t vm, vint8m2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_tum(vbool2_t vm, vint8m4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_tum(vbool1_t vm, vint8m8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tum(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf8_t test_vln8_v_i8mf8_tumu(vbool64_t vm, vint8mf8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_tumu(vbool32_t vm, vint8mf4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_tumu(vbool16_t vm, vint8mf2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_tumu(vbool8_t vm, vint8m1_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_tumu(vbool4_t vm, vint8m2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_tumu(vbool2_t vm, vint8m4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_tumu(vbool1_t vm, vint8m8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_tumu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf8_t test_vln8_v_i8mf8_mu(vbool64_t vm, vint8mf8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf4_t test_vln8_v_i8mf4_mu(vbool32_t vm, vint8mf4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8mf2_t test_vln8_v_i8mf2_mu(vbool16_t vm, vint8mf2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m1_t test_vln8_v_i8m1_mu(vbool8_t vm, vint8m1_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m2_t test_vln8_v_i8m2_mu(vbool4_t vm, vint8m2_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m4_t test_vln8_v_i8m4_mu(vbool2_t vm, vint8m4_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_mu(vm, vd, rs1, vl);
+ }
+ 
+ vint8m8_t test_vln8_v_i8m8_mu(vbool1_t vm, vint8m8_t vd, const void *rs1, size_t vl) {
+   return __riscv_nds_vln8_mu(vm, vd, rs1, vl);
+ }
+ /* { dg-final { scan-assembler-times {vseti?vli\s+[a-z0-9]+,\s*[a-z0-9]+,\s*e[0-9]+,\s*mf?[1248],\s*t[au],\s*m[au]\s+nds\.vln8\.v\s+} 28 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-1.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-1.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64g_xandesperf -mabi=lp64" } */
+ 
+ int main () {
+ #if !defined(__riscv)
+ #error "__riscv"
+ #endif
+ 
+ #if !defined(__riscv_xandesperf)
+ #error "__riscv_xandesperf"
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-2.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-2.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-2.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-2.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64g_xandesbfhcvt -mabi=lp64" } */
+ 
+ int main () {
+ #if !defined(__riscv)
+ #error "__riscv"
+ #endif
+ 
+ #if !defined(__riscv_xandesbfhcvt)
+ #error "__riscv_xandesbfhcvt"
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-3.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-3.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-3.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-3.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64g_xandesvbfhcvt -mabi=lp64" } */
+ 
+ int main () {
+ #if !defined(__riscv)
+ #error "__riscv"
+ #endif
+ 
+ #if !defined(__riscv_xandesvbfhcvt)
+ #error "__riscv_xandesvbfhcvt"
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-4.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-4.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-4.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-4.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64g_xandesvsintload -mabi=lp64" } */
+ 
+ int main () {
+ #if !defined(__riscv)
+ #error "__riscv"
+ #endif
+ 
+ #if !defined(__riscv_xandesvsintload)
+ #error "__riscv_xandesvsintload"
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-5.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-5.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-5.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-5.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64g_xandesvpackfph -mabi=lp64" } */
+ 
+ int main () {
+ #if !defined(__riscv)
+ #error "__riscv"
+ #endif
+ 
+ #if !defined(__riscv_xandesvpackfph)
+ #error "__riscv_xandesvpackfph"
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-6.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-6.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-6.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandes-predef-6.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,14 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64g_xandesvdot -mabi=lp64" } */
+ 
+ int main () {
+ #if !defined(__riscv)
+ #error "__riscv"
+ #endif
+ 
+ #if !defined(__riscv_xandesvdot)
+ #error "__riscv_xandesvdot"
+ #endif
+ 
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-1.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-1.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gc_xandesbfhcvt -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gc_xandesbfhcvt -mabi=lp64" { target { rv64 } } } */
+ 
+ float
+ nds_fcvt_s_bf16 (__bf16 a)
+ {
+   return __builtin_riscv_nds_fcvt_s_bf16 (a);
+ }
+ 
+ /* { dg-final { scan-assembler-times {nds\.fcvt\.s\.bf16} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-2.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-2.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-2.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesbfhcvt-2.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv32gc_xandesbfhcvt -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-options "-march=rv64gc_xandesbfhcvt -mabi=lp64" { target { rv64 } } } */
+ 
+ __bf16
+ nds_fcvt_bf16_s (float a)
+ {
+   return __builtin_riscv_nds_fcvt_bf16_s (a);
+ }
+ 
+ /* { dg-final { scan-assembler-times {nds\.fcvt\.bf16\.s} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-1.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-1.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-1.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" { target { rv64 } } } */
+ /* { dg-options "-march=rv32gc_xandesperf -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ long foo (long cond)
+ {
+   if (cond != 63)
+     cond += 10;
+   return cond;
+ }
+ 
+ /* { dg-final { scan-assembler {\mnds.beqc} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-10.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-10.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-10.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-10.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,32 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target rv32 } */
+ /* { dg-options "-march=rv32gc_xandesperf -mabi=ilp32" } */
+ 
+ int
+ test_nds_ffb (unsigned int a, unsigned int b)
+ {
+   return __builtin_riscv_nds_ffb_32 (a, b);
+ }
+ 
+ int
+ test_nds_ffzmism (unsigned int a, unsigned int b)
+ {
+   return __builtin_riscv_nds_ffzmism_32 (a, b);
+ }
+ 
+ int
+ test_nds_ffmism (unsigned int a, unsigned int b)
+ {
+   return __builtin_riscv_nds_ffmism_32 (a, b);
+ }
+ 
+ int
+ test_nds_flmism (unsigned int a, unsigned int b)
+ {
+   return __builtin_riscv_nds_flmism_32 (a, b);
+ }
+ 
+ /* { dg-final { scan-assembler-times {nds\.ffb} 1 } } */
+ /* { dg-final { scan-assembler-times {nds\.ffzmism} 1 } } */
+ /* { dg-final { scan-assembler-times {nds\.ffmism} 1 } } */
+ /* { dg-final { scan-assembler-times {nds\.flmism} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-11.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-11.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-11.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-11.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,32 ----
+ /* { dg-do compile } */
+ /* { dg-require-effective-target rv64 } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" } */
+ 
+ long
+ test_nds_ffb (unsigned long a, unsigned long b)
+ {
+   return __builtin_riscv_nds_ffb_64 (a, b);
+ }
+ 
+ long
+ test_nds_ffzmism (unsigned long a, unsigned long b)
+ {
+   return __builtin_riscv_nds_ffzmism_64 (a, b);
+ }
+ 
+ long
+ test_nds_ffmism (unsigned long a, unsigned long b)
+ {
+   return __builtin_riscv_nds_ffmism_64 (a, b);
+ }
+ 
+ long
+ test_nds_flmism (unsigned long a, unsigned long b)
+ {
+   return __builtin_riscv_nds_flmism_64 (a, b);
+ }
+ 
+ /* { dg-final { scan-assembler-times {nds\.ffb} 1 } } */
+ /* { dg-final { scan-assembler-times {nds\.ffzmism} 1 } } */
+ /* { dg-final { scan-assembler-times {nds\.ffmism} 1 } } */
+ /* { dg-final { scan-assembler-times {nds\.flmism} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-2.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-2.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-2.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-2.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,13 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" { target { rv64 } } } */
+ /* { dg-options "-march=rv32gc_xandesperf -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ long foo (long cond)
+ {
+   if (cond & (1 << 30))
+     cond -= 10;
+   return cond;
+ }
+ 
+ /* { dg-final { scan-assembler "nds\.bb\[cs\]" } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-3.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-3.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-3.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-3.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile { target { rv64 } } } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ unsigned long foo (long a)
+ {
+   unsigned int lala = a;
+   return lala;
+ }
+ 
+ /* { dg-final { scan-assembler {\mnds.bfoz} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-4.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-4.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-4.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-4.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" { target { rv64 } } } */
+ /* { dg-options "-march=rv32gc_xandesperf -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ unsigned short foo (long a)
+ {
+   return (unsigned short) a;
+ }
+ 
+ /* { dg-final { scan-assembler {\mnds.bfoz} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-5.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-5.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-5.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-5.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,11 ----
+ /* { dg-do compile { target { rv64 } } } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ long foo (long a)
+ {
+   int lala = a;
+   return lala;
+ }
+ 
+ /* { dg-final { scan-assembler {\mnds.bfos} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-6.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-6.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-6.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-6.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,18 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" { target { rv64 } } } */
+ /* { dg-options "-march=rv32gc_xandesperf -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ short foo (long a)
+ {
+   short lala = a;
+   return lala;
+ }
+ 
+ signed char foo1 (long a)
+ {
+   signed char lala = a;
+   return lala;
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mnds.bfos} 2 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-7.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-7.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-7.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-7.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,22 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" { target { rv64 } } } */
+ /* { dg-options "-march=rv32gc_xandesperf -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ long foo (long a)
+ {
+   return (a & 0xffe0) >> 5;
+ }
+ 
+ unsigned long foo1 (unsigned long a)
+ {
+   return (a & 0xffe0) >> 5;
+ }
+ 
+ signed char foo2 (long a)
+ {
+   return (signed char) ((a & 0xff00) >> 8);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mnds.bfoz} 2 } } */
+ /* { dg-final { scan-assembler-times {\mnds.bfos} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-8.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-8.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-8.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-8.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,26 ----
+ /* { dg-do compile } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" { target { rv64 } } } */
+ /* { dg-options "-march=rv32gc_xandesperf -mabi=ilp32" { target { rv32 } } } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ short *ptr_h;
+ short foo_h (long a)
+ {
+   return *(ptr_h + a);
+ }
+ 
+ int *ptr_i;
+ int foo_i (long a)
+ {
+   return *(ptr_i + a);
+ }
+ 
+ long long *ptr_d;
+ long long foo_d (long a)
+ {
+   return *(ptr_d + a);
+ }
+ 
+ /* { dg-final { scan-assembler-times {\mnds.lea.h} 1 } } */
+ /* { dg-final { scan-assembler-times {\mnds.lea.w} 1 } } */
+ /* { dg-final { scan-assembler-times {\mnds.lea.d} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-9.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-9.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-9.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/xandes/xandesperf-9.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,31 ----
+ /* { dg-do compile { target { rv64 } } } */
+ /* { dg-options "-march=rv64gc_xandesperf -mabi=lp64" } */
+ /* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */
+ 
+ char *ptr_ub;
+ char foo_ub (unsigned int a)
+ {
+   return *(ptr_ub + a);
+ }
+ 
+ short *ptr_uh;
+ short foo_uh (unsigned int a)
+ {
+   return *(ptr_uh + a);
+ }
+ 
+ int *ptr_ui;
+ int foo_ui (unsigned int a)
+ {
+   return *(ptr_ui + a);
+ }
+ 
+ long long *ptr_ud;
+ long long foo_ud (unsigned int a)
+ {
+   return *(ptr_ud + a);
+ }
+ /* { dg-final { scan-assembler-times {\mnds.lea.b.ze} 1 } } */
+ /* { dg-final { scan-assembler-times {\mnds.lea.h.ze} 1 } } */
+ /* { dg-final { scan-assembler-times {\mnds.lea.w.ze} 1 } } */
+ /* { dg-final { scan-assembler-times {\mnds.lea.d.ze} 1 } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/zba-shadd.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/zba-shadd.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/zba-shadd.c	Sun Aug 31 22:33:01 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/zba-shadd.c	Sun Sep  7 22:34:09 2025
***************
*** 1,7 ****
  /* { dg-do compile } */
  /* { dg-options "-O2 -march=rv64gc_zba -mabi=lp64" } */
  
! unsigned long foo(unsigned int a, unsigned long b)
  {
          a = a << 1;
          unsigned long c = (unsigned long) a;
--- 1,15 ----
  /* { dg-do compile } */
  /* { dg-options "-O2 -march=rv64gc_zba -mabi=lp64" } */
  
! unsigned long foo1(unsigned int a, unsigned long b)
! {
!         a = a << 1;
!         unsigned long c = (unsigned long) a;
!         unsigned long d = b + (c<<1);
!         return d;
! }
! 
! unsigned long foo2(unsigned int a, unsigned long b)
  {
          a = a << 1;
          unsigned long c = (unsigned long) a;
*************** unsigned long foo(unsigned int a, unsign
*** 9,13 ****
--- 17,31 ----
          return d;
  }
  
+ unsigned long foo3(unsigned int a, unsigned long b)
+ {
+         a = a << 1;
+         unsigned long c = (unsigned long) a;
+         unsigned long d = b + (c<<3);
+         return d;
+ }
+ 
+ /* { dg-final { scan-assembler "sh1add.uw" } } */
  /* { dg-final { scan-assembler "sh2add.uw" } } */
+ /* { dg-final { scan-assembler "sh3add.uw" } } */
  /* { dg-final { scan-assembler-not {\mzext} } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/riscv/zbb-sext.c gcc-16-20250907/gcc/testsuite/gcc.target/riscv/zbb-sext.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/riscv/zbb-sext.c	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gcc.target/riscv/zbb-sext.c	Sun Sep  7 22:34:09 2025
***************
*** 0 ****
--- 1,15 ----
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -march=rv64gc_zbb -mabi=lp64" } */
+ 
+ #include <stdint-gcc.h>
+ 
+ int8_t foo1(uint8_t a) {
+     return a;
+ }
+ 
+ int16_t foo2(uint16_t a) {
+     return a;
+ }
+ 
+ /* { dg-final { scan-assembler "sext.b" } } */
+ /* { dg-final { scan-assembler "sext.h" } } */
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/s390/spaceship-fp-1.c gcc-16-20250907/gcc/testsuite/gcc.target/s390/spaceship-fp-1.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/s390/spaceship-fp-1.c	Sun Aug 31 22:33:02 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/s390/spaceship-fp-1.c	Sun Sep  7 22:34:09 2025
***************
*** 1,6 ****
  /* { dg-do compile { target lp64 } } */
  /* { dg-options "-O2 -mzarch -march=z13 -fdump-tree-optimized" } */
! /* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, 2\)} 3 optimized } } */
  /* { dg-final { scan-assembler-times {\tk[edx]br\t} 3 } } */
  /* { dg-final { scan-assembler-not {\tbrc} } } */
  /* { dg-final { scan-assembler-not {\tc[edx]br\t} } } */
--- 1,6 ----
  /* { dg-do compile { target lp64 } } */
  /* { dg-options "-O2 -mzarch -march=z13 -fdump-tree-optimized" } */
! /* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, -128\)} 3 optimized } } */
  /* { dg-final { scan-assembler-times {\tk[edx]br\t} 3 } } */
  /* { dg-final { scan-assembler-not {\tbrc} } } */
  /* { dg-final { scan-assembler-not {\tc[edx]br\t} } } */
***************
*** 15,21 ****
      else if (x > y)		\
        return 1;			\
      else			\
!       return 2;			\
    }
  
  TEST (float, float)
--- 15,21 ----
      else if (x > y)		\
        return 1;			\
      else			\
!       return -128;		\
    }
  
  TEST (float, float)
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gcc.target/s390/spaceship-fp-2.c gcc-16-20250907/gcc/testsuite/gcc.target/s390/spaceship-fp-2.c
*** gcc-16-20250831/gcc/testsuite/gcc.target/s390/spaceship-fp-2.c	Sun Aug 31 22:33:02 2025
--- gcc-16-20250907/gcc/testsuite/gcc.target/s390/spaceship-fp-2.c	Sun Sep  7 22:34:09 2025
***************
*** 1,6 ****
  /* { dg-do compile { target lp64 } } */
  /* { dg-options "-O2 -mzarch -march=z13 -ffinite-math-only -fdump-tree-optimized" } */
! /* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, 2\)} 3 optimized } } */
  /* { dg-final { scan-assembler-times {\tc[edx]br\t} 3 } } */
  /* { dg-final { scan-assembler-not {\tbrc} } } */
  /* { dg-final { scan-assembler-not {\tk[edx]br\t} } } */
--- 1,6 ----
  /* { dg-do compile { target lp64 } } */
  /* { dg-options "-O2 -mzarch -march=z13 -ffinite-math-only -fdump-tree-optimized" } */
! /* { dg-final { scan-tree-dump-times {\.SPACESHIP \([^,]+, [^,]+, -128\)} 3 optimized } } */
  /* { dg-final { scan-assembler-times {\tc[edx]br\t} 3 } } */
  /* { dg-final { scan-assembler-not {\tbrc} } } */
  /* { dg-final { scan-assembler-not {\tk[edx]br\t} } } */
***************
*** 15,21 ****
      else if (x > y)		\
        return 1;			\
      else			\
!       return 2;			\
    }
  
  TEST (float, float)
--- 15,21 ----
      else if (x > y)		\
        return 1;			\
      else			\
!       return -128;		\
    }
  
  TEST (float, float)
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_20.f03 gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_20.f03
*** gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_20.f03	Sun Aug 31 22:33:06 2025
--- gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_20.f03	Sun Sep  7 22:34:32 2025
*************** program p
*** 16,20 ****
     allocate (t2(3) :: x)            ! Used to segfault in trans-array.c.
     if (x%b .ne. 3) STOP 1
     if (x%b .ne. size (x%r, 1)) STOP 2
!    if (any (x%r%a .ne. 1)) STOP 3
  end
--- 16,20 ----
     allocate (t2(3) :: x)            ! Used to segfault in trans-array.c.
     if (x%b .ne. 3) STOP 1
     if (x%b .ne. size (x%r, 1)) STOP 2
!    if (x%r%a .ne. 1) STOP 3
  end
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_26.f03 gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_26.f03
*** gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_26.f03	Sun Aug 31 22:33:06 2025
--- gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_26.f03	Sun Sep  7 22:34:32 2025
*************** module pdt_m
*** 13,19 ****
    implicit none
    type :: vec(k)
       integer, len :: k=3
!      integer :: foo(k)=[1,2,3]
    end type vec
  contains
    elemental function addvv(a,b) result(c)
--- 13,19 ----
    implicit none
    type :: vec(k)
       integer, len :: k=3
!      integer :: foo(k)
    end type vec
  contains
    elemental function addvv(a,b) result(c)
*************** program test_pdt
*** 43,46 ****
    if (any (c(1)%foo .ne. [13,15,17])) STOP 2
  end program test_pdt
  ! { dg-final { scan-tree-dump-times "__builtin_free" 8 "original" } }
! ! { dg-final { scan-tree-dump-times "__builtin_malloc" 9 "original" } }
--- 43,46 ----
    if (any (c(1)%foo .ne. [13,15,17])) STOP 2
  end program test_pdt
  ! { dg-final { scan-tree-dump-times "__builtin_free" 8 "original" } }
! ! { dg-final { scan-tree-dump-times "__builtin_malloc" 8 "original" } }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_27.f03 gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_27.f03
*** gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_27.f03	Sun Aug 31 22:33:06 2025
--- gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_27.f03	Sun Sep  7 22:34:32 2025
***************
*** 1,22 ****
! ! { dg-do run }
  !
! ! Test the fix for PR83611, in which the assignment caused a
! ! double free error and the initialization of 'foo' was not done.
  !
  module pdt_m
    implicit none
    type :: vec(k)
       integer, len :: k=3
!      integer :: foo(k)=[1,2,3]
    end type vec
  end module pdt_m
- 
- program test_pdt
-   use pdt_m
-   implicit none
-   type(vec) :: u,v
-   if (any (u%foo .ne. [1,2,3])) STOP 1
-   u%foo = [7,8,9]
-   v = u
-   if (any (v%foo .ne. [7,8,9])) STOP 2
- end program test_pdt
--- 1,16 ----
! ! { dg-do compile }
  !
! ! This originally tested the fix for PR83611, in which the assignment caused a
! ! double free error and the initialization of 'foo' was not done. However, the
! ! initialization is not conforming (see PR84432 & PR114815) and so this test
! ! is now compile only and verifies the error detection. The program part has
! ! been deleted.
  !
  module pdt_m
    implicit none
    type :: vec(k)
       integer, len :: k=3
!      integer :: foo(k)=[1,2,3]        ! { dg-error "not compatible with a default initializer" }
!      character(len = k) :: chr = "ab" ! { dg-error "not compatible with a default initializer" }
    end type vec
  end module pdt_m
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_42.f03 gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_42.f03
*** gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_42.f03	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_42.f03	Sun Sep  7 22:34:32 2025
***************
*** 0 ****
--- 1,46 ----
+ ! { dg-do run )
+ !
+ ! Test the fix for PR87669 in which SELECT TYPE was not identifying the difference
+ ! between derived types with different type kind parameters, when the selector
+ ! is unlimited polymorphic.
+ !
+ ! Contributed by Etienne Descamps  <etdescdev@gmail.com>
+ !
+ Program Devtest
+   Type dvtype(k)
+     Integer, Kind :: k
+     Real(k) :: a, b, c
+   End Type dvtype
+   type(dvtype(8)) :: dv
+   type(dvtype(4)) :: fv
+   integer :: ctr = 0
+ 
+   dv%a = 1; dv%b = 2; dv%c = 3
+   call dvtype_print(dv)
+   if (ctr /= 2) stop 1
+ 
+   fv%a = 1; fv%b = 2; fv%c = 3
+   call dvtype_print(fv)
+   if (ctr /= 0) stop 2
+ 
+ Contains
+   Subroutine dvtype_print(p)
+     class(*), intent(in) :: p
+     Select Type(p)
+     class is (dvtype(4))
+       ctr = ctr - 1
+     End Select
+     Select Type(p)
+     class is (dvtype(8))
+       ctr = ctr + 1
+     End Select
+     Select Type(p)
+     type is (dvtype(4))
+       ctr = ctr - 1
+     End Select
+     Select Type(p)
+     type is (dvtype(8))
+       ctr = ctr + 1
+     End Select
+   End Subroutine dvtype_print
+ End
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_43.f03 gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_43.f03
*** gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_43.f03	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_43.f03	Sun Sep  7 22:34:32 2025
***************
*** 0 ****
--- 1,28 ----
+ ! { dg-do run )
+ !
+ ! Test the fix for PR89707 in which the procedure pointer component
+ ! with a parameterized KIND expression caused an ICE in resolution.
+ !
+ ! Contributed by Janus Weil  <janus@gcc.gnu.org>
+ !
+ program pdt_with_ppc
+   integer, parameter :: kt = kind (0d0)
+   type :: q(k)
+      integer, kind :: k = 4
+      procedure (real(kind=kt)), pointer, nopass :: p
+   end type
+   type (q(kt)) :: x
+   x%p => foo
+   if (int (x%p(2d0)) /= 4) stop 1
+   x%p => bar
+   if (int (x%p(2d0, 4d0)) /= 16) stop 2
+ contains
+   real(kind=kt) function foo (x)
+     real(kind = kt) :: x
+     foo = 2.0 * x
+   end
+   real(kind=kt) function bar (x, y)
+     real(kind = kt) :: x, y
+     bar = x ** y
+   end
+ end
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_44.f03 gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_44.f03
*** gcc-16-20250831/gcc/testsuite/gfortran.dg/pdt_44.f03	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gfortran.dg/pdt_44.f03	Sun Sep  7 22:34:32 2025
***************
*** 0 ****
--- 1,28 ----
+ ! { dg-do compile }
+ !
+ ! Test the fix for PRs83762 and 102457, in which type parameter expressions that
+ ! are not of INTEGER type were either not being diagnosed or were inadequately
+ ! diagnosed.
+ !
+ ! PR83762
+ module bar
+   implicit none
+   type :: foo(n)
+      integer, len :: n=10
+   end type foo
+ contains
+   subroutine main
+     type(foo(undefined)) :: x ! { dg-error "must be of INTEGER type and not UNKNOWN" }
+   end subroutine main
+ end module bar
+ 
+ ! PR102457
+ subroutine s
+    real :: m = 2
+    type t(n)
+       integer, len :: n = 1
+       character(n*n) :: c
+    end type
+    type(t(m)) :: x ! { dg-error "must be of INTEGER type and not REAL" }
+    call h(x)
+ end
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gfortran.dg/pr95090.f90 gcc-16-20250907/gcc/testsuite/gfortran.dg/pr95090.f90
*** gcc-16-20250831/gcc/testsuite/gfortran.dg/pr95090.f90	Sun Aug 31 22:33:06 2025
--- gcc-16-20250907/gcc/testsuite/gfortran.dg/pr95090.f90	Sun Sep  7 22:34:32 2025
*************** module m23456789012345678901234567890123
*** 13,19 ****
  contains
    subroutine s2345678901234567890123456789012345678901234567890123456789_123
      type(t2345678901234567890123456789012345678901234567890123456789_123 &
!         (n2345678901234567890123456789012345678901234567890123456789_123)) :: &
           z2345678901234567890123456789012345678901234567890123456789_123
     end
  end
--- 13,19 ----
  contains
    subroutine s2345678901234567890123456789012345678901234567890123456789_123
      type(t2345678901234567890123456789012345678901234567890123456789_123 &
!         (n2345678901234567890123456789012345678901234567890123456789_123 = 4)) :: &
           z2345678901234567890123456789012345678901234567890123456789_123
     end
  end
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gfortran.dg/transfer_class_5.f90 gcc-16-20250907/gcc/testsuite/gfortran.dg/transfer_class_5.f90
*** gcc-16-20250831/gcc/testsuite/gfortran.dg/transfer_class_5.f90	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gfortran.dg/transfer_class_5.f90	Sun Sep  7 22:34:46 2025
***************
*** 0 ****
--- 1,53 ----
+ ! { dg-do run }
+ ! PR fortran/121263 - fix TRANSFER with rank 1 unlimited polymorhpic
+ !
+ ! Based on original testcase by Chris Cox.
+ 
+ module stdlib_hashmap_wrappers
+   implicit none
+ contains
+   subroutine set_rank_one_key_int( key, value )
+     integer, allocatable, intent(inout) :: key(:)
+     class(*), intent(in)                :: value(:)
+     key = transfer( value, key )
+   end subroutine
+ 
+   subroutine set_rank_one_key_cx ( key, value )
+     complex, allocatable, intent(inout) :: key(:)
+     class(*), intent(in)                :: value(:)
+     key = transfer( value, key )
+   end subroutine
+ 
+   subroutine set_first_key_int   ( key, value )
+     integer, intent(inout) :: key
+     class(*), intent(in)   :: value(:)
+     key = transfer( value(1), key )
+   end subroutine
+ end module
+ 
+ program p
+   use stdlib_hashmap_wrappers
+   implicit none
+   integer, allocatable :: a(:), b(:)
+   complex, allocatable :: c(:), d(:)
+   class(*),allocatable :: z(:)
+   integer :: m
+   a = [1, 2, 3, 4, 5]
+   c = cmplx (a, -a)
+   call set_rank_one_key_int (b, a)
+   call set_rank_one_key_cx  (d, c)
+   call set_first_key_int    (m, a)
+ ! print *, b
+ ! print *, d
+   if (size (a) /= size (b)) stop 1
+   if (any  (a  /=       b)) stop 2
+   if (size (c) /= size (d)) stop 3
+   if (any  (c  /=       d)) stop 4
+   if (m /= 1) stop 5
+   deallocate (d)
+   z = c
+   d = transfer (z, d)
+   if (size (c) /= size (d)) stop 6
+   if (any  (c  /=       d)) stop 7
+   deallocate (a, b, c, d, z)
+ end program p
diff -Nrcpad gcc-16-20250831/gcc/testsuite/gfortran.dg/value_10.f90 gcc-16-20250907/gcc/testsuite/gfortran.dg/value_10.f90
*** gcc-16-20250831/gcc/testsuite/gfortran.dg/value_10.f90	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/gcc/testsuite/gfortran.dg/value_10.f90	Sun Sep  7 22:34:46 2025
***************
*** 0 ****
--- 1,43 ----
+ ! { dg-do compile }
+ ! { dg-additional-options "-Wcharacter-truncation -fdump-tree-original" }
+ ! PR fortran/121727
+ 
+ program p
+   use iso_c_binding, only: c_char
+   implicit none
+   call cbind('abcd')   ! { dg-warning "length of actual argument longer" }
+   call one  ('efgh')   ! { dg-warning "length of actual argument longer" }
+   call one4 (4_'IJKL') ! { dg-warning "length of actual argument longer" }
+ 
+   call two4 (4_'MNOP') ! { dg-warning "length of actual argument longer" }
+   call three('efgh')   ! { dg-warning "length of actual argument longer" }
+   call four ('ijklmn') ! { dg-warning "length of actual argument longer" }
+ contains
+   subroutine cbind(c) bind(C)
+     character(kind=c_char,len=1), value :: c
+   end
+ 
+   subroutine one(x)
+     character(kind=1,len=1), value :: x
+   end
+ 
+   subroutine one4(w)
+     character(kind=4,len=1), value :: w
+   end
+ 
+   subroutine two4(y)
+     character(kind=4,len=2), value :: y
+   end
+ 
+   subroutine three(z)
+     character(kind=1,len=3), value :: z
+   end
+ 
+   subroutine four(v)
+     character(kind=1,len=4), optional, value :: v
+   end
+ end
+ 
+ ! { dg-final { scan-tree-dump-times "two4 \\(.*, 2\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "three \\(.*, 3\\);" 1 "original" } }
+ ! { dg-final { scan-tree-dump-times "four \\(.*, 1, 4\\);" 1 "original" } }
diff -Nrcpad gcc-16-20250831/gcc/testsuite/lib/target-supports.exp gcc-16-20250907/gcc/testsuite/lib/target-supports.exp
*** gcc-16-20250831/gcc/testsuite/lib/target-supports.exp	Sun Aug 31 22:33:21 2025
--- gcc-16-20250907/gcc/testsuite/lib/target-supports.exp	Sun Sep  7 22:34:52 2025
*************** proc add_options_for_vect_early_break {
*** 4639,4645 ****
  
      if { [check_effective_target_arm_v8_neon_ok] } {
  	global et_arm_v8_neon_flags
! 	return "$flags $et_arm_v8_neon_flags -mcpu=unset -march=armv8-a"
      }
  
      if { [check_effective_target_sse4] } {
--- 4639,4645 ----
  
      if { [check_effective_target_arm_v8_neon_ok] } {
  	global et_arm_v8_neon_flags
! 	return "$flags $et_arm_v8_neon_flags"
      }
  
      if { [check_effective_target_sse4] } {
*************** proc add_options_for_arm_v8_neon { flags
*** 5462,5468 ****
  	return "$flags"
      }
      global et_arm_v8_neon_flags
!     return "$flags $et_arm_v8_neon_flags -mcpu=unset -march=armv8-a"
  }
  
  # Add the options needed for ARMv8.1 Adv.SIMD.  Also adds the ARMv8 NEON
--- 5462,5468 ----
  	return "$flags"
      }
      global et_arm_v8_neon_flags
!     return "$flags $et_arm_v8_neon_flags"
  }
  
  # Add the options needed for ARMv8.1 Adv.SIMD.  Also adds the ARMv8 NEON
*************** proc add_options_for_arm_vfp3 { flags }
*** 5533,5557 ****
  # best options to add.
  
  proc check_effective_target_arm_neon_ok_nocache { } {
      global et_arm_neon_flags
      set et_arm_neon_flags ""
!     if { [check_effective_target_arm32] } {
! 	foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -mcpu=unset -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -mcpu=unset -march=armv7-a"} {
! 	    if { [check_no_compiler_messages_nocache arm_neon_ok object {
! 		#include <arm_neon.h>
! 		int dummy;
! 		#ifndef __ARM_NEON__
! 		#error not NEON
! 		#endif
! 		/* Avoid the case where a test adds -mfpu=neon, but the toolchain is
! 		   configured for -mcpu=arm926ej-s, for example.  */
! 		#if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
! 		#error Architecture does not support NEON.
! 		#endif
! 	    } "$flags"] } {
! 		set et_arm_neon_flags $flags
! 		return 1
! 	    }
  	}
      }
  
--- 5533,5558 ----
  # best options to add.
  
  proc check_effective_target_arm_neon_ok_nocache { } {
+     if { ![istarget arm*-*-*] } {
+ 	return 0
+     }
      global et_arm_neon_flags
      set et_arm_neon_flags ""
!     foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -mcpu=unset -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -mcpu=unset -march=armv7-a"} {
! 	if { [check_no_compiler_messages_nocache arm_neon_ok object {
! 	    #include <arm_neon.h>
! 	    int dummy;
! 	    #ifndef __ARM_NEON__
! 	    #error not NEON
! 	    #endif
! 	    /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
! 	    configured for -mcpu=arm926ej-s, for example.  */
! 	    #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
! 	    #error Architecture does not support NEON.
! 	    #endif
! 	} "$flags"] } {
! 	    set et_arm_neon_flags $flags
! 	    return 1
  	}
      }
  
*************** proc check_effective_target_arm_neon_fp1
*** 5737,5744 ****
      global et_arm_neon_fp16_flags
      global et_arm_neon_flags
      set et_arm_neon_fp16_flags ""
!     if { [check_effective_target_arm32]
! 	 && [check_effective_target_arm_neon_ok] } {
  	foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
  		       "-mfpu=neon-fp16 -mfloat-abi=softfp"
  		       "-mfp16-format=ieee"
--- 5738,5744 ----
      global et_arm_neon_fp16_flags
      global et_arm_neon_flags
      set et_arm_neon_fp16_flags ""
!     if { [check_effective_target_arm_neon_ok] } {
  	foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
  		       "-mfpu=neon-fp16 -mfloat-abi=softfp"
  		       "-mfp16-format=ieee"
*************** proc check_effective_target_arm_neon_sof
*** 5776,5783 ****
      global et_arm_neon_softfp_fp16_flags
      global et_arm_neon_flags
      set et_arm_neon_softfp_fp16_flags ""
!     if { [check_effective_target_arm32]
! 	 && [check_effective_target_arm_neon_ok] } {
  	foreach flags {"-mfpu=neon-fp16 -mfloat-abi=softfp"
  		       "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
  	    if { [check_no_compiler_messages_nocache arm_neon_softfp_fp16_ok object {
--- 5776,5782 ----
      global et_arm_neon_softfp_fp16_flags
      global et_arm_neon_flags
      set et_arm_neon_softfp_fp16_flags ""
!     if { [check_effective_target_arm_neon_ok] } {
  	foreach flags {"-mfpu=neon-fp16 -mfloat-abi=softfp"
  		       "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
  	    if { [check_no_compiler_messages_nocache arm_neon_softfp_fp16_ok object {
*************** proc check_effective_target_arm_fp16_non
*** 5920,5941 ****
  proc check_effective_target_arm_v8_neon_ok_nocache { } {
      global et_arm_v8_neon_flags
      set et_arm_v8_neon_flags ""
!     if { [check_effective_target_arm32] } {
! 	foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
! 	    if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
! 		#if __ARM_ARCH < 8
! 		#error not armv8 or later
! 		#endif
! 		#include "arm_neon.h"
! 		void
! 		foo ()
! 		{
! 		  __asm__ volatile ("vrintn.f32 q0, q0");
! 		}
! 	    } "$flags -mcpu=unset -march=armv8-a"] } {
! 		set et_arm_v8_neon_flags $flags
! 		return 1
  	    }
  	}
      }
  
--- 5919,5938 ----
  proc check_effective_target_arm_v8_neon_ok_nocache { } {
      global et_arm_v8_neon_flags
      set et_arm_v8_neon_flags ""
!     foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
! 	if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
! 	    #if __ARM_ARCH < 8
! 	    #error not armv8 or later
! 	    #endif
! 	    #include "arm_neon.h"
! 	    void
! 	    foo ()
! 	    {
! 		__asm__ volatile ("vrintn.f32 q0, q0");
  	    }
+ 	} "$flags -mcpu=unset -march=armv8-a"] } {
+ 	    set et_arm_v8_neon_flags "$flags -mcpu=unset -march=armv8-a"
+ 	    return 1
  	}
      }
  
*************** proc check_effective_target_arm_neonv2_o
*** 5956,5963 ****
      global et_arm_neonv2_flags
      global et_arm_neon_flags
      set et_arm_neonv2_flags ""
!     if { [check_effective_target_arm32]
! 	 && [check_effective_target_arm_neon_ok] } {
  	foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
  	    if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
  		#include "arm_neon.h"
--- 5953,5959 ----
      global et_arm_neonv2_flags
      global et_arm_neon_flags
      set et_arm_neonv2_flags ""
!     if { [check_effective_target_arm_neon_ok] } {
  	foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
  	    if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
  		#include "arm_neon.h"
*************** proc check_effective_target_vect_pack_tr
*** 8869,8875 ****
        expr { [istarget powerpc*-*-*]
  	     || [check_effective_target_x86]
  	     || [istarget aarch64*-*-*]
! 	     || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
  		 && [check_effective_target_arm_little_endian])
  	     || ([istarget mips*-*-*]
  		 && [et-is-effective-target mips_msa])
--- 8865,8871 ----
        expr { [istarget powerpc*-*-*]
  	     || [check_effective_target_x86]
  	     || [istarget aarch64*-*-*]
! 	     || ([check_effective_target_arm_neon_ok]
  		 && [check_effective_target_arm_little_endian])
  	     || ([istarget mips*-*-*]
  		 && [et-is-effective-target mips_msa])
*************** proc check_effective_target_vect_unpack
*** 8895,8901 ****
  	     || [istarget aarch64*-*-*]
  	     || ([istarget mips*-*-*]
  		 && [et-is-effective-target mips_msa])
! 	     || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
  		 && [check_effective_target_arm_little_endian])
  	     || ([istarget s390*-*-*]
  		 && [check_effective_target_s390_vx])
--- 8891,8897 ----
  	     || [istarget aarch64*-*-*]
  	     || ([istarget mips*-*-*]
  		 && [et-is-effective-target mips_msa])
! 	     || ([check_effective_target_arm_neon_ok]
  		 && [check_effective_target_arm_little_endian])
  	     || ([istarget s390*-*-*]
  		 && [check_effective_target_s390_vx])
*************** proc check_effective_target_vect_conditi
*** 9582,9589 ****
  	     || [check_effective_target_x86]
  	     || ([istarget mips*-*-*]
  		 && [et-is-effective-target mips_msa])
! 	     || ([istarget arm*-*-*]
! 		 && [check_effective_target_arm_neon_ok])
  	     || ([istarget s390*-*-*]
  		 && [check_effective_target_s390_vx])
  	     || [istarget amdgcn-*-*]
--- 9578,9584 ----
  	     || [check_effective_target_x86]
  	     || ([istarget mips*-*-*]
  		 && [et-is-effective-target mips_msa])
! 	     || [check_effective_target_arm_neon_ok]
  	     || ([istarget s390*-*-*]
  		 && [check_effective_target_s390_vx])
  	     || [istarget amdgcn-*-*]
*************** proc check_effective_target_vect_cond_mi
*** 9601,9608 ****
        expr { [check_effective_target_x86]
  	     || [istarget aarch64*-*-*]
  	     || [istarget powerpc*-*-*]
! 	     || ([istarget arm*-*-*]
! 		 && [check_effective_target_arm_neon_ok])
  	     || ([istarget mips*-*-*]
  		 && [et-is-effective-target mips_msa])
  	     || ([istarget s390*-*-*]
--- 9596,9602 ----
        expr { [check_effective_target_x86]
  	     || [istarget aarch64*-*-*]
  	     || [istarget powerpc*-*-*]
! 	     || [check_effective_target_arm_neon_ok]
  	     || ([istarget mips*-*-*]
  		 && [et-is-effective-target mips_msa])
  	     || ([istarget s390*-*-*]
*************** proc available_vector_sizes { } {
*** 9783,9790 ****
  	    lappend result [aarch64_sve_bits]
  	}
  	lappend result 128 64
!     } elseif { [istarget arm*-*-*]
! 		&& [check_effective_target_arm_neon_ok] } {
  	lappend result 128 64
      } elseif { [check_effective_target_x86] } {
  	if { [check_avx_available] && ![check_prefer_avx128] } {
--- 9777,9783 ----
  	    lappend result [aarch64_sve_bits]
  	}
  	lappend result 128 64
!     } elseif { [check_effective_target_arm_neon_ok] } {
  	lappend result 128 64
      } elseif { [check_effective_target_x86] } {
  	if { [check_avx_available] && ![check_prefer_avx128] } {
diff -Nrcpad gcc-16-20250831/gcc/tree-cfg.cc gcc-16-20250907/gcc/tree-cfg.cc
*** gcc-16-20250831/gcc/tree-cfg.cc	Sun Aug 31 22:33:22 2025
--- gcc-16-20250907/gcc/tree-cfg.cc	Sun Sep  7 22:34:53 2025
*************** struct discrim_entry
*** 1095,1104 ****
  
  location_t
  assign_discriminator (location_t loc, unsigned int bb_id,
! 		      hash_map<int_hash <int64_t, -1, -2>, discrim_entry> &map)
  {
    bool existed;
!   discrim_entry &e = map.get_or_insert (LOCATION_LINE (loc), &existed);
    gcc_checking_assert (!has_discriminator (loc));
    if (!existed)
      {
--- 1095,1108 ----
  
  location_t
  assign_discriminator (location_t loc, unsigned int bb_id,
! 		      hash_map<int_hash <unsigned, -1U, -2U>,
! 			       discrim_entry> &map)
  {
    bool existed;
!   if ((unsigned) LOCATION_LINE (loc) >= -2U)
!     return loc;
!   discrim_entry &e
!     = map.get_or_insert ((unsigned) LOCATION_LINE (loc), &existed);
    gcc_checking_assert (!has_discriminator (loc));
    if (!existed)
      {
*************** assign_discriminator (location_t loc, un
*** 1121,1127 ****
  static void
  assign_discriminators (void)
  {
!   hash_map<int_hash <int64_t, -1, -2>, discrim_entry> map (13);
    unsigned int bb_id = 0;
    basic_block bb;
    FOR_EACH_BB_FN (bb, cfun)
--- 1125,1131 ----
  static void
  assign_discriminators (void)
  {
!   hash_map<int_hash <unsigned, -1U, -2U>, discrim_entry> map (13);
    unsigned int bb_id = 0;
    basic_block bb;
    FOR_EACH_BB_FN (bb, cfun)
diff -Nrcpad gcc-16-20250831/gcc/tree-eh.cc gcc-16-20250907/gcc/tree-eh.cc
*** gcc-16-20250831/gcc/tree-eh.cc	Sun Aug 31 22:33:22 2025
--- gcc-16-20250907/gcc/tree-eh.cc	Sun Sep  7 22:34:53 2025
*************** access_in_bounds_of_type_p (tree type, p
*** 2674,2679 ****
--- 2674,2698 ----
    return true;
  }
  
+ /* Return whether an access at [off, refsz[ to an object spanning [0, size[
+    accesses storage outside of the object.  */
+ 
+ static bool
+ ref_outside_object_p (tree size, poly_offset_int off, tree refsz)
+ {
+   if (size == NULL_TREE
+       || refsz == NULL_TREE
+       || !poly_int_tree_p (size)
+       || !poly_int_tree_p (refsz)
+       || maybe_le (wi::to_poly_offset (size), off)
+       || maybe_gt (off + wi::to_poly_offset (refsz),
+ 		   wi::to_poly_offset (size)))
+     return true;
+   /* Now we are sure the whole base of the access is inside
+      the object.  */
+   return false;
+ }
+ 
  /* Return true if EXPR can trap, as in dereferencing an invalid pointer
     location or floating point arithmetic.  C.f. the rtl version, may_trap_p.
     This routine expects only GIMPLE lhs or rhs input.  */
*************** tree_could_trap_p (tree expr)
*** 2771,2787 ****
  	    return maybe_le (TREE_STRING_LENGTH (base), off);
  	  tree size = DECL_SIZE_UNIT (base);
  	  tree refsz = TYPE_SIZE_UNIT (TREE_TYPE (expr));
! 	  if (size == NULL_TREE
! 	      || refsz == NULL_TREE
! 	      || !poly_int_tree_p (size)
! 	      || !poly_int_tree_p (refsz)
! 	      || maybe_le (wi::to_poly_offset (size), off)
! 	      || maybe_gt (off + wi::to_poly_offset (refsz),
! 			   wi::to_poly_offset (size)))
  	    return true;
! 	  /* Now we are sure the whole base of the access is inside
! 	     the object.  */
! 	  return false;
  	}
        return true;
  
--- 2790,2812 ----
  	    return maybe_le (TREE_STRING_LENGTH (base), off);
  	  tree size = DECL_SIZE_UNIT (base);
  	  tree refsz = TYPE_SIZE_UNIT (TREE_TYPE (expr));
! 	  return ref_outside_object_p (size, off, refsz);
! 	}
!       if (cfun
! 	  && TREE_CODE (TREE_TYPE (cfun->decl)) == METHOD_TYPE
! 	  && ((TREE_CODE (TREE_OPERAND (expr, 0)) == SSA_NAME
! 	       && SSA_NAME_IS_DEFAULT_DEF (TREE_OPERAND (expr, 0))
! 	       && (SSA_NAME_VAR (TREE_OPERAND (expr, 0))
! 		   == DECL_ARGUMENTS (cfun->decl)))
! 	      || TREE_OPERAND (expr, 0) == DECL_ARGUMENTS (cfun->decl)))
! 	{
! 	  poly_offset_int off = mem_ref_offset (expr);
! 	  if (maybe_lt (off, 0))
  	    return true;
! 	  tree size = TYPE_SIZE_UNIT
! 			(TYPE_METHOD_BASETYPE (TREE_TYPE (cfun->decl)));
! 	  tree refsz = TYPE_SIZE_UNIT (TREE_TYPE (expr));
! 	  return ref_outside_object_p (size, off, refsz);
  	}
        return true;
  
diff -Nrcpad gcc-16-20250831/gcc/tree-pass.h gcc-16-20250907/gcc/tree-pass.h
*** gcc-16-20250831/gcc/tree-pass.h	Sun Aug 31 22:33:22 2025
--- gcc-16-20250907/gcc/tree-pass.h	Sun Sep  7 22:34:53 2025
*************** extern rtl_opt_pass *make_pass_value_pro
*** 625,630 ****
--- 625,631 ----
  							      *ctxt);
  extern rtl_opt_pass *make_pass_postreload_cse (gcc::context *ctxt);
  extern rtl_opt_pass *make_pass_late_combine (gcc::context *ctxt);
+ extern rtl_opt_pass *make_pass_dep_fusion (gcc::context *ctxt);
  extern rtl_opt_pass *make_pass_gcse2 (gcc::context *ctxt);
  extern rtl_opt_pass *make_pass_split_after_reload (gcc::context *ctxt);
  extern rtl_opt_pass *make_pass_thread_prologue_and_epilogue (gcc::context
diff -Nrcpad gcc-16-20250831/gcc/tree-scalar-evolution.cc gcc-16-20250907/gcc/tree-scalar-evolution.cc
*** gcc-16-20250831/gcc/tree-scalar-evolution.cc	Sun Aug 31 22:33:22 2025
--- gcc-16-20250907/gcc/tree-scalar-evolution.cc	Sun Sep  7 22:34:53 2025
*************** simplify_peeled_chrec (class loop *loop,
*** 1354,1360 ****
    hash_map<tree, name_expansion *> *peeled_chrec_map = NULL;
  
    ev = instantiate_parameters (loop, analyze_scalar_evolution (loop, arg));
!   if (ev == NULL_TREE || TREE_CODE (ev) != POLYNOMIAL_CHREC)
      return chrec_dont_know;
  
    left = CHREC_LEFT (ev);
--- 1354,1390 ----
    hash_map<tree, name_expansion *> *peeled_chrec_map = NULL;
  
    ev = instantiate_parameters (loop, analyze_scalar_evolution (loop, arg));
!   if (ev == NULL_TREE)
!     return chrec_dont_know;
! 
!   /* Support the case where we can derive the original CHREC from the
!      peeled one if that's a converted other IV.  This can be done
!      when the original unpeeled converted IV does not overflow and
!      has the same initial value.  */
!   if (CONVERT_EXPR_P (ev)
!       && TREE_CODE (init_cond) == INTEGER_CST
!       && TREE_CODE (TREE_OPERAND (ev, 0)) == POLYNOMIAL_CHREC
!       && (TYPE_PRECISION (TREE_TYPE (ev))
! 	  > TYPE_PRECISION (TREE_TYPE (TREE_OPERAND (ev, 0))))
!       && (!TYPE_UNSIGNED (TREE_TYPE (ev))
! 	  || TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (ev, 0)))))
!     {
!       left = CHREC_LEFT (TREE_OPERAND (ev, 0));
!       right = CHREC_RIGHT (TREE_OPERAND (ev, 0));
!       tree left_before = chrec_fold_minus (TREE_TYPE (TREE_OPERAND (ev, 0)),
! 					   left, right);
!       if (TREE_CODE (left_before) == INTEGER_CST
! 	  && wi::to_widest (init_cond) == wi::to_widest (left_before)
! 	  && !scev_probably_wraps_p (NULL_TREE, left_before, right, NULL,
! 				     loop, false))
! 	return build_polynomial_chrec (loop->num, init_cond,
! 				       chrec_convert (TREE_TYPE (ev),
! 						      right, NULL,
! 						      false, NULL_TREE));
!       return chrec_dont_know;
!     }
! 
!   if (TREE_CODE (ev) != POLYNOMIAL_CHREC)
      return chrec_dont_know;
  
    left = CHREC_LEFT (ev);
diff -Nrcpad gcc-16-20250831/gcc/tree-ssa-ccp.cc gcc-16-20250907/gcc/tree-ssa-ccp.cc
*** gcc-16-20250831/gcc/tree-ssa-ccp.cc	Sun Aug 31 22:33:23 2025
--- gcc-16-20250907/gcc/tree-ssa-ccp.cc	Sun Sep  7 22:34:53 2025
*************** along with GCC; see the file COPYING3.
*** 155,160 ****
--- 155,161 ----
  #include "ipa-prop.h"
  #include "internal-fn.h"
  #include "gimple-range.h"
+ #include "tree-ssa-strlen.h"
  
  /* Possible lattice values.  */
  typedef enum
*************** public:
*** 4221,4226 ****
--- 4222,4257 ----
  
  }; // class pass_fold_builtins
  
+ /* Optimize memcmp STMT into memcmp_eq if it is only used with
+    `== 0` or `!= 0`. */
+ 
+ static void
+ optimize_memcmp_eq (gcall *stmt)
+ {
+   /* Make sure memcmp arguments are the correct type.  */
+   if (gimple_call_num_args (stmt) != 3)
+     return;
+   tree arg1 = gimple_call_arg (stmt, 0);
+   tree arg2 = gimple_call_arg (stmt, 1);
+   tree len = gimple_call_arg (stmt, 2);
+ 
+   if (!POINTER_TYPE_P (TREE_TYPE (arg1)))
+     return;
+   if (!POINTER_TYPE_P (TREE_TYPE (arg2)))
+     return;
+   if (!INTEGRAL_TYPE_P (TREE_TYPE (len)))
+     return;
+   /* The return value of the memcmp has to be used
+      equality comparison to zero. */
+   tree res = gimple_call_lhs (stmt);
+ 
+   if (!res || !use_in_zero_equality (res))
+     return;
+ 
+   gimple_call_set_fndecl (stmt, builtin_decl_explicit (BUILT_IN_MEMCMP_EQ));
+   update_stmt (stmt);
+ }
+ 
  unsigned int
  pass_fold_builtins::execute (function *fun)
  {
*************** pass_fold_builtins::execute (function *f
*** 4285,4290 ****
--- 4316,4325 ----
  		  gsi_next (&i);
  		  continue;
  
+ 		case BUILT_IN_MEMCMP:
+ 		  optimize_memcmp_eq (as_a<gcall*>(stmt));
+ 		  break;
+ 
  		case BUILT_IN_UNREACHABLE:
  		  if (optimize_unreachable (i))
  		    cfg_changed = true;
diff -Nrcpad gcc-16-20250831/gcc/tree-ssa-forwprop.cc gcc-16-20250907/gcc/tree-ssa-forwprop.cc
*** gcc-16-20250831/gcc/tree-ssa-forwprop.cc	Sun Aug 31 22:33:23 2025
--- gcc-16-20250907/gcc/tree-ssa-forwprop.cc	Sun Sep  7 22:34:53 2025
*************** optimize_agr_copyprop_1 (gimple *stmt, g
*** 1455,1461 ****
       */
    if (!operand_equal_p (dest2, src, 0)
        && !DECL_P (dest2) && !DECL_P (src))
!     return false;
  
    if (dump_file && (dump_flags & TDF_DETAILS))
      {
--- 1455,1502 ----
       */
    if (!operand_equal_p (dest2, src, 0)
        && !DECL_P (dest2) && !DECL_P (src))
!     {
!       /* If *a and *b have the same base see if
! 	 the offset between the two is greater than
! 	 or equal to the size of the type. */
!       poly_int64 offset1, offset2;
!       tree len = TYPE_SIZE_UNIT (TREE_TYPE (src));
!       if (len == NULL_TREE
! 	  || !tree_fits_poly_int64_p (len))
! 	return false;
!       tree base1 = get_addr_base_and_unit_offset (dest2, &offset1);
!       tree base2 = get_addr_base_and_unit_offset (src, &offset2);
!       poly_int64 size = tree_to_poly_int64 (len);
!       /* If the bases are 2 different decls,
! 	 then there can be no overlapping.  */
!       if (base1 && base2
! 	  && DECL_P (base1) && DECL_P (base2)
! 	  && base1 != base2)
! 	;
!       /* If we can't figure out the base or the bases are
! 	 not equal then fall back to an alignment check.  */
!       else if (!base1
! 	       || !base2
! 	       || !operand_equal_p (base1, base2))
! 	{
! 	  unsigned int align1 = get_object_alignment (src);
! 	  unsigned int align2 = get_object_alignment (dest2);
! 	  align1 /= BITS_PER_UNIT;
! 	  align2 /= BITS_PER_UNIT;
! 	  /* If the alignment of either object is less
! 	     than the size then there is a possibility
! 	     of overlapping.  */
! 	  if (maybe_lt (align1, size)
! 	      || maybe_lt (align2, size))
! 	    return false;
! 	}
!       /* Make sure [offset1, offset1 + len - 1] does
! 	 not overlap with [offset2, offset2 + len - 1],
! 	 it is ok if they are at the same location though.  */
!       else if (ranges_maybe_overlap_p (offset1, size, offset2, size)
! 	  && !known_eq (offset2, offset1))
! 	return false;
!     }
  
    if (dump_file && (dump_flags & TDF_DETAILS))
      {
*************** simplify_builtin_memcmp (gimple_stmt_ite
*** 1618,1625 ****
  	  tree ptrtype = build_pointer_type_for_mode (char_type_node,
  						      ptr_mode, true);
  	  off = build_int_cst (ptrtype, 0);
! 	  arg1 = build2_loc (loc, MEM_REF, type, arg1, off);
! 	  arg2 = build2_loc (loc, MEM_REF, type, arg2, off);
  	  tree tem1 = fold_const_aggregate_ref (arg1);
  	  if (tem1)
  	    arg1 = tem1;
--- 1659,1674 ----
  	  tree ptrtype = build_pointer_type_for_mode (char_type_node,
  						      ptr_mode, true);
  	  off = build_int_cst (ptrtype, 0);
! 
! 	  /* Create unaligned types if needed. */
! 	  tree type1 = type, type2 = type;
! 	  if (TYPE_ALIGN (type1) > align1)
! 	    type1 = build_aligned_type (type1, align1);
! 	  if (TYPE_ALIGN (type2) > align2)
! 	    type2 = build_aligned_type (type2, align2);
! 
! 	  arg1 = build2_loc (loc, MEM_REF, type1, arg1, off);
! 	  arg2 = build2_loc (loc, MEM_REF, type2, arg2, off);
  	  tree tem1 = fold_const_aggregate_ref (arg1);
  	  if (tem1)
  	    arg1 = tem1;
*************** simplify_builtin_memcmp (gimple_stmt_ite
*** 1637,1642 ****
--- 1686,1970 ----
    return false;
  }
  
+ /* Optimizes builtin memchrs for small constant sizes with a const string.
+    GSI_P is the GSI for the call. STMT is the call itself.
+    */
+ 
+ static bool
+ simplify_builtin_memchr (gimple_stmt_iterator *gsi_p, gcall *stmt)
+ {
+   if (CHAR_BIT != 8 || BITS_PER_UNIT != 8)
+     return false;
+ 
+   if (gimple_call_num_args (stmt) != 3)
+     return false;
+ 
+   tree res = gimple_call_lhs (stmt);
+   if (!res || !use_in_zero_equality (res))
+     return false;
+ 
+   tree ptr = gimple_call_arg (stmt, 0);
+   if (TREE_CODE (ptr) != ADDR_EXPR
+       || TREE_CODE (TREE_OPERAND (ptr, 0)) != STRING_CST)
+     return false;
+ 
+   unsigned HOST_WIDE_INT slen
+     = TREE_STRING_LENGTH (TREE_OPERAND (ptr, 0));
+   /* It must be a non-empty string constant.  */
+   if (slen < 2)
+     return false;
+ 
+   /* For -Os, only simplify strings with a single character.  */
+   if (!optimize_bb_for_speed_p (gimple_bb (stmt))
+       && slen > 2)
+     return false;
+ 
+   tree size = gimple_call_arg (stmt, 2);
+   /* Size must be a constant which is <= UNITS_PER_WORD and
+      <= the string length.  */
+   if (!tree_fits_uhwi_p (size))
+     return false;
+ 
+   unsigned HOST_WIDE_INT sz = tree_to_uhwi (size);
+   if (sz == 0 || sz > UNITS_PER_WORD || sz >= slen)
+     return false;
+ 
+   tree ch = gimple_call_arg (stmt, 1);
+   location_t loc = gimple_location (stmt);
+   if (!useless_type_conversion_p (char_type_node,
+ 				  TREE_TYPE (ch)))
+     ch = fold_convert_loc (loc, char_type_node, ch);
+   const char *p = TREE_STRING_POINTER (TREE_OPERAND (ptr, 0));
+   unsigned int isize = sz;
+   tree *op = XALLOCAVEC (tree, isize);
+   for (unsigned int i = 0; i < isize; i++)
+     {
+       op[i] = build_int_cst (char_type_node, p[i]);
+       op[i] = fold_build2_loc (loc, EQ_EXPR, boolean_type_node,
+ 			       op[i], ch);
+     }
+   for (unsigned int i = isize - 1; i >= 1; i--)
+     op[i - 1] = fold_convert_loc (loc, boolean_type_node,
+ 				  fold_build2_loc (loc,
+ 						   BIT_IOR_EXPR,
+ 						   boolean_type_node,
+ 						   op[i - 1],
+ 						   op[i]));
+   res = fold_convert_loc (loc, TREE_TYPE (res), op[0]);
+   gimplify_and_update_call_from_tree (gsi_p, res);
+   return true;
+ }
+ 
+ /* *GSI_P is a GIMPLE_CALL to a builtin function.
+    Optimize
+    memcpy (p, "abcd", 4); // STMT1
+    memset (p + 4, ' ', 3); // STMT2
+    into
+    memcpy (p, "abcd   ", 7);
+    call if the latter can be stored by pieces during expansion.
+ */
+ 
+ static bool
+ simplify_builtin_memcpy_memset (gimple_stmt_iterator *gsi_p, gcall *stmt2)
+ {
+   if (gimple_call_num_args (stmt2) != 3
+       || gimple_call_lhs (stmt2)
+       || CHAR_BIT != 8
+       || BITS_PER_UNIT != 8)
+     return false;
+ 
+   tree vuse = gimple_vuse (stmt2);
+   if (vuse == NULL)
+     return false;
+   gimple *stmt1 = SSA_NAME_DEF_STMT (vuse);
+ 
+   tree callee1;
+   tree ptr1, src1, str1, off1, len1, lhs1;
+   tree ptr2 = gimple_call_arg (stmt2, 0);
+   tree val2 = gimple_call_arg (stmt2, 1);
+   tree len2 = gimple_call_arg (stmt2, 2);
+   tree diff, vdef, new_str_cst;
+   gimple *use_stmt;
+   unsigned int ptr1_align;
+   unsigned HOST_WIDE_INT src_len;
+   char *src_buf;
+   use_operand_p use_p;
+ 
+   if (!tree_fits_shwi_p (val2)
+       || !tree_fits_uhwi_p (len2)
+       || compare_tree_int (len2, 1024) == 1)
+     return false;
+ 
+   if (is_gimple_call (stmt1))
+     {
+       /* If first stmt is a call, it needs to be memcpy
+ 	 or mempcpy, with string literal as second argument and
+ 	 constant length.  */
+       callee1 = gimple_call_fndecl (stmt1);
+       if (callee1 == NULL_TREE
+ 	  || !fndecl_built_in_p (callee1, BUILT_IN_NORMAL)
+ 	  || gimple_call_num_args (stmt1) != 3)
+ 	return false;
+       if (DECL_FUNCTION_CODE (callee1) != BUILT_IN_MEMCPY
+ 	  && DECL_FUNCTION_CODE (callee1) != BUILT_IN_MEMPCPY)
+ 	return false;
+       ptr1 = gimple_call_arg (stmt1, 0);
+       src1 = gimple_call_arg (stmt1, 1);
+       len1 = gimple_call_arg (stmt1, 2);
+       lhs1 = gimple_call_lhs (stmt1);
+       if (!tree_fits_uhwi_p (len1))
+ 	return false;
+       str1 = string_constant (src1, &off1, NULL, NULL);
+       if (str1 == NULL_TREE)
+ 	return false;
+       if (!tree_fits_uhwi_p (off1)
+ 	  || compare_tree_int (off1, TREE_STRING_LENGTH (str1) - 1) > 0
+ 	  || compare_tree_int (len1, TREE_STRING_LENGTH (str1)
+ 				     - tree_to_uhwi (off1)) > 0
+ 	  || TREE_CODE (TREE_TYPE (str1)) != ARRAY_TYPE
+ 	  || TYPE_MODE (TREE_TYPE (TREE_TYPE (str1)))
+ 	     != TYPE_MODE (char_type_node))
+ 	return false;
+     }
+   else if (gimple_assign_single_p (stmt1))
+     {
+       /* Otherwise look for length 1 memcpy optimized into
+ 	 assignment.  */
+       ptr1 = gimple_assign_lhs (stmt1);
+       src1 = gimple_assign_rhs1 (stmt1);
+       if (TREE_CODE (ptr1) != MEM_REF
+ 	  || TYPE_MODE (TREE_TYPE (ptr1)) != TYPE_MODE (char_type_node)
+ 	  || !tree_fits_shwi_p (src1))
+ 	return false;
+       ptr1 = build_fold_addr_expr (ptr1);
+       STRIP_USELESS_TYPE_CONVERSION (ptr1);
+       callee1 = NULL_TREE;
+       len1 = size_one_node;
+       lhs1 = NULL_TREE;
+       off1 = size_zero_node;
+       str1 = NULL_TREE;
+     }
+   else
+     return false;
+ 
+   diff = constant_pointer_difference (ptr1, ptr2);
+   if (diff == NULL && lhs1 != NULL)
+     {
+       diff = constant_pointer_difference (lhs1, ptr2);
+       if (DECL_FUNCTION_CODE (callee1) == BUILT_IN_MEMPCPY
+ 	  && diff != NULL)
+ 	diff = size_binop (PLUS_EXPR, diff,
+ 			   fold_convert (sizetype, len1));
+     }
+   /* If the difference between the second and first destination pointer
+      is not constant, or is bigger than memcpy length, bail out.  */
+   if (diff == NULL
+       || !tree_fits_uhwi_p (diff)
+       || tree_int_cst_lt (len1, diff)
+       || compare_tree_int (diff, 1024) == 1)
+     return false;
+ 
+   /* Use maximum of difference plus memset length and memcpy length
+      as the new memcpy length, if it is too big, bail out.  */
+   src_len = tree_to_uhwi (diff);
+   src_len += tree_to_uhwi (len2);
+   if (src_len < tree_to_uhwi (len1))
+     src_len = tree_to_uhwi (len1);
+   if (src_len > 1024)
+     return false;
+ 
+   /* If mempcpy value is used elsewhere, bail out, as mempcpy
+      with bigger length will return different result.  */
+   if (lhs1 != NULL_TREE
+       && DECL_FUNCTION_CODE (callee1) == BUILT_IN_MEMPCPY
+       && (TREE_CODE (lhs1) != SSA_NAME
+ 	  || !single_imm_use (lhs1, &use_p, &use_stmt)
+ 	  || use_stmt != stmt2))
+     return false;
+ 
+   /* If anything reads memory in between memcpy and memset
+      call, the modified memcpy call might change it.  */
+   vdef = gimple_vdef (stmt1);
+   if (vdef != NULL
+       && (!single_imm_use (vdef, &use_p, &use_stmt)
+ 	  || use_stmt != stmt2))
+     return false;
+ 
+   ptr1_align = get_pointer_alignment (ptr1);
+   /* Construct the new source string literal.  */
+   src_buf = XALLOCAVEC (char, src_len + 1);
+   if (callee1)
+     memcpy (src_buf,
+ 	    TREE_STRING_POINTER (str1) + tree_to_uhwi (off1),
+ 	    tree_to_uhwi (len1));
+   else
+     src_buf[0] = tree_to_shwi (src1);
+   memset (src_buf + tree_to_uhwi (diff),
+ 	  tree_to_shwi (val2), tree_to_uhwi (len2));
+   src_buf[src_len] = '\0';
+   /* Neither builtin_strncpy_read_str nor builtin_memcpy_read_str
+      handle embedded '\0's.  */
+   if (strlen (src_buf) != src_len)
+     return false;
+   rtl_profile_for_bb (gimple_bb (stmt2));
+   /* If the new memcpy wouldn't be emitted by storing the literal
+      by pieces, this optimization might enlarge .rodata too much,
+      as commonly used string literals couldn't be shared any
+      longer.  */
+   if (!can_store_by_pieces (src_len,
+ 			    builtin_strncpy_read_str,
+ 			    src_buf, ptr1_align, false))
+     return false;
+ 
+   new_str_cst = build_string_literal (src_len, src_buf);
+   if (callee1)
+     {
+       /* If STMT1 is a mem{,p}cpy call, adjust it and remove
+ 	 memset call.  */
+       if (lhs1 && DECL_FUNCTION_CODE (callee1) == BUILT_IN_MEMPCPY)
+ 	gimple_call_set_lhs (stmt1, NULL_TREE);
+       gimple_call_set_arg (stmt1, 1, new_str_cst);
+       gimple_call_set_arg (stmt1, 2,
+ 			   build_int_cst (TREE_TYPE (len1), src_len));
+       update_stmt (stmt1);
+       unlink_stmt_vdef (stmt2);
+       gsi_replace (gsi_p, gimple_build_nop (), false);
+       fwprop_invalidate_lattice (gimple_get_lhs (stmt2));
+       release_defs (stmt2);
+       if (lhs1 && DECL_FUNCTION_CODE (callee1) == BUILT_IN_MEMPCPY)
+ 	{
+ 	  fwprop_invalidate_lattice (lhs1);
+ 	  release_ssa_name (lhs1);
+ 	}
+       return true;
+     }
+   else
+     {
+       /* Otherwise, if STMT1 is length 1 memcpy optimized into
+ 	 assignment, remove STMT1 and change memset call into
+ 	 memcpy call.  */
+       gimple_stmt_iterator gsi = gsi_for_stmt (stmt1);
+ 
+       if (!is_gimple_val (ptr1))
+ 	ptr1 = force_gimple_operand_gsi (gsi_p, ptr1, true, NULL_TREE,
+ 					 true, GSI_SAME_STMT);
+       tree fndecl = builtin_decl_explicit (BUILT_IN_MEMCPY);
+       gimple_call_set_fndecl (stmt2, fndecl);
+       gimple_call_set_fntype (stmt2,
+ 			      TREE_TYPE (fndecl));
+       gimple_call_set_arg (stmt2, 0, ptr1);
+       gimple_call_set_arg (stmt2, 1, new_str_cst);
+       gimple_call_set_arg (stmt2, 2,
+ 			   build_int_cst (TREE_TYPE (len2), src_len));
+       unlink_stmt_vdef (stmt1);
+       gsi_remove (&gsi, true);
+       fwprop_invalidate_lattice (gimple_get_lhs (stmt1));
+       release_defs (stmt1);
+       update_stmt (stmt2);
+       return false;
+     }
+ }
+ 
  /* *GSI_P is a GIMPLE_CALL to a builtin function.
     Optimize
     memcpy (p, "abcd", 4);
*************** simplify_builtin_memcmp (gimple_stmt_ite
*** 1662,1676 ****
  static bool
  simplify_builtin_call (gimple_stmt_iterator *gsi_p, tree callee2, bool full_walk)
  {
!   gimple *stmt1, *stmt2 = gsi_stmt (*gsi_p);
    enum built_in_function other_atomic = END_BUILTINS;
    enum tree_code atomic_op = ERROR_MARK;
-   tree vuse = gimple_vuse (stmt2);
-   if (vuse == NULL)
-     return false;
-   stmt1 = SSA_NAME_DEF_STMT (vuse);
- 
-   tree res;
  
    switch (DECL_FUNCTION_CODE (callee2))
      {
--- 1990,1998 ----
  static bool
  simplify_builtin_call (gimple_stmt_iterator *gsi_p, tree callee2, bool full_walk)
  {
!   gimple *stmt2 = gsi_stmt (*gsi_p);
    enum built_in_function other_atomic = END_BUILTINS;
    enum tree_code atomic_op = ERROR_MARK;
  
    switch (DECL_FUNCTION_CODE (callee2))
      {
*************** simplify_builtin_call (gimple_stmt_itera
*** 1678,1741 ****
      case BUILT_IN_MEMCMP_EQ:
        return simplify_builtin_memcmp (gsi_p, as_a<gcall*>(stmt2));
      case BUILT_IN_MEMCHR:
!       if (gimple_call_num_args (stmt2) == 3
! 	  && (res = gimple_call_lhs (stmt2)) != nullptr
! 	  && use_in_zero_equality (res) != nullptr
! 	  && CHAR_BIT == 8
! 	  && BITS_PER_UNIT == 8)
! 	{
! 	  tree ptr = gimple_call_arg (stmt2, 0);
! 	  if (TREE_CODE (ptr) != ADDR_EXPR
! 	      || TREE_CODE (TREE_OPERAND (ptr, 0)) != STRING_CST)
! 	    break;
! 	  unsigned HOST_WIDE_INT slen
! 	    = TREE_STRING_LENGTH (TREE_OPERAND (ptr, 0));
! 	  /* It must be a non-empty string constant.  */
! 	  if (slen < 2)
! 	    break;
! 	  /* For -Os, only simplify strings with a single character.  */
! 	  if (!optimize_bb_for_speed_p (gimple_bb (stmt2))
! 	      && slen > 2)
! 	    break;
! 	  tree size = gimple_call_arg (stmt2, 2);
! 	  /* Size must be a constant which is <= UNITS_PER_WORD and
! 	     <= the string length.  */
! 	  if (TREE_CODE (size) != INTEGER_CST)
! 	    break;
! 
! 	  if (!tree_fits_uhwi_p (size))
! 	    break;
! 
! 	  unsigned HOST_WIDE_INT sz = tree_to_uhwi (size);
! 	  if (sz == 0 || sz > UNITS_PER_WORD || sz >= slen)
! 	    break;
! 
! 	  tree ch = gimple_call_arg (stmt2, 1);
! 	  location_t loc = gimple_location (stmt2);
! 	  if (!useless_type_conversion_p (char_type_node,
! 					  TREE_TYPE (ch)))
! 	    ch = fold_convert_loc (loc, char_type_node, ch);
! 	  const char *p = TREE_STRING_POINTER (TREE_OPERAND (ptr, 0));
! 	  unsigned int isize = sz;
! 	  tree *op = XALLOCAVEC (tree, isize);
! 	  for (unsigned int i = 0; i < isize; i++)
! 	    {
! 	      op[i] = build_int_cst (char_type_node, p[i]);
! 	      op[i] = fold_build2_loc (loc, EQ_EXPR, boolean_type_node,
! 				       op[i], ch);
! 	    }
! 	  for (unsigned int i = isize - 1; i >= 1; i--)
! 	    op[i - 1] = fold_convert_loc (loc, boolean_type_node,
! 					  fold_build2_loc (loc,
! 							   BIT_IOR_EXPR,
! 							   boolean_type_node,
! 							   op[i - 1],
! 							   op[i]));
! 	  res = fold_convert_loc (loc, TREE_TYPE (res), op[0]);
! 	  gimplify_and_update_call_from_tree (gsi_p, res);
! 	  return true;
! 	}
!       break;
  
      case BUILT_IN_MEMSET:
        if (gimple_call_num_args (stmt2) == 3)
--- 2000,2006 ----
      case BUILT_IN_MEMCMP_EQ:
        return simplify_builtin_memcmp (gsi_p, as_a<gcall*>(stmt2));
      case BUILT_IN_MEMCHR:
!       return simplify_builtin_memchr (gsi_p, as_a<gcall*>(stmt2));
  
      case BUILT_IN_MEMSET:
        if (gimple_call_num_args (stmt2) == 3)
*************** simplify_builtin_call (gimple_stmt_itera
*** 1745,1943 ****
  	  if (optimize_aggr_zeroprop (gsi_p, full_walk))
  	    return true;
  	}
!       if (gimple_call_num_args (stmt2) != 3
! 	  || gimple_call_lhs (stmt2)
! 	  || CHAR_BIT != 8
! 	  || BITS_PER_UNIT != 8)
! 	break;
!       else
! 	{
! 	  tree callee1;
! 	  tree ptr1, src1, str1, off1, len1, lhs1;
! 	  tree ptr2 = gimple_call_arg (stmt2, 0);
! 	  tree val2 = gimple_call_arg (stmt2, 1);
! 	  tree len2 = gimple_call_arg (stmt2, 2);
! 	  tree diff, vdef, new_str_cst;
! 	  gimple *use_stmt;
! 	  unsigned int ptr1_align;
! 	  unsigned HOST_WIDE_INT src_len;
! 	  char *src_buf;
! 	  use_operand_p use_p;
! 
! 	  if (!tree_fits_shwi_p (val2)
! 	      || !tree_fits_uhwi_p (len2)
! 	      || compare_tree_int (len2, 1024) == 1)
! 	    break;
! 	  if (is_gimple_call (stmt1))
! 	    {
! 	      /* If first stmt is a call, it needs to be memcpy
! 		 or mempcpy, with string literal as second argument and
! 		 constant length.  */
! 	      callee1 = gimple_call_fndecl (stmt1);
! 	      if (callee1 == NULL_TREE
! 		  || !fndecl_built_in_p (callee1, BUILT_IN_NORMAL)
! 		  || gimple_call_num_args (stmt1) != 3)
! 		break;
! 	      if (DECL_FUNCTION_CODE (callee1) != BUILT_IN_MEMCPY
! 		  && DECL_FUNCTION_CODE (callee1) != BUILT_IN_MEMPCPY)
! 		break;
! 	      ptr1 = gimple_call_arg (stmt1, 0);
! 	      src1 = gimple_call_arg (stmt1, 1);
! 	      len1 = gimple_call_arg (stmt1, 2);
! 	      lhs1 = gimple_call_lhs (stmt1);
! 	      if (!tree_fits_uhwi_p (len1))
! 		break;
! 	      str1 = string_constant (src1, &off1, NULL, NULL);
! 	      if (str1 == NULL_TREE)
! 		break;
! 	      if (!tree_fits_uhwi_p (off1)
! 		  || compare_tree_int (off1, TREE_STRING_LENGTH (str1) - 1) > 0
! 		  || compare_tree_int (len1, TREE_STRING_LENGTH (str1)
! 					     - tree_to_uhwi (off1)) > 0
! 		  || TREE_CODE (TREE_TYPE (str1)) != ARRAY_TYPE
! 		  || TYPE_MODE (TREE_TYPE (TREE_TYPE (str1)))
! 		     != TYPE_MODE (char_type_node))
! 		break;
! 	    }
! 	  else if (gimple_assign_single_p (stmt1))
! 	    {
! 	      /* Otherwise look for length 1 memcpy optimized into
! 		 assignment.  */
!     	      ptr1 = gimple_assign_lhs (stmt1);
! 	      src1 = gimple_assign_rhs1 (stmt1);
! 	      if (TREE_CODE (ptr1) != MEM_REF
! 		  || TYPE_MODE (TREE_TYPE (ptr1)) != TYPE_MODE (char_type_node)
! 		  || !tree_fits_shwi_p (src1))
! 		break;
! 	      ptr1 = build_fold_addr_expr (ptr1);
! 	      STRIP_USELESS_TYPE_CONVERSION (ptr1);
! 	      callee1 = NULL_TREE;
! 	      len1 = size_one_node;
! 	      lhs1 = NULL_TREE;
! 	      off1 = size_zero_node;
! 	      str1 = NULL_TREE;
! 	    }
! 	  else
! 	    break;
! 
! 	  diff = constant_pointer_difference (ptr1, ptr2);
! 	  if (diff == NULL && lhs1 != NULL)
! 	    {
! 	      diff = constant_pointer_difference (lhs1, ptr2);
! 	      if (DECL_FUNCTION_CODE (callee1) == BUILT_IN_MEMPCPY
! 		  && diff != NULL)
! 		diff = size_binop (PLUS_EXPR, diff,
! 				   fold_convert (sizetype, len1));
! 	    }
! 	  /* If the difference between the second and first destination pointer
! 	     is not constant, or is bigger than memcpy length, bail out.  */
! 	  if (diff == NULL
! 	      || !tree_fits_uhwi_p (diff)
! 	      || tree_int_cst_lt (len1, diff)
! 	      || compare_tree_int (diff, 1024) == 1)
! 	    break;
! 
! 	  /* Use maximum of difference plus memset length and memcpy length
! 	     as the new memcpy length, if it is too big, bail out.  */
! 	  src_len = tree_to_uhwi (diff);
! 	  src_len += tree_to_uhwi (len2);
! 	  if (src_len < tree_to_uhwi (len1))
! 	    src_len = tree_to_uhwi (len1);
! 	  if (src_len > 1024)
! 	    break;
! 
! 	  /* If mempcpy value is used elsewhere, bail out, as mempcpy
! 	     with bigger length will return different result.  */
! 	  if (lhs1 != NULL_TREE
! 	      && DECL_FUNCTION_CODE (callee1) == BUILT_IN_MEMPCPY
! 	      && (TREE_CODE (lhs1) != SSA_NAME
! 		  || !single_imm_use (lhs1, &use_p, &use_stmt)
! 		  || use_stmt != stmt2))
! 	    break;
! 
! 	  /* If anything reads memory in between memcpy and memset
! 	     call, the modified memcpy call might change it.  */
! 	  vdef = gimple_vdef (stmt1);
! 	  if (vdef != NULL
! 	      && (!single_imm_use (vdef, &use_p, &use_stmt)
! 		  || use_stmt != stmt2))
! 	    break;
! 
! 	  ptr1_align = get_pointer_alignment (ptr1);
! 	  /* Construct the new source string literal.  */
! 	  src_buf = XALLOCAVEC (char, src_len + 1);
! 	  if (callee1)
! 	    memcpy (src_buf,
! 		    TREE_STRING_POINTER (str1) + tree_to_uhwi (off1),
! 		    tree_to_uhwi (len1));
! 	  else
! 	    src_buf[0] = tree_to_shwi (src1);
! 	  memset (src_buf + tree_to_uhwi (diff),
! 		  tree_to_shwi (val2), tree_to_uhwi (len2));
! 	  src_buf[src_len] = '\0';
! 	  /* Neither builtin_strncpy_read_str nor builtin_memcpy_read_str
! 	     handle embedded '\0's.  */
! 	  if (strlen (src_buf) != src_len)
! 	    break;
! 	  rtl_profile_for_bb (gimple_bb (stmt2));
! 	  /* If the new memcpy wouldn't be emitted by storing the literal
! 	     by pieces, this optimization might enlarge .rodata too much,
! 	     as commonly used string literals couldn't be shared any
! 	     longer.  */
! 	  if (!can_store_by_pieces (src_len,
! 				    builtin_strncpy_read_str,
! 				    src_buf, ptr1_align, false))
! 	    break;
! 
! 	  new_str_cst = build_string_literal (src_len, src_buf);
! 	  if (callee1)
! 	    {
! 	      /* If STMT1 is a mem{,p}cpy call, adjust it and remove
! 		 memset call.  */
! 	      if (lhs1 && DECL_FUNCTION_CODE (callee1) == BUILT_IN_MEMPCPY)
! 		gimple_call_set_lhs (stmt1, NULL_TREE);
! 	      gimple_call_set_arg (stmt1, 1, new_str_cst);
! 	      gimple_call_set_arg (stmt1, 2,
! 				   build_int_cst (TREE_TYPE (len1), src_len));
! 	      update_stmt (stmt1);
! 	      unlink_stmt_vdef (stmt2);
! 	      gsi_replace (gsi_p, gimple_build_nop (), false);
! 	      fwprop_invalidate_lattice (gimple_get_lhs (stmt2));
! 	      release_defs (stmt2);
! 	      if (lhs1 && DECL_FUNCTION_CODE (callee1) == BUILT_IN_MEMPCPY)
! 		{
! 		  fwprop_invalidate_lattice (lhs1);
! 		  release_ssa_name (lhs1);
! 		}
! 	      return true;
! 	    }
! 	  else
! 	    {
! 	      /* Otherwise, if STMT1 is length 1 memcpy optimized into
! 		 assignment, remove STMT1 and change memset call into
! 		 memcpy call.  */
! 	      gimple_stmt_iterator gsi = gsi_for_stmt (stmt1);
! 
! 	      if (!is_gimple_val (ptr1))
! 		ptr1 = force_gimple_operand_gsi (gsi_p, ptr1, true, NULL_TREE,
! 						 true, GSI_SAME_STMT);
! 	      tree fndecl = builtin_decl_explicit (BUILT_IN_MEMCPY);
! 	      gimple_call_set_fndecl (stmt2, fndecl);
! 	      gimple_call_set_fntype (as_a <gcall *> (stmt2),
! 				      TREE_TYPE (fndecl));
! 	      gimple_call_set_arg (stmt2, 0, ptr1);
! 	      gimple_call_set_arg (stmt2, 1, new_str_cst);
! 	      gimple_call_set_arg (stmt2, 2,
! 				   build_int_cst (TREE_TYPE (len2), src_len));
! 	      unlink_stmt_vdef (stmt1);
! 	      gsi_remove (&gsi, true);
! 	      fwprop_invalidate_lattice (gimple_get_lhs (stmt1));
! 	      release_defs (stmt1);
! 	      update_stmt (stmt2);
! 	      return false;
! 	    }
! 	}
!       break;
  
   #define CASE_ATOMIC(NAME, OTHER, OP) \
      case BUILT_IN_##NAME##_1:						\
--- 2010,2016 ----
  	  if (optimize_aggr_zeroprop (gsi_p, full_walk))
  	    return true;
  	}
!       return simplify_builtin_memcpy_memset (gsi_p, as_a<gcall*>(stmt2));
  
   #define CASE_ATOMIC(NAME, OTHER, OP) \
      case BUILT_IN_##NAME##_1:						\
diff -Nrcpad gcc-16-20250831/gcc/tree-ssa-phiopt.cc gcc-16-20250907/gcc/tree-ssa-phiopt.cc
*** gcc-16-20250831/gcc/tree-ssa-phiopt.cc	Sun Aug 31 22:33:23 2025
--- gcc-16-20250907/gcc/tree-ssa-phiopt.cc	Sun Sep  7 22:34:53 2025
*************** factor_out_conditional_operation (edge e
*** 323,328 ****
--- 323,335 ----
  
    tree arg0 = gimple_phi_arg_def (phi, e0->dest_idx);
    tree arg1 = gimple_phi_arg_def (phi, e1->dest_idx);
+   location_t narg0_loc = gimple_location (phi);
+   location_t narg1_loc = gimple_location (phi);
+   if (gimple_phi_arg_location (phi, e0->dest_idx) != UNKNOWN_LOCATION)
+     narg0_loc = gimple_phi_arg_location (phi, e0->dest_idx);
+   if (gimple_phi_arg_location (phi, e1->dest_idx) != UNKNOWN_LOCATION)
+     narg1_loc = gimple_phi_arg_location (phi, e1->dest_idx);
+ 
    gcc_assert (arg0 != NULL_TREE && arg1 != NULL_TREE);
  
    /* Arugments that are the same don't have anything to be
*************** factor_out_conditional_operation (edge e
*** 365,370 ****
--- 372,379 ----
      return false;
    if (!is_factor_profitable (arg0_def_stmt, merge, new_arg0))
      return false;
+   if (gimple_has_location (arg0_def_stmt))
+     narg0_loc = gimple_location (arg0_def_stmt);
  
    if (TREE_CODE (arg1) == SSA_NAME)
      {
*************** factor_out_conditional_operation (edge e
*** 385,393 ****
  	return false;
  
        new_arg1 = arg1_op.ops[0];
- 
        if (!is_factor_profitable (arg1_def_stmt, merge, new_arg1))
  	return false;
      }
    else
      {
--- 394,414 ----
  	return false;
  
        new_arg1 = arg1_op.ops[0];
        if (!is_factor_profitable (arg1_def_stmt, merge, new_arg1))
  	return false;
+       if (gimple_has_location (arg1_def_stmt))
+ 	narg1_loc = gimple_location (arg1_def_stmt);
+ 
+       /* Chose the location for the new statement if the phi location is unknown.  */
+       if (locus == UNKNOWN_LOCATION)
+ 	{
+ 	  if (narg0_loc == UNKNOWN_LOCATION
+ 	      && narg1_loc != UNKNOWN_LOCATION)
+ 	    locus = narg1_loc;
+ 	  else if (narg0_loc != UNKNOWN_LOCATION
+ 		   && narg1_loc == UNKNOWN_LOCATION)
+ 	    locus = narg0_loc;
+ 	}
      }
    else
      {
*************** factor_out_conditional_operation (edge e
*** 472,477 ****
--- 493,502 ----
        /* Drop the overlow that fold_convert might add. */
        if (TREE_OVERFLOW (new_arg1))
  	new_arg1 = drop_tree_overflow (new_arg1);
+ 
+       /* The locus of the new statement is arg0 defining statement. */
+       if (gimple_has_location (arg0_def_stmt))
+ 	locus = gimple_location (arg0_def_stmt);
      }
  
    /* If types of new_arg0 and new_arg1 are different bailout.  */
*************** factor_out_conditional_operation (edge e
*** 497,502 ****
--- 522,529 ----
        return false;
      }
  
+   if (locus != UNKNOWN_LOCATION)
+     annotate_all_with_location (seq, locus);
    gsi = gsi_after_labels (gimple_bb (phi));
    gsi_insert_seq_before (&gsi, seq, GSI_CONTINUE_LINKING);
  
*************** factor_out_conditional_operation (edge e
*** 525,532 ****
        release_defs (arg1_def_stmt);
      }
  
!   add_phi_arg (newphi, new_arg0, e0, locus);
!   add_phi_arg (newphi, new_arg1, e1, locus);
  
    /* Remove the original PHI stmt.  */
    gsi = gsi_for_stmt (phi);
--- 552,559 ----
        release_defs (arg1_def_stmt);
      }
  
!   add_phi_arg (newphi, new_arg0, e0, narg0_loc);
!   add_phi_arg (newphi, new_arg1, e1, narg1_loc);
  
    /* Remove the original PHI stmt.  */
    gsi = gsi_for_stmt (phi);
diff -Nrcpad gcc-16-20250831/gcc/tree-ssa-sccvn.cc gcc-16-20250907/gcc/tree-ssa-sccvn.cc
*** gcc-16-20250831/gcc/tree-ssa-sccvn.cc	Sun Aug 31 22:33:23 2025
--- gcc-16-20250907/gcc/tree-ssa-sccvn.cc	Sun Sep  7 22:34:53 2025
*************** vn_reference_lookup_3 (ao_ref *ref, tree
*** 2810,2817 ****
  	 possible clobber.  In this case we can ignore the clobber
  	 and return the found value.  */
        if (!gimple_has_volatile_ops (def_stmt)
! 	  && is_gimple_reg_type (TREE_TYPE (lhs))
! 	  && types_compatible_p (TREE_TYPE (lhs), vr->type)
  	  && (ref->ref || data->orig_ref.ref)
  	  && !data->mask
  	  && data->partial_defs.is_empty ()
--- 2810,2820 ----
  	 possible clobber.  In this case we can ignore the clobber
  	 and return the found value.  */
        if (!gimple_has_volatile_ops (def_stmt)
! 	  && ((is_gimple_reg_type (TREE_TYPE (lhs))
! 	       && types_compatible_p (TREE_TYPE (lhs), vr->type)
! 	       && !storage_order_barrier_p (lhs)
! 	       && !reverse_storage_order_for_component_p (lhs))
! 	      || TREE_CODE (gimple_assign_rhs1 (def_stmt)) == CONSTRUCTOR)
  	  && (ref->ref || data->orig_ref.ref)
  	  && !data->mask
  	  && data->partial_defs.is_empty ()
*************** vn_reference_lookup_3 (ao_ref *ref, tree
*** 2820,2826 ****
--- 2823,2841 ----
  			   ref->size)
  	  && multiple_p (get_object_alignment (lhs), ref->size))
  	{
+ 	  HOST_WIDE_INT offset2i, size2i;
+ 	  poly_int64 offset = ref->offset;
+ 	  poly_int64 maxsize = ref->max_size;
+ 
+ 	  gcc_assert (lhs_ref_ok);
+ 	  tree base2 = ao_ref_base (&lhs_ref);
+ 	  poly_int64 offset2 = lhs_ref.offset;
+ 	  poly_int64 size2 = lhs_ref.size;
+ 	  poly_int64 maxsize2 = lhs_ref.max_size;
+ 
  	  tree rhs = gimple_assign_rhs1 (def_stmt);
+ 	  if (TREE_CODE (rhs) == CONSTRUCTOR)
+ 	    rhs = integer_zero_node;
  	  /* ???  We may not compare to ahead values which might be from
  	     a different loop iteration but only to loop invariants.  Use
  	     CONSTANT_CLASS_P (unvalueized!) as conservative approximation.
*************** vn_reference_lookup_3 (ao_ref *ref, tree
*** 2831,2836 ****
--- 2846,2865 ----
  	  if (data->same_val
  	      && !operand_equal_p (data->same_val, rhs))
  	    ;
+ 	  /* When this is a (partial) must-def, leave it to handling
+ 	     below in case we are interested in the value.  */
+ 	  else if (!(*disambiguate_only > TR_TRANSLATE)
+ 		   && base2
+ 		   && known_eq (maxsize2, size2)
+ 		   && adjust_offsets_for_equal_base_address (base, &offset,
+ 							     base2, &offset2)
+ 		   && offset2.is_constant (&offset2i)
+ 		   && size2.is_constant (&size2i)
+ 		   && maxsize.is_constant (&maxsizei)
+ 		   && offset.is_constant (&offseti)
+ 		   && ranges_known_overlap_p (offseti, maxsizei, offset2i,
+ 					      size2i))
+ 	    ;
  	  else if (CONSTANT_CLASS_P (rhs))
  	    {
  	      if (dump_file && (dump_flags & TDF_DETAILS))
diff -Nrcpad gcc-16-20250831/gcc/tree-ssa-sink.cc gcc-16-20250907/gcc/tree-ssa-sink.cc
*** gcc-16-20250831/gcc/tree-ssa-sink.cc	Sun Aug 31 22:33:23 2025
--- gcc-16-20250907/gcc/tree-ssa-sink.cc	Sun Sep  7 22:34:53 2025
*************** select_best_block (basic_block early_bb,
*** 245,250 ****
--- 245,256 ----
        else if (bb_loop_depth (temp_bb) > bb_loop_depth (best_bb))
  	;
  
+       /* Likewise an irreducible region inside an otherwise same loop
+ 	 depth.  */
+       else if ((temp_bb->flags & BB_IRREDUCIBLE_LOOP)
+ 	       && !(best_bb->flags & BB_IRREDUCIBLE_LOOP))
+ 	;
+ 
        /* But sink the least distance, if the new candidate on the same
  	 loop depth is post-dominated by the current best block pick
  	 the new candidate.  */
*************** select_best_block (basic_block early_bb,
*** 265,275 ****
      }
  
    gcc_checking_assert (best_bb == early_bb
! 		       || (!do_not_sink (stmt, early_bb, best_bb)
! 			   && ((bb_loop_depth (best_bb)
! 				< bb_loop_depth (early_bb))
! 			       || !dominated_by_p (CDI_POST_DOMINATORS,
! 						   early_bb, best_bb))));
  
    return best_bb;
  }
--- 271,277 ----
      }
  
    gcc_checking_assert (best_bb == early_bb
! 		       || !do_not_sink (stmt, early_bb, best_bb));
  
    return best_bb;
  }
*************** statement_sink_location (gimple *stmt, b
*** 500,506 ****
  	 operand update, requiring inserting of a PHI node.  */
        || (gimple_vdef (stmt)
  	  && bestbb != sinkbb
! 	  && !dominated_by_p (CDI_POST_DOMINATORS, bestbb, sinkbb)))
      return false;
  
    *togsi = gsi_after_labels (bestbb);
--- 502,511 ----
  	 operand update, requiring inserting of a PHI node.  */
        || (gimple_vdef (stmt)
  	  && bestbb != sinkbb
! 	  && !dominated_by_p (CDI_POST_DOMINATORS, bestbb, sinkbb))
!       /* Likewise avoid placing VDEFs into an irreducible region.  */
!       || (gimple_vdef (stmt)
! 	  && (bestbb->flags & BB_IRREDUCIBLE_LOOP)))
      return false;
  
    *togsi = gsi_after_labels (bestbb);
diff -Nrcpad gcc-16-20250831/gcc/tree-ssa-strlen.cc gcc-16-20250907/gcc/tree-ssa-strlen.cc
*** gcc-16-20250831/gcc/tree-ssa-strlen.cc	Sun Aug 31 22:33:23 2025
--- gcc-16-20250907/gcc/tree-ssa-strlen.cc	Sun Sep  7 22:34:53 2025
*************** use_in_zero_equality (tree res, bool exc
*** 3971,4035 ****
    return first_use;
  }
  
- /* Handle a call to memcmp.  We try to handle small comparisons by
-    converting them to load and compare, and replacing the call to memcmp
-    with a __builtin_memcmp_eq call where possible.
-    return true when call is transformed, return false otherwise.  */
- 
- bool
- strlen_pass::handle_builtin_memcmp ()
- {
-   gcall *stmt = as_a <gcall *> (gsi_stmt (m_gsi));
-   tree res = gimple_call_lhs (stmt);
- 
-   if (!res || !use_in_zero_equality (res))
-     return false;
- 
-   tree arg1 = gimple_call_arg (stmt, 0);
-   tree arg2 = gimple_call_arg (stmt, 1);
-   tree len = gimple_call_arg (stmt, 2);
-   unsigned HOST_WIDE_INT leni;
- 
-   if (tree_fits_uhwi_p (len)
-       && (leni = tree_to_uhwi (len)) <= GET_MODE_SIZE (word_mode)
-       && pow2p_hwi (leni))
-     {
-       leni *= CHAR_TYPE_SIZE;
-       unsigned align1 = get_pointer_alignment (arg1);
-       unsigned align2 = get_pointer_alignment (arg2);
-       unsigned align = MIN (align1, align2);
-       scalar_int_mode mode;
-       if (int_mode_for_size (leni, 1).exists (&mode)
- 	  && (align >= leni || !targetm.slow_unaligned_access (mode, align)))
- 	{
- 	  location_t loc = gimple_location (stmt);
- 	  tree type, off;
- 	  type = build_nonstandard_integer_type (leni, 1);
- 	  gcc_assert (known_eq (GET_MODE_BITSIZE (TYPE_MODE (type)), leni));
- 	  tree ptrtype = build_pointer_type_for_mode (char_type_node,
- 						      ptr_mode, true);
- 	  off = build_int_cst (ptrtype, 0);
- 	  arg1 = build2_loc (loc, MEM_REF, type, arg1, off);
- 	  arg2 = build2_loc (loc, MEM_REF, type, arg2, off);
- 	  tree tem1 = fold_const_aggregate_ref (arg1);
- 	  if (tem1)
- 	    arg1 = tem1;
- 	  tree tem2 = fold_const_aggregate_ref (arg2);
- 	  if (tem2)
- 	    arg2 = tem2;
- 	  res = fold_convert_loc (loc, TREE_TYPE (res),
- 				  fold_build2_loc (loc, NE_EXPR,
- 						   boolean_type_node,
- 						   arg1, arg2));
- 	  gimplify_and_update_call_from_tree (&m_gsi, res);
- 	  return true;
- 	}
-     }
- 
-   gimple_call_set_fndecl (stmt, builtin_decl_explicit (BUILT_IN_MEMCMP_EQ));
-   return true;
- }
- 
  /* Given strinfo IDX for ARG, sets LENRNG[] to the range of lengths
     of the string(s) referenced by ARG if it can be determined.
     If the length cannot be determined, sets *SIZE to the size of
--- 3971,3976 ----
*************** strlen_pass::check_and_optimize_call (bo
*** 5520,5529 ****
        if (handle_builtin_memset (zero_write))
  	return false;
        break;
-     case BUILT_IN_MEMCMP:
-       if (handle_builtin_memcmp ())
- 	return false;
-       break;
      case BUILT_IN_STRCMP:
      case BUILT_IN_STRNCMP:
        if (handle_builtin_string_cmp ())
--- 5461,5466 ----
diff -Nrcpad gcc-16-20250831/gcc/tree-vect-data-refs.cc gcc-16-20250907/gcc/tree-vect-data-refs.cc
*** gcc-16-20250831/gcc/tree-vect-data-refs.cc	Sun Aug 31 22:34:22 2025
--- gcc-16-20250907/gcc/tree-vect-data-refs.cc	Sun Sep  7 22:34:53 2025
*************** vect_describe_gather_scatter_call (stmt_
*** 4554,4565 ****
  }
  
  /* Return true if a non-affine read or write in STMT_INFO is suitable for a
!    gather load or scatter store.  Describe the operation in *INFO if so.
!    If it is suitable and ELSVALS is nonzero store the supported else values
!    in the vector it points to.  */
  
  bool
! vect_check_gather_scatter (stmt_vec_info stmt_info, loop_vec_info loop_vinfo,
  			   gather_scatter_info *info, vec<int> *elsvals)
  {
    HOST_WIDE_INT scale = 1;
--- 4554,4566 ----
  }
  
  /* Return true if a non-affine read or write in STMT_INFO is suitable for a
!    gather load or scatter store with VECTYPE.  Describe the operation in *INFO
!    if so.  If it is suitable and ELSVALS is nonzero store the supported else
!    values in the vector it points to.  */
  
  bool
! vect_check_gather_scatter (stmt_vec_info stmt_info, tree vectype,
! 			   loop_vec_info loop_vinfo,
  			   gather_scatter_info *info, vec<int> *elsvals)
  {
    HOST_WIDE_INT scale = 1;
*************** vect_check_gather_scatter (stmt_vec_info
*** 4568,4574 ****
    struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info);
    tree offtype = NULL_TREE;
    tree decl = NULL_TREE, base, off;
-   tree vectype = STMT_VINFO_VECTYPE (stmt_info);
    tree memory_type = TREE_TYPE (DR_REF (dr));
    machine_mode pmode;
    int punsignedp, reversep, pvolatilep = 0;
--- 4569,4574 ----
*************** vect_analyze_data_refs (vec_info *vinfo,
*** 5273,5279 ****
        if (gatherscatter != SG_NONE)
  	{
  	  gather_scatter_info gs_info;
! 	  if (!vect_check_gather_scatter (stmt_info,
  					  as_a <loop_vec_info> (vinfo),
  					  &gs_info)
  	      || !get_vectype_for_scalar_type (vinfo,
--- 5273,5279 ----
        if (gatherscatter != SG_NONE)
  	{
  	  gather_scatter_info gs_info;
! 	  if (!vect_check_gather_scatter (stmt_info, vectype,
  					  as_a <loop_vec_info> (vinfo),
  					  &gs_info)
  	      || !get_vectype_for_scalar_type (vinfo,
*************** vect_create_data_ref_ptr (vec_info *vinf
*** 5797,5804 ****
  	      to be vector_size.
     BSI - location where the new update stmt is to be placed.
     STMT_INFO - the original scalar memory-access stmt that is being vectorized.
!    BUMP - optional. The offset by which to bump the pointer. If not given,
! 	  the offset is assumed to be vector_size.
  
     Output: Return NEW_DATAREF_PTR as illustrated above.
  
--- 5797,5803 ----
  	      to be vector_size.
     BSI - location where the new update stmt is to be placed.
     STMT_INFO - the original scalar memory-access stmt that is being vectorized.
!    UPDATE - The offset by which to bump the pointer.
  
     Output: Return NEW_DATAREF_PTR as illustrated above.
  
*************** vect_create_data_ref_ptr (vec_info *vinf
*** 5807,5825 ****
  tree
  bump_vector_ptr (vec_info *vinfo,
  		 tree dataref_ptr, gimple *ptr_incr, gimple_stmt_iterator *gsi,
! 		 stmt_vec_info stmt_info, tree bump)
  {
    struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info);
-   tree vectype = STMT_VINFO_VECTYPE (stmt_info);
-   tree update = TYPE_SIZE_UNIT (vectype);
    gimple *incr_stmt;
    ssa_op_iter iter;
    use_operand_p use_p;
    tree new_dataref_ptr;
  
-   if (bump)
-     update = bump;
- 
    if (TREE_CODE (dataref_ptr) == SSA_NAME)
      new_dataref_ptr = copy_ssa_name (dataref_ptr);
    else if (is_gimple_min_invariant (dataref_ptr))
--- 5806,5819 ----
  tree
  bump_vector_ptr (vec_info *vinfo,
  		 tree dataref_ptr, gimple *ptr_incr, gimple_stmt_iterator *gsi,
! 		 stmt_vec_info stmt_info, tree update)
  {
    struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info);
    gimple *incr_stmt;
    ssa_op_iter iter;
    use_operand_p use_p;
    tree new_dataref_ptr;
  
    if (TREE_CODE (dataref_ptr) == SSA_NAME)
      new_dataref_ptr = copy_ssa_name (dataref_ptr);
    else if (is_gimple_min_invariant (dataref_ptr))
*************** vect_store_lanes_supported (tree vectype
*** 6124,6136 ****
     Return value - the result of the loop-header phi node.  */
  
  tree
! vect_setup_realignment (vec_info *vinfo, stmt_vec_info stmt_info,
  			gimple_stmt_iterator *gsi, tree *realignment_token,
  			enum dr_alignment_support alignment_support_scheme,
  			tree init_addr,
  			class loop **at_loop)
  {
-   tree vectype = STMT_VINFO_VECTYPE (stmt_info);
    loop_vec_info loop_vinfo = dyn_cast <loop_vec_info> (vinfo);
    dr_vec_info *dr_info = STMT_VINFO_DR_INFO (stmt_info);
    struct data_reference *dr = dr_info->dr;
--- 6118,6129 ----
     Return value - the result of the loop-header phi node.  */
  
  tree
! vect_setup_realignment (vec_info *vinfo, stmt_vec_info stmt_info, tree vectype,
  			gimple_stmt_iterator *gsi, tree *realignment_token,
  			enum dr_alignment_support alignment_support_scheme,
  			tree init_addr,
  			class loop **at_loop)
  {
    loop_vec_info loop_vinfo = dyn_cast <loop_vec_info> (vinfo);
    dr_vec_info *dr_info = STMT_VINFO_DR_INFO (stmt_info);
    struct data_reference *dr = dr_info->dr;
diff -Nrcpad gcc-16-20250831/gcc/tree-vect-loop-manip.cc gcc-16-20250907/gcc/tree-vect-loop-manip.cc
*** gcc-16-20250831/gcc/tree-vect-loop-manip.cc	Sun Aug 31 22:34:22 2025
--- gcc-16-20250907/gcc/tree-vect-loop-manip.cc	Sun Sep  7 22:34:53 2025
*************** get_misalign_in_elems (gimple **seq, loo
*** 2507,2513 ****
  
  static tree
  vect_gen_prolog_loop_niters (loop_vec_info loop_vinfo,
! 			     basic_block bb, int *bound)
  {
    dr_vec_info *dr_info = LOOP_VINFO_UNALIGNED_DR (loop_vinfo);
    tree var;
--- 2507,2513 ----
  
  static tree
  vect_gen_prolog_loop_niters (loop_vec_info loop_vinfo,
! 			     basic_block bb, poly_int64 *bound)
  {
    dr_vec_info *dr_info = LOOP_VINFO_UNALIGNED_DR (loop_vinfo);
    tree var;
*************** vect_gen_prolog_loop_niters (loop_vec_in
*** 2555,2565 ****
  			     misalign_in_elems);
        iters = fold_build2 (BIT_AND_EXPR, type, iters, align_in_elems_minus_1);
        iters = fold_convert (niters_type, iters);
!       unsigned HOST_WIDE_INT align_in_elems_c;
!       if (align_in_elems.is_constant (&align_in_elems_c))
! 	*bound = align_in_elems_c - 1;
!       else
! 	*bound = -1;
      }
  
    if (dump_enabled_p ())
--- 2555,2561 ----
  			     misalign_in_elems);
        iters = fold_build2 (BIT_AND_EXPR, type, iters, align_in_elems_minus_1);
        iters = fold_convert (niters_type, iters);
!       *bound = align_in_elems;
      }
  
    if (dump_enabled_p ())
*************** vect_build_loop_niters (loop_vec_info lo
*** 2728,2735 ****
  
  static tree
  vect_gen_scalar_loop_niters (tree niters_prolog, int int_niters_prolog,
! 			     int bound_prolog, poly_int64 bound_epilog, int th,
! 			     poly_uint64 *bound_scalar,
  			     bool check_profitability)
  {
    tree type = TREE_TYPE (niters_prolog);
--- 2724,2731 ----
  
  static tree
  vect_gen_scalar_loop_niters (tree niters_prolog, int int_niters_prolog,
! 			     poly_int64 bound_prolog, poly_int64 bound_epilog,
! 			     int th, poly_uint64 *bound_scalar,
  			     bool check_profitability)
  {
    tree type = TREE_TYPE (niters_prolog);
*************** vect_do_peeling (loop_vec_info loop_vinf
*** 3257,3267 ****
    /* Generate the number of iterations for the prolog loop.  We do this here
       so that we can also get the upper bound on the number of iterations.  */
    tree niters_prolog;
!   int bound_prolog = 0;
    if (prolog_peeling)
      {
        niters_prolog = vect_gen_prolog_loop_niters (loop_vinfo, anchor,
! 						    &bound_prolog);
        /* If algonment peeling is known, we will always execute prolog.  */
        if (TREE_CODE (niters_prolog) == INTEGER_CST)
  	prob_prolog = profile_probability::always ();
--- 3253,3263 ----
    /* Generate the number of iterations for the prolog loop.  We do this here
       so that we can also get the upper bound on the number of iterations.  */
    tree niters_prolog;
!   poly_int64 bound_prolog = 0;
    if (prolog_peeling)
      {
        niters_prolog = vect_gen_prolog_loop_niters (loop_vinfo, anchor,
! 						   &bound_prolog);
        /* If algonment peeling is known, we will always execute prolog.  */
        if (TREE_CODE (niters_prolog) == INTEGER_CST)
  	prob_prolog = profile_probability::always ();
*************** vect_do_peeling (loop_vec_info loop_vinf
*** 3404,3410 ****
  	  slpeel_update_phi_nodes_for_guard1 (prolog, loop, guard_e, e);
  
  	  scale_bbs_frequencies (&bb_after_prolog, 1, prob_prolog);
! 	  scale_loop_profile (prolog, prob_prolog, bound_prolog - 1);
  	}
  
        /* Update init address of DRs.  */
--- 3400,3407 ----
  	  slpeel_update_phi_nodes_for_guard1 (prolog, loop, guard_e, e);
  
  	  scale_bbs_frequencies (&bb_after_prolog, 1, prob_prolog);
! 	  scale_loop_profile (prolog, prob_prolog,
! 			      estimated_poly_value (bound_prolog) - 1);
  	}
  
        /* Update init address of DRs.  */
*************** vect_do_peeling (loop_vec_info loop_vinf
*** 3429,3435 ****
  
        /* Prolog iterates at most bound_prolog times, latch iterates at
  	 most bound_prolog - 1 times.  */
!       record_niter_bound (prolog, bound_prolog - 1, false, true);
        delete_update_ssa ();
        adjust_vec_debug_stmts ();
        scev_reset ();
--- 3426,3434 ----
  
        /* Prolog iterates at most bound_prolog times, latch iterates at
  	 most bound_prolog - 1 times.  */
!       if (bound_prolog.is_constant ())
! 	record_niter_bound (prolog, bound_prolog.to_constant () - 1, false,
! 			    true);
        delete_update_ssa ();
        adjust_vec_debug_stmts ();
        scev_reset ();
diff -Nrcpad gcc-16-20250831/gcc/tree-vect-loop.cc gcc-16-20250907/gcc/tree-vect-loop.cc
*** gcc-16-20250831/gcc/tree-vect-loop.cc	Sun Aug 31 22:34:22 2025
--- gcc-16-20250907/gcc/tree-vect-loop.cc	Sun Sep  7 22:34:53 2025
*************** along with GCC; see the file COPYING3.
*** 161,167 ****
  static void vect_estimate_min_profitable_iters (loop_vec_info, int *, int *,
  						unsigned *);
  static stmt_vec_info vect_is_simple_reduction (loop_vec_info, stmt_vec_info,
! 					       bool *, bool *, bool);
  
  
  /* Function vect_is_simple_iv_evolution.
--- 161,167 ----
  static void vect_estimate_min_profitable_iters (loop_vec_info, int *, int *,
  						unsigned *);
  static stmt_vec_info vect_is_simple_reduction (loop_vec_info, stmt_vec_info,
! 					       gphi **, bool *, bool);
  
  
  /* Function vect_is_simple_iv_evolution.
*************** static stmt_vec_info vect_is_simple_redu
*** 170,177 ****
     considered a polynomial evolution.  */
  
  static bool
! vect_is_simple_iv_evolution (unsigned loop_nb, tree access_fn, tree * init,
!                              tree * step)
  {
    tree init_expr;
    tree step_expr;
--- 170,177 ----
     considered a polynomial evolution.  */
  
  static bool
! vect_is_simple_iv_evolution (unsigned loop_nb, tree access_fn,
! 			     stmt_vec_info stmt_info)
  {
    tree init_expr;
    tree step_expr;
*************** vect_is_simple_iv_evolution (unsigned lo
*** 195,202 ****
      dump_printf_loc (MSG_NOTE, vect_location, "step: %T,  init: %T\n",
  		     step_expr, init_expr);
  
!   *init = init_expr;
!   *step = step_expr;
  
    if (TREE_CODE (step_expr) != INTEGER_CST
        && (TREE_CODE (step_expr) != SSA_NAME
--- 195,202 ----
      dump_printf_loc (MSG_NOTE, vect_location, "step: %T,  init: %T\n",
  		     step_expr, init_expr);
  
!   STMT_VINFO_LOOP_PHI_EVOLUTION_BASE_UNCHANGED (stmt_info) = init_expr;
!   STMT_VINFO_LOOP_PHI_EVOLUTION_PART (stmt_info) = step_expr;
  
    if (TREE_CODE (step_expr) != INTEGER_CST
        && (TREE_CODE (step_expr) != SSA_NAME
*************** vect_is_simple_iv_evolution (unsigned lo
*** 227,233 ****
     For neg induction, return a fake step as integer -1.  */
  static bool
  vect_is_nonlinear_iv_evolution (class loop* loop, stmt_vec_info stmt_info,
! 				gphi* loop_phi_node, tree *init, tree *step)
  {
    tree init_expr, ev_expr, result, op1, op2;
    gimple* def;
--- 227,233 ----
     For neg induction, return a fake step as integer -1.  */
  static bool
  vect_is_nonlinear_iv_evolution (class loop* loop, stmt_vec_info stmt_info,
! 				gphi* loop_phi_node)
  {
    tree init_expr, ev_expr, result, op1, op2;
    gimple* def;
*************** vect_is_nonlinear_iv_evolution (class lo
*** 242,248 ****
    if (!INTEGRAL_TYPE_P (TREE_TYPE (init_expr)))
      return false;
  
-   *init = init_expr;
    result = PHI_RESULT (loop_phi_node);
  
    if (TREE_CODE (ev_expr) != SSA_NAME
--- 242,247 ----
*************** vect_is_nonlinear_iv_evolution (class lo
*** 251,262 ****
      return false;
  
    enum tree_code t_code = gimple_assign_rhs_code (def);
    switch (t_code)
      {
      case NEGATE_EXPR:
        if (gimple_assign_rhs1 (def) != result)
  	return false;
!       *step = build_int_cst (TREE_TYPE (init_expr), -1);
        STMT_VINFO_LOOP_PHI_EVOLUTION_TYPE (stmt_info) = vect_step_op_neg;
        break;
  
--- 250,262 ----
      return false;
  
    enum tree_code t_code = gimple_assign_rhs_code (def);
+   tree step;
    switch (t_code)
      {
      case NEGATE_EXPR:
        if (gimple_assign_rhs1 (def) != result)
  	return false;
!       step = build_int_cst (TREE_TYPE (init_expr), -1);
        STMT_VINFO_LOOP_PHI_EVOLUTION_TYPE (stmt_info) = vect_step_op_neg;
        break;
  
*************** vect_is_nonlinear_iv_evolution (class lo
*** 268,274 ****
        if (TREE_CODE (op2) != INTEGER_CST
  	  || op1 != result)
  	return false;
!       *step = op2;
        if (t_code == LSHIFT_EXPR)
  	STMT_VINFO_LOOP_PHI_EVOLUTION_TYPE (stmt_info) = vect_step_op_shl;
        else if (t_code == RSHIFT_EXPR)
--- 268,274 ----
        if (TREE_CODE (op2) != INTEGER_CST
  	  || op1 != result)
  	return false;
!       step = op2;
        if (t_code == LSHIFT_EXPR)
  	STMT_VINFO_LOOP_PHI_EVOLUTION_TYPE (stmt_info) = vect_step_op_shl;
        else if (t_code == RSHIFT_EXPR)
*************** vect_is_nonlinear_iv_evolution (class lo
*** 282,326 ****
        return false;
      }
  
!   STMT_VINFO_LOOP_PHI_EVOLUTION_BASE_UNCHANGED (stmt_info) = *init;
!   STMT_VINFO_LOOP_PHI_EVOLUTION_PART (stmt_info) = *step;
  
    return true;
  }
  
- /* Return true if PHI, described by STMT_INFO, is the inner PHI in
-    what we are assuming is a double reduction.  For example, given
-    a structure like this:
- 
-       outer1:
- 	x_1 = PHI <x_4(outer2), ...>;
- 	...
- 
-       inner:
- 	x_2 = PHI <x_1(outer1), ...>;
- 	...
- 	x_3 = ...;
- 	...
- 
-       outer2:
- 	x_4 = PHI <x_3(inner)>;
- 	...
- 
-    outer loop analysis would treat x_1 as a double reduction phi and
-    this function would then return true for x_2.  */
- 
- static bool
- vect_inner_phi_in_double_reduction_p (loop_vec_info loop_vinfo, gphi *phi)
- {
-   use_operand_p use_p;
-   ssa_op_iter op_iter;
-   FOR_EACH_PHI_ARG (use_p, phi, op_iter, SSA_OP_USE)
-     if (stmt_vec_info def_info = loop_vinfo->lookup_def (USE_FROM_PTR (use_p)))
-       if (STMT_VINFO_DEF_TYPE (def_info) == vect_double_reduction_def)
- 	return true;
-   return false;
- }
- 
  /* Returns true if Phi is a first-order recurrence. A first-order
     recurrence is a non-reduction recurrence relation in which the value of
     the recurrence in the current loop iteration equals a value defined in
--- 282,293 ----
        return false;
      }
  
!   STMT_VINFO_LOOP_PHI_EVOLUTION_BASE_UNCHANGED (stmt_info) = init_expr;
!   STMT_VINFO_LOOP_PHI_EVOLUTION_PART (stmt_info) = step;
  
    return true;
  }
  
  /* Returns true if Phi is a first-order recurrence. A first-order
     recurrence is a non-reduction recurrence relation in which the value of
     the recurrence in the current loop iteration equals a value defined in
*************** vect_analyze_scalar_cycles_1 (loop_vec_i
*** 378,387 ****
  			      bool slp)
  {
    basic_block bb = loop->header;
-   tree init, step;
    auto_vec<stmt_vec_info, 64> worklist;
    gphi_iterator gsi;
-   bool double_reduc, reduc_chain;
  
    DUMP_VECT_SCOPE ("vect_analyze_scalar_cycles");
  
--- 345,352 ----
*************** vect_analyze_scalar_cycles_1 (loop_vec_i
*** 395,435 ****
        tree def = PHI_RESULT (phi);
        stmt_vec_info stmt_vinfo = loop_vinfo->lookup_stmt (phi);
  
-       if (dump_enabled_p ())
- 	dump_printf_loc (MSG_NOTE, vect_location, "Analyze phi: %G",
- 			 (gimple *) phi);
- 
        /* Skip virtual phi's.  The data dependences that are associated with
           virtual defs/uses (i.e., memory accesses) are analyzed elsewhere.  */
        if (virtual_operand_p (def))
  	continue;
  
        STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_unknown_def_type;
  
        /* Analyze the evolution function.  */
        access_fn = analyze_scalar_evolution (loop, def);
        if (access_fn)
! 	{
! 	  STRIP_NOPS (access_fn);
! 	  if (dump_enabled_p ())
! 	    dump_printf_loc (MSG_NOTE, vect_location,
! 			     "Access function of PHI: %T\n", access_fn);
! 	  STMT_VINFO_LOOP_PHI_EVOLUTION_BASE_UNCHANGED (stmt_vinfo)
! 	    = initial_condition_in_loop_num (access_fn, loop->num);
! 	  STMT_VINFO_LOOP_PHI_EVOLUTION_PART (stmt_vinfo)
! 	    = evolution_part_in_loop_num (access_fn, loop->num);
! 	}
  
        if ((!access_fn
! 	   || vect_inner_phi_in_double_reduction_p (loop_vinfo, phi)
! 	   || !vect_is_simple_iv_evolution (loop->num, access_fn,
! 					    &init, &step)
  	   || (LOOP_VINFO_LOOP (loop_vinfo) != loop
! 	       && TREE_CODE (step) != INTEGER_CST))
  	  /* Only handle nonlinear iv for same loop.  */
  	  && (LOOP_VINFO_LOOP (loop_vinfo) != loop
! 	      || !vect_is_nonlinear_iv_evolution (loop, stmt_vinfo,
! 						  phi, &init, &step)))
  	{
  	  worklist.safe_push (stmt_vinfo);
  	  continue;
--- 360,396 ----
        tree def = PHI_RESULT (phi);
        stmt_vec_info stmt_vinfo = loop_vinfo->lookup_stmt (phi);
  
        /* Skip virtual phi's.  The data dependences that are associated with
           virtual defs/uses (i.e., memory accesses) are analyzed elsewhere.  */
        if (virtual_operand_p (def))
  	continue;
  
+       /* Skip already analyzed inner loop PHIs of double reductions.  */
+       if (VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_vinfo)))
+ 	continue;
+ 
+       if (dump_enabled_p ())
+ 	dump_printf_loc (MSG_NOTE, vect_location, "Analyze phi: %G",
+ 			 (gimple *) phi);
+ 
        STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_unknown_def_type;
  
        /* Analyze the evolution function.  */
        access_fn = analyze_scalar_evolution (loop, def);
+       if (dump_enabled_p ())
+ 	dump_printf_loc (MSG_NOTE, vect_location,
+ 			 "Access function of PHI: %T\n", access_fn);
        if (access_fn)
! 	STRIP_NOPS (access_fn);
  
        if ((!access_fn
! 	   || !vect_is_simple_iv_evolution (loop->num, access_fn, stmt_vinfo)
  	   || (LOOP_VINFO_LOOP (loop_vinfo) != loop
! 	       && (TREE_CODE (STMT_VINFO_LOOP_PHI_EVOLUTION_PART (stmt_vinfo))
! 		   != INTEGER_CST)))
  	  /* Only handle nonlinear iv for same loop.  */
  	  && (LOOP_VINFO_LOOP (loop_vinfo) != loop
! 	      || !vect_is_nonlinear_iv_evolution (loop, stmt_vinfo, phi)))
  	{
  	  worklist.safe_push (stmt_vinfo);
  	  continue;
*************** vect_analyze_scalar_cycles_1 (loop_vec_i
*** 463,513 ****
        gcc_assert (!virtual_operand_p (def)
  		  && STMT_VINFO_DEF_TYPE (stmt_vinfo) == vect_unknown_def_type);
  
        stmt_vec_info reduc_stmt_info
  	= vect_is_simple_reduction (loop_vinfo, stmt_vinfo, &double_reduc,
  				    &reduc_chain, slp);
!       if (reduc_stmt_info)
          {
! 	  STMT_VINFO_REDUC_DEF (stmt_vinfo) = reduc_stmt_info;
! 	  STMT_VINFO_REDUC_DEF (reduc_stmt_info) = stmt_vinfo;
! 	  if (double_reduc)
  	    {
  	      if (dump_enabled_p ())
  		dump_printf_loc (MSG_NOTE, vect_location,
  				 "Detected double reduction.\n");
  
!               STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_double_reduction_def;
  	      STMT_VINFO_DEF_TYPE (reduc_stmt_info) = vect_double_reduction_def;
  	      /* Make it accessible for SLP vectorization.  */
  	      LOOP_VINFO_REDUCTIONS (loop_vinfo).safe_push (reduc_stmt_info);
!             }
!           else
!             {
!               if (loop != LOOP_VINFO_LOOP (loop_vinfo))
!                 {
!                   if (dump_enabled_p ())
!                     dump_printf_loc (MSG_NOTE, vect_location,
! 				     "Detected vectorizable nested cycle.\n");
  
!                   STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_nested_cycle;
!                 }
!               else
!                 {
!                   if (dump_enabled_p ())
!                     dump_printf_loc (MSG_NOTE, vect_location,
! 				     "Detected reduction.\n");
  
!                   STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_reduction_def;
! 		  STMT_VINFO_DEF_TYPE (reduc_stmt_info) = vect_reduction_def;
!                   /* Store the reduction cycles for possible vectorization in
!                      loop-aware SLP if it was not detected as reduction
! 		     chain.  */
! 		  if (! reduc_chain)
! 		    LOOP_VINFO_REDUCTIONS (loop_vinfo).safe_push
! 		      (reduc_stmt_info);
!                 }
!             }
!         }
        else if (vect_phi_first_order_recurrence_p (loop_vinfo, loop, phi))
  	STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_first_order_recurrence;
        else
--- 424,491 ----
        gcc_assert (!virtual_operand_p (def)
  		  && STMT_VINFO_DEF_TYPE (stmt_vinfo) == vect_unknown_def_type);
  
+       gphi *double_reduc;
+       bool reduc_chain;
        stmt_vec_info reduc_stmt_info
  	= vect_is_simple_reduction (loop_vinfo, stmt_vinfo, &double_reduc,
  				    &reduc_chain, slp);
!       if (reduc_stmt_info && double_reduc)
          {
! 	  bool inner_chain;
! 	  stmt_vec_info inner_phi_info
! 	      = loop_vinfo->lookup_stmt (double_reduc);
! 	  /* ???  Pass down flag we're the inner loop of a double reduc.  */
! 	  stmt_vec_info inner_reduc_info
! 	    = vect_is_simple_reduction (loop_vinfo, inner_phi_info,
! 					NULL, &inner_chain, slp);
! 	  if (inner_reduc_info)
  	    {
+ 	      STMT_VINFO_REDUC_DEF (stmt_vinfo) = reduc_stmt_info;
+ 	      STMT_VINFO_REDUC_DEF (reduc_stmt_info) = stmt_vinfo;
+ 	      STMT_VINFO_REDUC_DEF (inner_phi_info) = inner_reduc_info;
+ 	      STMT_VINFO_REDUC_DEF (inner_reduc_info) = inner_phi_info;
  	      if (dump_enabled_p ())
  		dump_printf_loc (MSG_NOTE, vect_location,
  				 "Detected double reduction.\n");
  
! 	      STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_double_reduction_def;
  	      STMT_VINFO_DEF_TYPE (reduc_stmt_info) = vect_double_reduction_def;
+ 	      STMT_VINFO_DEF_TYPE (inner_phi_info) = vect_nested_cycle;
  	      /* Make it accessible for SLP vectorization.  */
  	      LOOP_VINFO_REDUCTIONS (loop_vinfo).safe_push (reduc_stmt_info);
! 	    }
! 	  else if (dump_enabled_p ())
! 	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
! 			     "Unknown def-use cycle pattern.\n");
! 	}
!       else if (reduc_stmt_info)
! 	{
! 	  STMT_VINFO_REDUC_DEF (stmt_vinfo) = reduc_stmt_info;
! 	  STMT_VINFO_REDUC_DEF (reduc_stmt_info) = stmt_vinfo;
! 	  if (loop != LOOP_VINFO_LOOP (loop_vinfo))
! 	    {
! 	      if (dump_enabled_p ())
! 		dump_printf_loc (MSG_NOTE, vect_location,
! 				 "Detected vectorizable nested cycle.\n");
  
! 	      STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_nested_cycle;
! 	    }
! 	  else
! 	    {
! 	      if (dump_enabled_p ())
! 		dump_printf_loc (MSG_NOTE, vect_location,
! 				 "Detected reduction.\n");
  
! 	      STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_reduction_def;
! 	      STMT_VINFO_DEF_TYPE (reduc_stmt_info) = vect_reduction_def;
! 	      /* Store the reduction cycles for possible vectorization in
! 		 loop-aware SLP if it was not detected as reduction
! 		 chain.  */
! 	      if (! reduc_chain)
! 		LOOP_VINFO_REDUCTIONS (loop_vinfo).safe_push
! 		    (reduc_stmt_info);
! 	    }
! 	}
        else if (vect_phi_first_order_recurrence_p (loop_vinfo, loop, phi))
  	STMT_VINFO_DEF_TYPE (stmt_vinfo) = vect_first_order_recurrence;
        else
*************** _loop_vec_info::~_loop_vec_info ()
*** 955,960 ****
--- 933,940 ----
    delete scan_map;
    delete scalar_costs;
    delete vector_costs;
+   for (auto reduc_info : reduc_infos)
+     delete reduc_info;
  
    /* When we release an epiloge vinfo that we do not intend to use
       avoid clearing AUX of the main loop which should continue to
*************** check_reduction_path (dump_user_location
*** 3774,3787 ****
  
  static stmt_vec_info
  vect_is_simple_reduction (loop_vec_info loop_info, stmt_vec_info phi_info,
! 			  bool *double_reduc, bool *reduc_chain_p, bool slp)
  {
    gphi *phi = as_a <gphi *> (phi_info->stmt);
    gimple *phi_use_stmt = NULL;
    imm_use_iterator imm_iter;
    use_operand_p use_p;
  
!   *double_reduc = false;
    *reduc_chain_p = false;
    STMT_VINFO_REDUC_TYPE (phi_info) = TREE_CODE_REDUCTION;
  
--- 3754,3771 ----
  
  static stmt_vec_info
  vect_is_simple_reduction (loop_vec_info loop_info, stmt_vec_info phi_info,
! 			  gphi **double_reduc, bool *reduc_chain_p, bool slp)
  {
    gphi *phi = as_a <gphi *> (phi_info->stmt);
    gimple *phi_use_stmt = NULL;
    imm_use_iterator imm_iter;
    use_operand_p use_p;
  
!   /* When double_reduc is NULL we are testing the inner loop of a
!      double reduction.  */
!   bool inner_loop_of_double_reduc = double_reduc == NULL;
!   if (double_reduc)
!     *double_reduc = NULL;
    *reduc_chain_p = false;
    STMT_VINFO_REDUC_TYPE (phi_info) = TREE_CODE_REDUCTION;
  
*************** vect_is_simple_reduction (loop_vec_info
*** 3837,3843 ****
      = flow_loop_nested_p (LOOP_VINFO_LOOP (loop_info), loop);
    unsigned nlatch_def_loop_uses = 0;
    auto_vec<gphi *, 3> lcphis;
-   bool inner_loop_of_double_reduc = false;
    FOR_EACH_IMM_USE_FAST (use_p, imm_iter, latch_def)
      {
        gimple *use_stmt = USE_STMT (use_p);
--- 3821,3826 ----
*************** vect_is_simple_reduction (loop_vec_info
*** 3846,3859 ****
        if (flow_bb_inside_loop_p (loop, gimple_bb (use_stmt)))
  	nlatch_def_loop_uses++;
        else
! 	{
! 	  /* We can have more than one loop-closed PHI.  */
! 	  lcphis.safe_push (as_a <gphi *> (use_stmt));
! 	  if (nested_in_vect_loop
! 	      && (STMT_VINFO_DEF_TYPE (loop_info->lookup_stmt (use_stmt))
! 		  == vect_double_reduction_def))
! 	    inner_loop_of_double_reduc = true;
! 	}
      }
  
    /* If we are vectorizing an inner reduction we are executing that
--- 3829,3836 ----
        if (flow_bb_inside_loop_p (loop, gimple_bb (use_stmt)))
  	nlatch_def_loop_uses++;
        else
! 	/* We can have more than one loop-closed PHI.  */
! 	lcphis.safe_push (as_a <gphi *> (use_stmt));
      }
  
    /* If we are vectorizing an inner reduction we are executing that
*************** vect_is_simple_reduction (loop_vec_info
*** 3922,3928 ****
              report_vect_op (MSG_NOTE, def_stmt,
  			    "detected double reduction: ");
  
!           *double_reduc = true;
  	  return def_stmt_info;
          }
  
--- 3899,3905 ----
              report_vect_op (MSG_NOTE, def_stmt,
  			    "detected double reduction: ");
  
! 	  *double_reduc = as_a <gphi *> (phi_use_stmt);
  	  return def_stmt_info;
          }
  
*************** vect_model_reduction_cost (loop_vec_info
*** 4993,5001 ****
  
  static void
  vect_emit_reduction_init_stmts (loop_vec_info loop_vinfo,
! 				stmt_vec_info reduc_info, gimple *seq)
  {
!   if (reduc_info->reused_accumulator)
      {
        /* When reusing an accumulator from the main loop, we only need
  	 initialization instructions if the main loop can be skipped.
--- 4970,4978 ----
  
  static void
  vect_emit_reduction_init_stmts (loop_vec_info loop_vinfo,
! 				vect_reduc_info reduc_info, gimple *seq)
  {
!   if (VECT_REDUC_INFO_REUSED_ACCUMULATOR (reduc_info))
      {
        /* When reusing an accumulator from the main loop, we only need
  	 initialization instructions if the main loop can be skipped.
*************** vect_emit_reduction_init_stmts (loop_vec
*** 5023,5035 ****
  
  static void
  get_initial_defs_for_reduction (loop_vec_info loop_vinfo,
! 				stmt_vec_info reduc_info,
  				tree vector_type,
  				vec<tree> *vec_oprnds,
  				unsigned int number_of_vectors,
  				unsigned int group_size, tree neutral_op)
  {
!   vec<tree> &initial_values = reduc_info->reduc_initial_values;
    unsigned HOST_WIDE_INT nunits;
    unsigned j, number_of_places_left_in_vector;
    unsigned int i;
--- 5000,5012 ----
  
  static void
  get_initial_defs_for_reduction (loop_vec_info loop_vinfo,
! 				vect_reduc_info reduc_info,
  				tree vector_type,
  				vec<tree> *vec_oprnds,
  				unsigned int number_of_vectors,
  				unsigned int group_size, tree neutral_op)
  {
!   vec<tree> &initial_values = VECT_REDUC_INFO_INITIAL_VALUES (reduc_info);
    unsigned HOST_WIDE_INT nunits;
    unsigned j, number_of_places_left_in_vector;
    unsigned int i;
*************** get_initial_defs_for_reduction (loop_vec
*** 5135,5164 ****
      vect_emit_reduction_init_stmts (loop_vinfo, reduc_info, ctor_seq);
  }
  
! /* For a statement STMT_INFO taking part in a reduction operation return
!    the stmt_vec_info the meta information is stored on.  */
! 
! stmt_vec_info
! info_for_reduction (vec_info *vinfo, stmt_vec_info stmt_info)
  {
!   stmt_info = vect_orig_stmt (stmt_info);
!   gcc_assert (STMT_VINFO_REDUC_DEF (stmt_info));
!   if (!is_a <gphi *> (stmt_info->stmt)
!       || !VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_info)))
!     stmt_info = STMT_VINFO_REDUC_DEF (stmt_info);
!   gphi *phi = as_a <gphi *> (stmt_info->stmt);
!   if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_double_reduction_def)
!     {
!       if (gimple_phi_num_args (phi) == 1)
! 	stmt_info = STMT_VINFO_REDUC_DEF (stmt_info);
!     }
!   else if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_nested_cycle)
!     {
!       stmt_vec_info info = vinfo->lookup_def (vect_phi_initial_value (phi));
!       if (info && STMT_VINFO_DEF_TYPE (info) == vect_double_reduction_def)
! 	stmt_info = info;
!     }
!   return stmt_info;
  }
  
  /* See if LOOP_VINFO is an epilogue loop whose main loop had a reduction that
--- 5112,5123 ----
      vect_emit_reduction_init_stmts (loop_vinfo, reduc_info, ctor_seq);
  }
  
! vect_reduc_info
! info_for_reduction (loop_vec_info loop_vinfo, slp_tree node)
  {
!   if (node->cycle_info.id == -1)
!     return NULL;
!   return loop_vinfo->reduc_infos[node->cycle_info.id];
  }
  
  /* See if LOOP_VINFO is an epilogue loop whose main loop had a reduction that
*************** info_for_reduction (vec_info *vinfo, stm
*** 5167,5182 ****
  
  static bool
  vect_find_reusable_accumulator (loop_vec_info loop_vinfo,
! 				stmt_vec_info reduc_info, tree vectype)
  {
    loop_vec_info main_loop_vinfo = LOOP_VINFO_ORIG_LOOP_INFO (loop_vinfo);
    if (!main_loop_vinfo)
      return false;
  
!   if (STMT_VINFO_REDUC_TYPE (reduc_info) != TREE_CODE_REDUCTION)
      return false;
  
!   unsigned int num_phis = reduc_info->reduc_initial_values.length ();
    auto_vec<tree, 16> main_loop_results (num_phis);
    auto_vec<tree, 16> initial_values (num_phis);
    if (edge main_loop_edge = loop_vinfo->main_loop_edge)
--- 5126,5141 ----
  
  static bool
  vect_find_reusable_accumulator (loop_vec_info loop_vinfo,
! 				vect_reduc_info reduc_info, tree vectype)
  {
    loop_vec_info main_loop_vinfo = LOOP_VINFO_ORIG_LOOP_INFO (loop_vinfo);
    if (!main_loop_vinfo)
      return false;
  
!   if (VECT_REDUC_INFO_TYPE (reduc_info) != TREE_CODE_REDUCTION)
      return false;
  
!   unsigned int num_phis = VECT_REDUC_INFO_INITIAL_VALUES (reduc_info).length ();
    auto_vec<tree, 16> main_loop_results (num_phis);
    auto_vec<tree, 16> initial_values (num_phis);
    if (edge main_loop_edge = loop_vinfo->main_loop_edge)
*************** vect_find_reusable_accumulator (loop_vec
*** 5184,5190 ****
        /* The epilogue loop can be entered either from the main loop or
  	 from an earlier guard block.  */
        edge skip_edge = loop_vinfo->skip_main_loop_edge;
!       for (tree incoming_value : reduc_info->reduc_initial_values)
  	{
  	  /* Look for:
  
--- 5143,5149 ----
        /* The epilogue loop can be entered either from the main loop or
  	 from an earlier guard block.  */
        edge skip_edge = loop_vinfo->skip_main_loop_edge;
!       for (tree incoming_value : VECT_REDUC_INFO_INITIAL_VALUES (reduc_info))
  	{
  	  /* Look for:
  
*************** vect_find_reusable_accumulator (loop_vec
*** 5204,5218 ****
      }
    else
      /* The main loop dominates the epilogue loop.  */
!     main_loop_results.splice (reduc_info->reduc_initial_values);
  
    /* See if the main loop has the kind of accumulator we need.  */
    vect_reusable_accumulator *accumulator
      = main_loop_vinfo->reusable_accumulators.get (main_loop_results[0]);
    if (!accumulator
!       || num_phis != accumulator->reduc_info->reduc_scalar_results.length ()
        || !std::equal (main_loop_results.begin (), main_loop_results.end (),
! 		      accumulator->reduc_info->reduc_scalar_results.begin ()))
      return false;
  
    /* Handle the case where we can reduce wider vectors to narrower ones.  */
--- 5163,5177 ----
      }
    else
      /* The main loop dominates the epilogue loop.  */
!     main_loop_results.splice (VECT_REDUC_INFO_INITIAL_VALUES (reduc_info));
  
    /* See if the main loop has the kind of accumulator we need.  */
    vect_reusable_accumulator *accumulator
      = main_loop_vinfo->reusable_accumulators.get (main_loop_results[0]);
    if (!accumulator
!       || num_phis != VECT_REDUC_INFO_SCALAR_RESULTS (accumulator->reduc_info).length ()
        || !std::equal (main_loop_results.begin (), main_loop_results.end (),
! 		      VECT_REDUC_INFO_SCALAR_RESULTS (accumulator->reduc_info).begin ()))
      return false;
  
    /* Handle the case where we can reduce wider vectors to narrower ones.  */
*************** vect_find_reusable_accumulator (loop_vec
*** 5230,5236 ****
        tree intermediate_vectype = get_related_vectype_for_scalar_type
  	(TYPE_MODE (vectype), TREE_TYPE (vectype), intermediate_nunits);
        if (!intermediate_vectype
! 	  || !directly_supported_p (STMT_VINFO_REDUC_CODE (reduc_info),
  				    intermediate_vectype)
  	  || !can_vec_extract (TYPE_MODE (prev_vectype),
  			       TYPE_MODE (intermediate_vectype)))
--- 5189,5195 ----
        tree intermediate_vectype = get_related_vectype_for_scalar_type
  	(TYPE_MODE (vectype), TREE_TYPE (vectype), intermediate_nunits);
        if (!intermediate_vectype
! 	  || !directly_supported_p (VECT_REDUC_INFO_CODE (reduc_info),
  				    intermediate_vectype)
  	  || !can_vec_extract (TYPE_MODE (prev_vectype),
  			       TYPE_MODE (intermediate_vectype)))
*************** vect_find_reusable_accumulator (loop_vec
*** 5249,5255 ****
       to select the correct adjustment, but in practice that shouldn't be
       necessary.)  */
    tree main_adjustment
!     = STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT (accumulator->reduc_info);
    if (loop_vinfo->main_loop_edge && main_adjustment)
      {
        gcc_assert (num_phis == 1);
--- 5208,5214 ----
       to select the correct adjustment, but in practice that shouldn't be
       necessary.)  */
    tree main_adjustment
!     = VECT_REDUC_INFO_EPILOGUE_ADJUSTMENT (accumulator->reduc_info);
    if (loop_vinfo->main_loop_edge && main_adjustment)
      {
        gcc_assert (num_phis == 1);
*************** vect_find_reusable_accumulator (loop_vec
*** 5258,5271 ****
  	 initialize the accumulator with a neutral value instead.  */
        if (!operand_equal_p (initial_value, main_adjustment))
  	return false;
!       code_helper code = STMT_VINFO_REDUC_CODE (reduc_info);
        initial_values[0] = neutral_op_for_reduction (TREE_TYPE (initial_value),
  						    code, initial_value);
      }
!   STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT (reduc_info) = main_adjustment;
!   reduc_info->reduc_initial_values.truncate (0);
!   reduc_info->reduc_initial_values.splice (initial_values);
!   reduc_info->reused_accumulator = accumulator;
    return true;
  }
  
--- 5217,5230 ----
  	 initialize the accumulator with a neutral value instead.  */
        if (!operand_equal_p (initial_value, main_adjustment))
  	return false;
!       code_helper code = VECT_REDUC_INFO_CODE (reduc_info);
        initial_values[0] = neutral_op_for_reduction (TREE_TYPE (initial_value),
  						    code, initial_value);
      }
!   VECT_REDUC_INFO_EPILOGUE_ADJUSTMENT (reduc_info) = main_adjustment;
!   VECT_REDUC_INFO_INITIAL_VALUES (reduc_info).truncate (0);
!   VECT_REDUC_INFO_INITIAL_VALUES (reduc_info).splice (initial_values);
!   VECT_REDUC_INFO_REUSED_ACCUMULATOR (reduc_info) = accumulator;
    return true;
  }
  
*************** vect_create_epilog_for_reduction (loop_v
*** 5418,5445 ****
  				  slp_instance slp_node_instance,
  				  edge loop_exit)
  {
!   stmt_vec_info reduc_info = info_for_reduction (loop_vinfo, stmt_info);
!   gcc_assert (reduc_info->is_reduc_info);
!   /* For double reductions we need to get at the inner loop reduction
!      stmt which has the meta info attached.  Our stmt_info is that of the
!      loop-closed PHI of the inner loop which we remember as
!      def for the reduction PHI generation.  */
!   bool double_reduc = false;
!   if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_double_reduction_def)
!     {
!       double_reduc = true;
!       stmt_info = loop_vinfo->lookup_def (gimple_phi_arg_def
! 					    (stmt_info->stmt, 0));
!       stmt_info = vect_stmt_to_vectorize (stmt_info);
!     }
!   code_helper code = STMT_VINFO_REDUC_CODE (reduc_info);
!   internal_fn reduc_fn = STMT_VINFO_REDUC_FN (reduc_info);
    tree vectype;
    machine_mode mode;
-   class loop *loop = LOOP_VINFO_LOOP (loop_vinfo), *outer_loop = NULL;
    basic_block exit_bb;
-   tree scalar_dest;
-   tree scalar_type;
    gimple *new_phi = NULL, *phi = NULL;
    gimple_stmt_iterator exit_gsi;
    tree new_temp = NULL_TREE, new_name, new_scalar_dest;
--- 5377,5388 ----
  				  slp_instance slp_node_instance,
  				  edge loop_exit)
  {
!   vect_reduc_info reduc_info = info_for_reduction (loop_vinfo, slp_node);
!   code_helper code = VECT_REDUC_INFO_CODE (reduc_info);
!   internal_fn reduc_fn = VECT_REDUC_INFO_FN (reduc_info);
    tree vectype;
    machine_mode mode;
    basic_block exit_bb;
    gimple *new_phi = NULL, *phi = NULL;
    gimple_stmt_iterator exit_gsi;
    tree new_temp = NULL_TREE, new_name, new_scalar_dest;
*************** vect_create_epilog_for_reduction (loop_v
*** 5448,5459 ****
    tree bitsize;
    tree def;
    tree orig_name, scalar_result;
!   imm_use_iterator imm_iter, phi_imm_iter;
!   use_operand_p use_p, phi_use_p;
    gimple *use_stmt;
    auto_vec<tree> reduc_inputs;
    int j, i;
!   vec<tree> &scalar_results = reduc_info->reduc_scalar_results;
    unsigned int k;
    /* SLP reduction without reduction chain, e.g.,
       # a1 = phi <a2, a0>
--- 5391,5402 ----
    tree bitsize;
    tree def;
    tree orig_name, scalar_result;
!   imm_use_iterator imm_iter;
!   use_operand_p use_p;
    gimple *use_stmt;
    auto_vec<tree> reduc_inputs;
    int j, i;
!   vec<tree> &scalar_results = VECT_REDUC_INFO_SCALAR_RESULTS (reduc_info);
    unsigned int k;
    /* SLP reduction without reduction chain, e.g.,
       # a1 = phi <a2, a0>
*************** vect_create_epilog_for_reduction (loop_v
*** 5466,5479 ****
  
    unsigned int group_size = SLP_TREE_LANES (slp_node);
  
!   if (nested_in_vect_loop_p (loop, stmt_info))
      {
!       outer_loop = loop;
!       loop = loop->inner;
!       gcc_assert (double_reduc);
      }
  
!   vectype = STMT_VINFO_REDUC_VECTYPE (reduc_info);
    gcc_assert (vectype);
    mode = TYPE_MODE (vectype);
  
--- 5409,5423 ----
  
    unsigned int group_size = SLP_TREE_LANES (slp_node);
  
!   bool double_reduc = false;
!   class loop *loop = LOOP_VINFO_LOOP (loop_vinfo);
!   if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_double_reduction_def)
      {
!       double_reduc = true;
!       gcc_assert (slp_reduc);
      }
  
!   vectype = VECT_REDUC_INFO_VECTYPE (reduc_info);
    gcc_assert (vectype);
    mode = TYPE_MODE (vectype);
  
*************** vect_create_epilog_for_reduction (loop_v
*** 5481,5492 ****
    tree adjustment_def = NULL;
    /* Optimize: for induction condition reduction, if we can't use zero
       for induc_val, use initial_def.  */
!   if (STMT_VINFO_REDUC_TYPE (reduc_info) == INTEGER_INDUC_COND_REDUCTION)
!     induc_val = STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL (reduc_info);
    else if (double_reduc)
      ;
    else
!     adjustment_def = STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT (reduc_info);
  
    stmt_vec_info single_live_out_stmt[] = { stmt_info };
    array_slice<const stmt_vec_info> live_out_stmts = single_live_out_stmt;
--- 5425,5436 ----
    tree adjustment_def = NULL;
    /* Optimize: for induction condition reduction, if we can't use zero
       for induc_val, use initial_def.  */
!   if (VECT_REDUC_INFO_TYPE (reduc_info) == INTEGER_INDUC_COND_REDUCTION)
!     induc_val = VECT_REDUC_INFO_INDUC_COND_INITIAL_VAL (reduc_info);
    else if (double_reduc)
      ;
    else
!     adjustment_def = VECT_REDUC_INFO_EPILOGUE_ADJUSTMENT (reduc_info);
  
    stmt_vec_info single_live_out_stmt[] = { stmt_info };
    array_slice<const stmt_vec_info> live_out_stmts = single_live_out_stmt;
*************** vect_create_epilog_for_reduction (loop_v
*** 5507,5520 ****
  
       PR92772: This algorithm is broken for architectures that support
       masked vectors, but do not provide fold_extract_last.  */
!   if (STMT_VINFO_REDUC_TYPE (reduc_info) == COND_REDUCTION)
      {
        auto_vec<std::pair<tree, bool>, 2> ccompares;
        slp_tree cond_node = slp_node_instance->root;
        while (cond_node != slp_node_instance->reduc_phis)
  	{
  	  stmt_vec_info cond_info = SLP_TREE_REPRESENTATIVE (cond_node);
- 	  int slp_reduc_idx;
  	  if (gimple_assign_rhs_code (cond_info->stmt) == COND_EXPR)
  	    {
  	      gimple *vec_stmt
--- 5451,5464 ----
  
       PR92772: This algorithm is broken for architectures that support
       masked vectors, but do not provide fold_extract_last.  */
!   if (VECT_REDUC_INFO_TYPE (reduc_info) == COND_REDUCTION)
      {
+       gcc_assert (!double_reduc);
        auto_vec<std::pair<tree, bool>, 2> ccompares;
        slp_tree cond_node = slp_node_instance->root;
        while (cond_node != slp_node_instance->reduc_phis)
  	{
  	  stmt_vec_info cond_info = SLP_TREE_REPRESENTATIVE (cond_node);
  	  if (gimple_assign_rhs_code (cond_info->stmt) == COND_EXPR)
  	    {
  	      gimple *vec_stmt
*************** vect_create_epilog_for_reduction (loop_v
*** 5522,5537 ****
  	      gcc_assert (gimple_assign_rhs_code (vec_stmt) == VEC_COND_EXPR);
  	      ccompares.safe_push
  		(std::make_pair (gimple_assign_rhs1 (vec_stmt),
! 				 STMT_VINFO_REDUC_IDX (cond_info) == 2));
! 	      /* ???  We probably want to have REDUC_IDX on the SLP node?
! 		 We have both three and four children COND_EXPR nodes
! 		 dependent on whether the comparison is still embedded
! 		 as GENERIC.  So work backwards.  */
! 	      slp_reduc_idx = (SLP_TREE_CHILDREN (cond_node).length () - 3
! 			       + STMT_VINFO_REDUC_IDX (cond_info));
  	    }
! 	  else
! 	    slp_reduc_idx = STMT_VINFO_REDUC_IDX (cond_info);
  	  cond_node = SLP_TREE_CHILDREN (cond_node)[slp_reduc_idx];
  	}
        gcc_assert (ccompares.length () != 0);
--- 5466,5474 ----
  	      gcc_assert (gimple_assign_rhs_code (vec_stmt) == VEC_COND_EXPR);
  	      ccompares.safe_push
  		(std::make_pair (gimple_assign_rhs1 (vec_stmt),
! 				 SLP_TREE_REDUC_IDX (cond_node) == 2));
  	    }
! 	  int slp_reduc_idx = SLP_TREE_REDUC_IDX (cond_node);
  	  cond_node = SLP_TREE_CHILDREN (cond_node)[slp_reduc_idx];
  	}
        gcc_assert (ccompares.length () != 0);
*************** vect_create_epilog_for_reduction (loop_v
*** 5637,5644 ****
    /* 2.1 Create new loop-exit-phis to preserve loop-closed form:
           v_out1 = phi <VECT_DEF>
           Store them in NEW_PHIS.  */
-   if (double_reduc)
-     loop = outer_loop;
    /* We need to reduce values in all exits.  */
    exit_bb = loop_exit->dest;
    exit_gsi = gsi_after_labels (exit_bb);
--- 5574,5579 ----
*************** vect_create_epilog_for_reduction (loop_v
*** 5661,5685 ****
        gsi_insert_seq_before (&exit_gsi, stmts, GSI_SAME_STMT);
      }
  
!   /* 2.2 Get the relevant tree-code to use in the epilog for schemes 2,3
!          (i.e. when reduc_fn is not available) and in the final adjustment
! 	 code (if needed).  Also get the original scalar reduction variable as
!          defined in the loop.  In case STMT is a "pattern-stmt" (i.e. - it
!          represents a reduction pattern), the tree-code and scalar-def are
!          taken from the original stmt that the pattern-stmt (STMT) replaces.
!          Otherwise (it is a regular reduction) - the tree-code and scalar-def
!          are taken from STMT.  */
! 
!   stmt_vec_info orig_stmt_info = vect_orig_stmt (stmt_info);
!   if (orig_stmt_info != stmt_info)
!     {
!       /* Reduction pattern  */
!       gcc_assert (STMT_VINFO_IN_PATTERN_P (orig_stmt_info));
!       gcc_assert (STMT_VINFO_RELATED_STMT (orig_stmt_info) == stmt_info);
!     }
  
!   scalar_dest = gimple_get_lhs (orig_stmt_info->stmt);
!   scalar_type = TREE_TYPE (scalar_dest);
    scalar_results.truncate (0);
    scalar_results.reserve_exact (group_size);
    new_scalar_dest = vect_create_destination_var (scalar_dest, NULL);
--- 5596,5608 ----
        gsi_insert_seq_before (&exit_gsi, stmts, GSI_SAME_STMT);
      }
  
!   /* 2.2 Get the original scalar reduction variable as defined in the loop.
! 	 In case STMT is a "pattern-stmt" (i.e. - it represents a reduction
! 	 pattern), the scalar-def is taken from the original stmt that the
! 	 pattern-stmt (STMT) replaces.  */
  
!   tree scalar_dest = gimple_get_lhs (vect_orig_stmt (stmt_info)->stmt);
!   tree scalar_type = TREE_TYPE (scalar_dest);
    scalar_results.truncate (0);
    scalar_results.reserve_exact (group_size);
    new_scalar_dest = vect_create_destination_var (scalar_dest, NULL);
*************** vect_create_epilog_for_reduction (loop_v
*** 5738,5744 ****
       the minor(?) benefit of making the epilogue loop's scalar result
       independent of the main loop's scalar result.  */
    bool unify_with_main_loop_p = false;
!   if (reduc_info->reused_accumulator
        && loop_vinfo->skip_this_loop_edge
        && single_succ_p (exit_bb)
        && single_succ (exit_bb) == loop_vinfo->skip_this_loop_edge->dest)
--- 5661,5667 ----
       the minor(?) benefit of making the epilogue loop's scalar result
       independent of the main loop's scalar result.  */
    bool unify_with_main_loop_p = false;
!   if (VECT_REDUC_INFO_REUSED_ACCUMULATOR (reduc_info)
        && loop_vinfo->skip_this_loop_edge
        && single_succ_p (exit_bb)
        && single_succ (exit_bb) == loop_vinfo->skip_this_loop_edge->dest)
*************** vect_create_epilog_for_reduction (loop_v
*** 5750,5756 ****
        gphi *new_phi = create_phi_node (reduc_inputs[0], reduc_block);
        add_phi_arg (new_phi, orig_reduc_input, single_succ_edge (exit_bb),
  		   UNKNOWN_LOCATION);
!       add_phi_arg (new_phi, reduc_info->reused_accumulator->reduc_input,
  		   loop_vinfo->skip_this_loop_edge, UNKNOWN_LOCATION);
        exit_gsi = gsi_after_labels (reduc_block);
      }
--- 5673,5680 ----
        gphi *new_phi = create_phi_node (reduc_inputs[0], reduc_block);
        add_phi_arg (new_phi, orig_reduc_input, single_succ_edge (exit_bb),
  		   UNKNOWN_LOCATION);
!       add_phi_arg (new_phi,
! 		   VECT_REDUC_INFO_REUSED_ACCUMULATOR (reduc_info)->reduc_input,
  		   loop_vinfo->skip_this_loop_edge, UNKNOWN_LOCATION);
        exit_gsi = gsi_after_labels (reduc_block);
      }
*************** vect_create_epilog_for_reduction (loop_v
*** 5758,5764 ****
    /* Shouldn't be used beyond this point.  */
    exit_bb = nullptr;
  
!   if (STMT_VINFO_REDUC_TYPE (reduc_info) == COND_REDUCTION
        && reduc_fn != IFN_LAST)
      {
        /* For condition reductions, we have a vector (REDUC_INPUTS 0) containing
--- 5682,5688 ----
    /* Shouldn't be used beyond this point.  */
    exit_bb = nullptr;
  
!   if (VECT_REDUC_INFO_TYPE (reduc_info) == COND_REDUCTION
        && reduc_fn != IFN_LAST)
      {
        /* For condition reductions, we have a vector (REDUC_INPUTS 0) containing
*************** vect_create_epilog_for_reduction (loop_v
*** 5864,5870 ****
        gsi_insert_seq_before (&exit_gsi, stmts, GSI_SAME_STMT);
        scalar_results.safe_push (new_temp);
      }
!   else if (STMT_VINFO_REDUC_TYPE (reduc_info) == COND_REDUCTION
  	   && reduc_fn == IFN_LAST)
      {
        /* Condition reduction without supported IFN_REDUC_MAX.  Generate
--- 5788,5794 ----
        gsi_insert_seq_before (&exit_gsi, stmts, GSI_SAME_STMT);
        scalar_results.safe_push (new_temp);
      }
!   else if (VECT_REDUC_INFO_TYPE (reduc_info) == COND_REDUCTION
  	   && reduc_fn == IFN_LAST)
      {
        /* Condition reduction without supported IFN_REDUC_MAX.  Generate
*************** vect_create_epilog_for_reduction (loop_v
*** 5957,5963 ****
        new_temp = gimple_convert (&stmts, scalar_type, new_temp);
        gsi_insert_seq_before (&exit_gsi, stmts, GSI_SAME_STMT);
  
!       if ((STMT_VINFO_REDUC_TYPE (reduc_info) == INTEGER_INDUC_COND_REDUCTION)
  	  && induc_val)
  	{
  	  /* Earlier we set the initial value to be a vector if induc_val
--- 5881,5887 ----
        new_temp = gimple_convert (&stmts, scalar_type, new_temp);
        gsi_insert_seq_before (&exit_gsi, stmts, GSI_SAME_STMT);
  
!       if ((VECT_REDUC_INFO_TYPE (reduc_info) == INTEGER_INDUC_COND_REDUCTION)
  	  && induc_val)
  	{
  	  /* Earlier we set the initial value to be a vector if induc_val
*************** vect_create_epilog_for_reduction (loop_v
*** 5968,5974 ****
  	  epilog_stmt = gimple_build_assign (zcompare, EQ_EXPR,
  					     new_temp, induc_val);
  	  gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT);
! 	  tree initial_def = reduc_info->reduc_initial_values[0];
  	  tmp = make_ssa_name (new_scalar_dest);
  	  epilog_stmt = gimple_build_assign (tmp, COND_EXPR, zcompare,
  					     initial_def, new_temp);
--- 5892,5898 ----
  	  epilog_stmt = gimple_build_assign (zcompare, EQ_EXPR,
  					     new_temp, induc_val);
  	  gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT);
! 	  tree initial_def = VECT_REDUC_INFO_INITIAL_VALUES (reduc_info)[0];
  	  tmp = make_ssa_name (new_scalar_dest);
  	  epilog_stmt = gimple_build_assign (tmp, COND_EXPR, zcompare,
  					     initial_def, new_temp);
*************** vect_create_epilog_for_reduction (loop_v
*** 6019,6025 ****
  	     for MIN and MAX reduction, for example.  */
  	  if (!neutral_op)
  	    {
! 	      tree scalar_value = reduc_info->reduc_initial_values[i];
  	      scalar_value = gimple_convert (&seq, TREE_TYPE (vectype),
  					     scalar_value);
  	      vector_identity = gimple_build_vector_from_val (&seq, vectype,
--- 5943,5950 ----
  	     for MIN and MAX reduction, for example.  */
  	  if (!neutral_op)
  	    {
! 	      tree scalar_value
! 		= VECT_REDUC_INFO_INITIAL_VALUES (reduc_info)[i];
  	      scalar_value = gimple_convert (&seq, TREE_TYPE (vectype),
  					     scalar_value);
  	      vector_identity = gimple_build_vector_from_val (&seq, vectype,
*************** vect_create_epilog_for_reduction (loop_v
*** 6244,6250 ****
  	  gsi_insert_seq_before (&exit_gsi, stmts, GSI_SAME_STMT);
          }
  
!       if ((STMT_VINFO_REDUC_TYPE (reduc_info) == INTEGER_INDUC_COND_REDUCTION)
  	  && induc_val)
  	{
  	  /* Earlier we set the initial value to be a vector if induc_val
--- 6169,6175 ----
  	  gsi_insert_seq_before (&exit_gsi, stmts, GSI_SAME_STMT);
          }
  
!       if ((VECT_REDUC_INFO_TYPE (reduc_info) == INTEGER_INDUC_COND_REDUCTION)
  	  && induc_val)
  	{
  	  /* Earlier we set the initial value to be a vector if induc_val
*************** vect_create_epilog_for_reduction (loop_v
*** 6255,6261 ****
  	  epilog_stmt = gimple_build_assign (zcompare, EQ_EXPR,
  					     scalar_results[0], induc_val);
  	  gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT);
! 	  tree initial_def = reduc_info->reduc_initial_values[0];
  	  tree tmp = make_ssa_name (new_scalar_dest);
  	  epilog_stmt = gimple_build_assign (tmp, COND_EXPR, zcompare,
  					     initial_def, scalar_results[0]);
--- 6180,6186 ----
  	  epilog_stmt = gimple_build_assign (zcompare, EQ_EXPR,
  					     scalar_results[0], induc_val);
  	  gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT);
! 	  tree initial_def = VECT_REDUC_INFO_INITIAL_VALUES (reduc_info)[0];
  	  tree tmp = make_ssa_name (new_scalar_dest);
  	  epilog_stmt = gimple_build_assign (tmp, COND_EXPR, zcompare,
  					     initial_def, scalar_results[0]);
*************** vect_create_epilog_for_reduction (loop_v
*** 6298,6311 ****
      }
  
    /* Record this operation if it could be reused by the epilogue loop.  */
!   if (STMT_VINFO_REDUC_TYPE (reduc_info) == TREE_CODE_REDUCTION
        && reduc_inputs.length () == 1)
      loop_vinfo->reusable_accumulators.put (scalar_results[0],
  					   { orig_reduc_input, reduc_info });
  
-   if (double_reduc)
-     loop = outer_loop;
- 
    /* 2.6  Handle the loop-exit phis.  Replace the uses of scalar loop-exit
            phis with new adjusted scalar results, i.e., replace use <s_out0>
            with use <s_out4>.
--- 6223,6233 ----
      }
  
    /* Record this operation if it could be reused by the epilogue loop.  */
!   if (VECT_REDUC_INFO_TYPE (reduc_info) == TREE_CODE_REDUCTION
        && reduc_inputs.length () == 1)
      loop_vinfo->reusable_accumulators.put (scalar_results[0],
  					   { orig_reduc_input, reduc_info });
  
    /* 2.6  Handle the loop-exit phis.  Replace the uses of scalar loop-exit
            phis with new adjusted scalar results, i.e., replace use <s_out0>
            with use <s_out4>.
*************** vect_create_epilog_for_reduction (loop_v
*** 6336,6371 ****
    for (k = 0; k < live_out_stmts.size (); k++)
      {
        stmt_vec_info scalar_stmt_info = vect_orig_stmt (live_out_stmts[k]);
!       scalar_dest = gimple_get_lhs (scalar_stmt_info->stmt);
  
        /* Find the loop-closed-use at the loop exit of the original scalar
           result.  (The reduction result is expected to have two immediate uses,
!          one at the latch block, and one at the loop exit).  For double
!          reductions we are looking for exit phis of the outer loop.  */
        FOR_EACH_IMM_USE_FAST (use_p, imm_iter, scalar_dest)
!         {
!           if (!flow_bb_inside_loop_p (loop, gimple_bb (USE_STMT (use_p))))
! 	    {
! 	      if (!is_gimple_debug (USE_STMT (use_p))
! 		  && gimple_bb (USE_STMT (use_p)) == loop_exit->dest)
! 		phis.safe_push (USE_STMT (use_p));
! 	    }
!           else
!             {
!               if (double_reduc && gimple_code (USE_STMT (use_p)) == GIMPLE_PHI)
!                 {
!                   tree phi_res = PHI_RESULT (USE_STMT (use_p));
! 
!                   FOR_EACH_IMM_USE_FAST (phi_use_p, phi_imm_iter, phi_res)
!                     {
!                       if (!flow_bb_inside_loop_p (loop,
!                                              gimple_bb (USE_STMT (phi_use_p)))
! 			  && !is_gimple_debug (USE_STMT (phi_use_p)))
!                         phis.safe_push (USE_STMT (phi_use_p));
!                     }
!                 }
!             }
!         }
  
        FOR_EACH_VEC_ELT (phis, i, exit_phi)
          {
--- 6258,6277 ----
    for (k = 0; k < live_out_stmts.size (); k++)
      {
        stmt_vec_info scalar_stmt_info = vect_orig_stmt (live_out_stmts[k]);
!       tree scalar_dest = gimple_get_lhs (scalar_stmt_info->stmt);
  
        /* Find the loop-closed-use at the loop exit of the original scalar
           result.  (The reduction result is expected to have two immediate uses,
! 	 one at the latch block, and one at the loop exit).  Note with
! 	 early break we can have two exit blocks, so pick the correct PHI.  */
        FOR_EACH_IMM_USE_FAST (use_p, imm_iter, scalar_dest)
! 	if (!is_gimple_debug (USE_STMT (use_p))
! 	    && !flow_bb_inside_loop_p (loop, gimple_bb (USE_STMT (use_p))))
! 	  {
! 	    gcc_assert (is_a <gphi *> (USE_STMT (use_p)));
! 	    if (gimple_bb (USE_STMT (use_p)) == loop_exit->dest)
! 	      phis.safe_push (USE_STMT (use_p));
! 	  }
  
        FOR_EACH_VEC_ELT (phis, i, exit_phi)
          {
*************** build_vect_cond_expr (code_helper code,
*** 6797,6809 ****
  
  static void
  vect_reduction_update_partial_vector_usage (loop_vec_info loop_vinfo,
! 					    stmt_vec_info reduc_info,
  					    slp_tree slp_node,
  					    code_helper code, tree type,
  					    tree vectype_in)
  {
!   enum vect_reduction_type reduc_type = STMT_VINFO_REDUC_TYPE (reduc_info);
!   internal_fn reduc_fn = STMT_VINFO_REDUC_FN (reduc_info);
    internal_fn cond_fn = get_conditional_internal_fn (code, type);
  
    if (reduc_type != FOLD_LEFT_REDUCTION
--- 6703,6715 ----
  
  static void
  vect_reduction_update_partial_vector_usage (loop_vec_info loop_vinfo,
! 					    vect_reduc_info reduc_info,
  					    slp_tree slp_node,
  					    code_helper code, tree type,
  					    tree vectype_in)
  {
!   enum vect_reduction_type reduc_type = VECT_REDUC_INFO_TYPE (reduc_info);
!   internal_fn reduc_fn = VECT_REDUC_INFO_FN (reduc_info);
    internal_fn cond_fn = get_conditional_internal_fn (code, type);
  
    if (reduc_type != FOLD_LEFT_REDUCTION
*************** vectorizable_lane_reducing (loop_vec_inf
*** 6897,6914 ****
    if (!type_has_mode_precision_p (type))
      return false;
  
    /* TODO: Support lane-reducing operation that does not directly participate
       in loop reduction.  */
!   if (!STMT_VINFO_REDUC_DEF (vect_orig_stmt (stmt_info))
!       || STMT_VINFO_REDUC_IDX (stmt_info) < 0)
      return false;
  
-   stmt_vec_info reduc_info = info_for_reduction (loop_vinfo, stmt_info);
- 
    /* Lane-reducing pattern inside any inner loop of LOOP_VINFO is not
       recoginized.  */
    gcc_assert (!nested_in_vect_loop_p (LOOP_VINFO_LOOP (loop_vinfo), stmt_info));
!   gcc_assert (STMT_VINFO_REDUC_TYPE (reduc_info) == TREE_CODE_REDUCTION);
  
    for (int i = 0; i < (int) gimple_num_ops (stmt) - 1; i++)
      {
--- 6803,6819 ----
    if (!type_has_mode_precision_p (type))
      return false;
  
+   vect_reduc_info reduc_info = info_for_reduction (loop_vinfo, slp_node);
+ 
    /* TODO: Support lane-reducing operation that does not directly participate
       in loop reduction.  */
!   if (!reduc_info)
      return false;
  
    /* Lane-reducing pattern inside any inner loop of LOOP_VINFO is not
       recoginized.  */
    gcc_assert (!nested_in_vect_loop_p (LOOP_VINFO_LOOP (loop_vinfo), stmt_info));
!   gcc_assert (VECT_REDUC_INFO_TYPE (reduc_info) == TREE_CODE_REDUCTION);
  
    for (int i = 0; i < (int) gimple_num_ops (stmt) - 1; i++)
      {
*************** vectorizable_reduction (loop_vec_info lo
*** 7047,7060 ****
  			stmt_vector_for_cost *cost_vec)
  {
    tree vectype_in = NULL_TREE;
-   class loop *loop = LOOP_VINFO_LOOP (loop_vinfo);
    enum vect_def_type cond_reduc_dt = vect_unknown_def_type;
    stmt_vec_info cond_stmt_vinfo = NULL;
    int i;
    int ncopies;
    bool single_defuse_cycle = false;
-   bool nested_cycle = false;
-   bool double_reduc = false;
    tree cr_index_scalar_type = NULL_TREE, cr_index_vector_type = NULL_TREE;
    tree cond_reduc_val = NULL_TREE;
    const bool reduc_chain
--- 6952,6962 ----
*************** vectorizable_reduction (loop_vec_info lo
*** 7066,7124 ****
        && STMT_VINFO_DEF_TYPE (stmt_info) != vect_nested_cycle)
      return false;
  
!   /* The stmt we store reduction analysis meta on.  */
!   stmt_vec_info reduc_info = info_for_reduction (loop_vinfo, stmt_info);
!   reduc_info->is_reduc_info = true;
  
    if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_nested_cycle)
      {
!       if (is_a <gphi *> (stmt_info->stmt))
! 	{
! 	  /* We eventually need to set a vector type on invariant
! 	     arguments.  */
! 	  unsigned j;
! 	  slp_tree child;
! 	  FOR_EACH_VEC_ELT (SLP_TREE_CHILDREN (slp_node), j, child)
! 	    if (!vect_maybe_update_slp_op_vectype
! 		   (child, SLP_TREE_VECTYPE (slp_node)))
! 	      {
! 		if (dump_enabled_p ())
! 		  dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
! 				   "incompatible vector types for "
! 				   "invariants\n");
! 		return false;
! 	      }
! 	  /* Analysis for double-reduction is done on the outer
! 	     loop PHI, nested cycles have no further restrictions.  */
! 	  SLP_TREE_TYPE (slp_node) = cycle_phi_info_type;
! 	}
!       else
! 	SLP_TREE_TYPE (slp_node) = reduc_vec_info_type;
        return true;
      }
  
-   stmt_vec_info phi_info = stmt_info;
    if (!is_a <gphi *> (stmt_info->stmt))
      {
        SLP_TREE_TYPE (slp_node) = reduc_vec_info_type;
        return true;
      }
    if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_double_reduction_def)
      {
        if (gimple_bb (stmt_info->stmt) != loop->header)
! 	{
! 	  /* For SLP we arrive here for both the inner loop LC PHI and
! 	     the outer loop PHI.  The latter is what we want to analyze
! 	     the reduction with.  The LC PHI is handled by
! 	     vectorizable_lc_phi.  */
! 	  return gimple_phi_num_args (as_a <gphi *> (stmt_info->stmt)) == 2;
! 	}
        use_operand_p use_p;
        gimple *use_stmt;
        bool res = single_imm_use (gimple_phi_result (stmt_info->stmt),
  				 &use_p, &use_stmt);
        gcc_assert (res);
        phi_info = loop_vinfo->lookup_stmt (use_stmt);
      }
  
    slp_node_instance->reduc_phis = slp_node;
--- 6968,7025 ----
        && STMT_VINFO_DEF_TYPE (stmt_info) != vect_nested_cycle)
      return false;
  
!   /* The reduction meta.  */
!   vect_reduc_info reduc_info = info_for_reduction (loop_vinfo, slp_node);
  
    if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_nested_cycle)
      {
!       gcc_assert (is_a <gphi *> (stmt_info->stmt));
!       /* We eventually need to set a vector type on invariant arguments.  */
!       unsigned j;
!       slp_tree child;
!       FOR_EACH_VEC_ELT (SLP_TREE_CHILDREN (slp_node), j, child)
! 	if (!vect_maybe_update_slp_op_vectype (child,
! 					       SLP_TREE_VECTYPE (slp_node)))
! 	  {
! 	    if (dump_enabled_p ())
! 	      dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
! 			       "incompatible vector types for "
! 			       "invariants\n");
! 	    return false;
! 	  }
!       /* Analysis for double-reduction is done on the outer
! 	 loop PHI, nested cycles have no further restrictions.  */
!       SLP_TREE_TYPE (slp_node) = cycle_phi_info_type;
        return true;
      }
  
    if (!is_a <gphi *> (stmt_info->stmt))
      {
+       gcc_assert (STMT_VINFO_DEF_TYPE (stmt_info) == vect_reduction_def);
        SLP_TREE_TYPE (slp_node) = reduc_vec_info_type;
        return true;
      }
+ 
+   class loop *loop = LOOP_VINFO_LOOP (loop_vinfo);
+   stmt_vec_info phi_info = stmt_info;
+   bool double_reduc = false;
    if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_double_reduction_def)
      {
+       /* We arrive here for both the inner loop LC PHI and the
+ 	 outer loop PHI.  The latter is what we want to analyze the
+ 	 reduction with.  The LC PHI is handled by vectorizable_lc_phi.  */
        if (gimple_bb (stmt_info->stmt) != loop->header)
! 	return false;
! 
!       /* Set loop and phi_info to the inner loop.  */
        use_operand_p use_p;
        gimple *use_stmt;
        bool res = single_imm_use (gimple_phi_result (stmt_info->stmt),
  				 &use_p, &use_stmt);
        gcc_assert (res);
        phi_info = loop_vinfo->lookup_stmt (use_stmt);
+       loop = loop->inner;
+       double_reduc = true;
      }
  
    slp_node_instance->reduc_phis = slp_node;
*************** vectorizable_reduction (loop_vec_info lo
*** 7134,7142 ****
       and compute the reduction chain length.  Discover the real
       reduction operation stmt on the way (stmt_info and slp_for_stmt_info).  */
    tree reduc_def
!     = PHI_ARG_DEF_FROM_EDGE (reduc_def_phi,
! 			     loop_latch_edge
! 			       (gimple_bb (reduc_def_phi)->loop_father));
    unsigned reduc_chain_length = 0;
    bool only_slp_reduc_chain = true;
    stmt_info = NULL;
--- 7035,7041 ----
       and compute the reduction chain length.  Discover the real
       reduction operation stmt on the way (stmt_info and slp_for_stmt_info).  */
    tree reduc_def
!     = PHI_ARG_DEF_FROM_EDGE (reduc_def_phi, loop_latch_edge (loop));
    unsigned reduc_chain_length = 0;
    bool only_slp_reduc_chain = true;
    stmt_info = NULL;
*************** vectorizable_reduction (loop_vec_info lo
*** 7144,7157 ****
    slp_tree vdef_slp = slp_node_instance->root;
    /* For double-reductions we start SLP analysis at the inner loop LC PHI
       which is the def of the outer loop live stmt.  */
!   if (STMT_VINFO_DEF_TYPE (reduc_info) == vect_double_reduction_def)
      vdef_slp = SLP_TREE_CHILDREN (vdef_slp)[0];
    while (reduc_def != PHI_RESULT (reduc_def_phi))
      {
        stmt_vec_info def = loop_vinfo->lookup_def (reduc_def);
        stmt_vec_info vdef = vect_stmt_to_vectorize (def);
        int reduc_idx = STMT_VINFO_REDUC_IDX (vdef);
!       if (reduc_idx == -1)
  	{
  	  if (dump_enabled_p ())
  	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
--- 7043,7057 ----
    slp_tree vdef_slp = slp_node_instance->root;
    /* For double-reductions we start SLP analysis at the inner loop LC PHI
       which is the def of the outer loop live stmt.  */
!   if (double_reduc)
      vdef_slp = SLP_TREE_CHILDREN (vdef_slp)[0];
    while (reduc_def != PHI_RESULT (reduc_def_phi))
      {
        stmt_vec_info def = loop_vinfo->lookup_def (reduc_def);
        stmt_vec_info vdef = vect_stmt_to_vectorize (def);
        int reduc_idx = STMT_VINFO_REDUC_IDX (vdef);
!       if (STMT_VINFO_REDUC_IDX (vdef) == -1
! 	  || SLP_TREE_REDUC_IDX (vdef_slp) == -1)
  	{
  	  if (dump_enabled_p ())
  	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
*************** vectorizable_reduction (loop_vec_info lo
*** 7160,7175 ****
  	}
        if (!REDUC_GROUP_FIRST_ELEMENT (vdef))
  	only_slp_reduc_chain = false;
-       /* For epilogue generation live members of the chain need
-          to point back to the PHI via their original stmt for
- 	 info_for_reduction to work.  For SLP we need to look at
- 	 all lanes here - even though we only will vectorize from
- 	 the SLP node with live lane zero the other live lanes also
- 	 need to be identified as part of a reduction to be able
- 	 to skip code generation for them.  */
-       for (auto s : SLP_TREE_SCALAR_STMTS (vdef_slp))
- 	if (STMT_VINFO_LIVE_P (s))
- 	  STMT_VINFO_REDUC_DEF (vect_orig_stmt (s)) = phi_info;
        gimple_match_op op;
        if (!gimple_extract_op (vdef->stmt, &op))
  	{
--- 7060,7065 ----
*************** vectorizable_reduction (loop_vec_info lo
*** 7218,7227 ****
  		    return false;
  		}
  
- 	      /* For lane-reducing operation vectorizable analysis needs the
- 		 reduction PHI information.  */
- 	      STMT_VINFO_REDUC_DEF (def) = phi_info;
- 
  	      /* To accommodate lane-reducing operations of mixed input
  		 vectypes, choose input vectype with the least lanes for the
  		 reduction PHI statement, which would result in the most
--- 7108,7113 ----
*************** vectorizable_reduction (loop_vec_info lo
*** 7234,7240 ****
  	  else if (!vectype_in)
  	    vectype_in = SLP_TREE_VECTYPE (slp_node);
  	  if (!REDUC_GROUP_FIRST_ELEMENT (vdef))
! 	    vdef_slp = SLP_TREE_CHILDREN (vdef_slp)[reduc_idx];
  	}
  
        reduc_def = op.ops[reduc_idx];
--- 7120,7129 ----
  	  else if (!vectype_in)
  	    vectype_in = SLP_TREE_VECTYPE (slp_node);
  	  if (!REDUC_GROUP_FIRST_ELEMENT (vdef))
! 	    {
! 	      gcc_assert (reduc_idx == SLP_TREE_REDUC_IDX (vdef_slp));
! 	      vdef_slp = SLP_TREE_CHILDREN (vdef_slp)[reduc_idx];
! 	    }
  	}
  
        reduc_def = op.ops[reduc_idx];
*************** vectorizable_reduction (loop_vec_info lo
*** 7243,7254 ****
    /* PHIs should not participate in patterns.  */
    gcc_assert (!STMT_VINFO_RELATED_STMT (phi_info));
  
-   if (nested_in_vect_loop_p (loop, stmt_info))
-     {
-       loop = loop->inner;
-       nested_cycle = true;
-     }
- 
    /* STMT_VINFO_REDUC_DEF doesn't point to the first but the last
       element.  */
    if (REDUC_GROUP_FIRST_ELEMENT (stmt_info))
--- 7132,7137 ----
*************** vectorizable_reduction (loop_vec_info lo
*** 7291,7297 ****
          which is defined by the loop-header-phi.  */
  
    tree vectype_out = SLP_TREE_VECTYPE (slp_for_stmt_info);
!   STMT_VINFO_REDUC_VECTYPE (reduc_info) = vectype_out;
  
    gimple_match_op op;
    if (!gimple_extract_op (stmt_info->stmt, &op))
--- 7174,7180 ----
          which is defined by the loop-header-phi.  */
  
    tree vectype_out = SLP_TREE_VECTYPE (slp_for_stmt_info);
!   VECT_REDUC_INFO_VECTYPE (reduc_info) = vectype_out;
  
    gimple_match_op op;
    if (!gimple_extract_op (stmt_info->stmt, &op))
*************** vectorizable_reduction (loop_vec_info lo
*** 7383,7390 ****
  	}
      }
  
!   enum vect_reduction_type reduction_type = STMT_VINFO_REDUC_TYPE (phi_info);
!   STMT_VINFO_REDUC_TYPE (reduc_info) = reduction_type;
    /* If we have a condition reduction, see if we can simplify it further.  */
    if (reduction_type == COND_REDUCTION)
      {
--- 7266,7272 ----
  	}
      }
  
!   enum vect_reduction_type reduction_type = VECT_REDUC_INFO_TYPE (reduc_info);
    /* If we have a condition reduction, see if we can simplify it further.  */
    if (reduction_type == COND_REDUCTION)
      {
*************** vectorizable_reduction (loop_vec_info lo
*** 7392,7398 ****
  	return false;
  
        /* When the condition uses the reduction value in the condition, fail.  */
!       if (STMT_VINFO_REDUC_IDX (stmt_info) == 0)
  	{
  	  if (dump_enabled_p ())
  	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
--- 7274,7280 ----
  	return false;
  
        /* When the condition uses the reduction value in the condition, fail.  */
!       if (SLP_TREE_REDUC_IDX (slp_node) == 0)
  	{
  	  if (dump_enabled_p ())
  	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
*************** vectorizable_reduction (loop_vec_info lo
*** 7411,7417 ****
  	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
  			     "optimizing condition reduction with"
  			     " FOLD_EXTRACT_LAST.\n");
! 	  STMT_VINFO_REDUC_TYPE (reduc_info) = EXTRACT_LAST_REDUCTION;
  	}
        else if (cond_reduc_dt == vect_induction_def)
  	{
--- 7293,7299 ----
  	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
  			     "optimizing condition reduction with"
  			     " FOLD_EXTRACT_LAST.\n");
! 	  VECT_REDUC_INFO_TYPE (reduc_info) = EXTRACT_LAST_REDUCTION;
  	}
        else if (cond_reduc_dt == vect_induction_def)
  	{
*************** vectorizable_reduction (loop_vec_info lo
*** 7455,7464 ****
  		dump_printf_loc (MSG_NOTE, vect_location,
  				 "condition expression based on "
  				 "integer induction.\n");
! 	      STMT_VINFO_REDUC_CODE (reduc_info) = cond_reduc_op_code;
! 	      STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL (reduc_info)
  		= cond_reduc_val;
! 	      STMT_VINFO_REDUC_TYPE (reduc_info) = INTEGER_INDUC_COND_REDUCTION;
  	    }
  	}
        else if (cond_reduc_dt == vect_constant_def)
--- 7337,7346 ----
  		dump_printf_loc (MSG_NOTE, vect_location,
  				 "condition expression based on "
  				 "integer induction.\n");
! 	      VECT_REDUC_INFO_CODE (reduc_info) = cond_reduc_op_code;
! 	      VECT_REDUC_INFO_INDUC_COND_INITIAL_VAL (reduc_info)
  		= cond_reduc_val;
! 	      VECT_REDUC_INFO_TYPE (reduc_info) = INTEGER_INDUC_COND_REDUCTION;
  	    }
  	}
        else if (cond_reduc_dt == vect_constant_def)
*************** vectorizable_reduction (loop_vec_info lo
*** 7479,7487 ****
  				     "condition expression based on "
  				     "compile time constant.\n");
  		  /* Record reduction code at analysis stage.  */
! 		  STMT_VINFO_REDUC_CODE (reduc_info)
  		    = integer_onep (e) ? MAX_EXPR : MIN_EXPR;
! 		  STMT_VINFO_REDUC_TYPE (reduc_info) = CONST_COND_REDUCTION;
  		}
  	    }
  	}
--- 7361,7369 ----
  				     "condition expression based on "
  				     "compile time constant.\n");
  		  /* Record reduction code at analysis stage.  */
! 		  VECT_REDUC_INFO_CODE (reduc_info)
  		    = integer_onep (e) ? MAX_EXPR : MIN_EXPR;
! 		  VECT_REDUC_INFO_TYPE (reduc_info) = CONST_COND_REDUCTION;
  		}
  	    }
  	}
*************** vectorizable_reduction (loop_vec_info lo
*** 7496,7508 ****
  
    poly_uint64 nunits_out = TYPE_VECTOR_SUBPARTS (vectype_out);
  
-   if (nested_cycle)
-     {
-       gcc_assert (STMT_VINFO_DEF_TYPE (reduc_info)
- 		  == vect_double_reduction_def);
-       double_reduc = true;
-     }
- 
    /* 4.2. Check support for the epilog operation.
  
            If STMT represents a reduction pattern, then the type of the
--- 7378,7383 ----
*************** vectorizable_reduction (loop_vec_info lo
*** 7538,7544 ****
            (and also the same tree-code) when generating the epilog code and
            when generating the code inside the loop.  */
  
!   code_helper orig_code = STMT_VINFO_REDUC_CODE (phi_info);
  
    /* If conversion might have created a conditional operation like
       IFN_COND_ADD already.  Use the internal code for the following checks.  */
--- 7413,7419 ----
            (and also the same tree-code) when generating the epilog code and
            when generating the code inside the loop.  */
  
!   code_helper orig_code = VECT_REDUC_INFO_CODE (reduc_info);
  
    /* If conversion might have created a conditional operation like
       IFN_COND_ADD already.  Use the internal code for the following checks.  */
*************** vectorizable_reduction (loop_vec_info lo
*** 7548,7556 ****
        orig_code = new_code != ERROR_MARK ? new_code : orig_code;
      }
  
!   STMT_VINFO_REDUC_CODE (reduc_info) = orig_code;
  
!   reduction_type = STMT_VINFO_REDUC_TYPE (reduc_info);
    if (reduction_type == TREE_CODE_REDUCTION)
      {
        /* Check whether it's ok to change the order of the computation.
--- 7423,7431 ----
        orig_code = new_code != ERROR_MARK ? new_code : orig_code;
      }
  
!   VECT_REDUC_INFO_CODE (reduc_info) = orig_code;
  
!   reduction_type = VECT_REDUC_INFO_TYPE (reduc_info);
    if (reduction_type == TREE_CODE_REDUCTION)
      {
        /* Check whether it's ok to change the order of the computation.
*************** vectorizable_reduction (loop_vec_info lo
*** 7590,7596 ****
  				 "supported.\n");
  	      return false;
  	    }
! 	  STMT_VINFO_REDUC_TYPE (reduc_info)
  	    = reduction_type = FOLD_LEFT_REDUCTION;
  	}
        else if (!commutative_binary_op_p (orig_code, op.type)
--- 7465,7471 ----
  				 "supported.\n");
  	      return false;
  	    }
! 	  VECT_REDUC_INFO_TYPE (reduc_info)
  	    = reduction_type = FOLD_LEFT_REDUCTION;
  	}
        else if (!commutative_binary_op_p (orig_code, op.type)
*************** vectorizable_reduction (loop_vec_info lo
*** 7639,7652 ****
  	}
        else
  	{
! 	  if (!nested_cycle || double_reduc)
! 	    {
! 	      if (dump_enabled_p ())
! 		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
! 				 "no reduc code for scalar code.\n");
  
! 	      return false;
! 	    }
  	}
      }
    else if (reduction_type == COND_REDUCTION)
--- 7514,7524 ----
  	}
        else
  	{
! 	  if (dump_enabled_p ())
! 	    dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
! 			     "no reduc code for scalar code.\n");
  
! 	  return false;
  	}
      }
    else if (reduction_type == COND_REDUCTION)
*************** vectorizable_reduction (loop_vec_info lo
*** 7661,7670 ****
  					  OPTIMIZE_FOR_SPEED))
  	reduc_fn = IFN_REDUC_MAX;
      }
!   STMT_VINFO_REDUC_FN (reduc_info) = reduc_fn;
  
    if (reduction_type != EXTRACT_LAST_REDUCTION
-       && (!nested_cycle || double_reduc)
        && reduc_fn == IFN_LAST
        && !nunits_out.is_constant ())
      {
--- 7533,7541 ----
  					  OPTIMIZE_FOR_SPEED))
  	reduc_fn = IFN_REDUC_MAX;
      }
!   VECT_REDUC_INFO_FN (reduc_info) = reduc_fn;
  
    if (reduction_type != EXTRACT_LAST_REDUCTION
        && reduc_fn == IFN_LAST
        && !nunits_out.is_constant ())
      {
*************** vectorizable_reduction (loop_vec_info lo
*** 7874,7880 ****
      dump_printf_loc (MSG_NOTE, vect_location,
  		     "using single def-use cycle for reduction by reducing "
  		     "multiple vectors to one in the loop body\n");
!   STMT_VINFO_FORCE_SINGLE_CYCLE (reduc_info) = single_defuse_cycle;
  
    /* For lane-reducing operation, the below processing related to single
       defuse-cycle will be done in its own vectorizable function.  One more
--- 7745,7751 ----
      dump_printf_loc (MSG_NOTE, vect_location,
  		     "using single def-use cycle for reduction by reducing "
  		     "multiple vectors to one in the loop body\n");
!   VECT_REDUC_INFO_FORCE_SINGLE_CYCLE (reduc_info) = single_defuse_cycle;
  
    /* For lane-reducing operation, the below processing related to single
       defuse-cycle will be done in its own vectorizable function.  One more
*************** vect_transform_reduction (loop_vec_info
*** 8015,8027 ****
    class loop *loop = LOOP_VINFO_LOOP (loop_vinfo);
    unsigned vec_num;
  
!   stmt_vec_info reduc_info = info_for_reduction (loop_vinfo, stmt_info);
!   gcc_assert (reduc_info->is_reduc_info);
  
    if (nested_in_vect_loop_p (loop, stmt_info))
      {
        loop = loop->inner;
!       gcc_assert (STMT_VINFO_DEF_TYPE (reduc_info) == vect_double_reduction_def);
      }
  
    gimple_match_op op;
--- 7886,7898 ----
    class loop *loop = LOOP_VINFO_LOOP (loop_vinfo);
    unsigned vec_num;
  
!   vect_reduc_info reduc_info = info_for_reduction (loop_vinfo, slp_node);
  
    if (nested_in_vect_loop_p (loop, stmt_info))
      {
        loop = loop->inner;
!       gcc_assert (VECT_REDUC_INFO_DEF_TYPE (reduc_info)
! 		  == vect_double_reduction_def);
      }
  
    gimple_match_op op;
*************** vect_transform_reduction (loop_vec_info
*** 8032,8038 ****
       The last use is the reduction variable.  In case of nested cycle this
       assumption is not true: we use reduc_index to record the index of the
       reduction variable.  */
!   int reduc_index = STMT_VINFO_REDUC_IDX (stmt_info);
    tree vectype_in = SLP_TREE_VECTYPE (SLP_TREE_CHILDREN (slp_node)[0]);
  
    vec_num = vect_get_num_copies (loop_vinfo, slp_node, vectype_in);
--- 7903,7909 ----
       The last use is the reduction variable.  In case of nested cycle this
       assumption is not true: we use reduc_index to record the index of the
       reduction variable.  */
!   int reduc_index = SLP_TREE_REDUC_IDX (slp_node);
    tree vectype_in = SLP_TREE_VECTYPE (SLP_TREE_CHILDREN (slp_node)[0]);
  
    vec_num = vect_get_num_copies (loop_vinfo, slp_node, vectype_in);
*************** vect_transform_reduction (loop_vec_info
*** 8068,8077 ****
  
    bool masked_loop_p = LOOP_VINFO_FULLY_MASKED_P (loop_vinfo);
  
!   vect_reduction_type reduction_type = STMT_VINFO_REDUC_TYPE (reduc_info);
    if (reduction_type == FOLD_LEFT_REDUCTION)
      {
!       internal_fn reduc_fn = STMT_VINFO_REDUC_FN (reduc_info);
        gcc_assert (code.is_tree_code () || cond_fn_p);
        return vectorize_fold_left_reduction
  	  (loop_vinfo, stmt_info, gsi, slp_node,
--- 7939,7948 ----
  
    bool masked_loop_p = LOOP_VINFO_FULLY_MASKED_P (loop_vinfo);
  
!   vect_reduction_type reduction_type = VECT_REDUC_INFO_TYPE (reduc_info);
    if (reduction_type == FOLD_LEFT_REDUCTION)
      {
!       internal_fn reduc_fn = VECT_REDUC_INFO_FN (reduc_info);
        gcc_assert (code.is_tree_code () || cond_fn_p);
        return vectorize_fold_left_reduction
  	  (loop_vinfo, stmt_info, gsi, slp_node,
*************** vect_transform_reduction (loop_vec_info
*** 8079,8085 ****
  	   reduc_index, masks, lens);
      }
  
!   bool single_defuse_cycle = STMT_VINFO_FORCE_SINGLE_CYCLE (reduc_info);
    bool lane_reducing = lane_reducing_op_p (code);
    gcc_assert (single_defuse_cycle || lane_reducing);
  
--- 7950,7956 ----
  	   reduc_index, masks, lens);
      }
  
!   bool single_defuse_cycle = VECT_REDUC_INFO_FORCE_SINGLE_CYCLE (reduc_info);
    bool lane_reducing = lane_reducing_op_p (code);
    gcc_assert (single_defuse_cycle || lane_reducing);
  
*************** vect_transform_reduction (loop_vec_info
*** 8222,8232 ****
  	{
  	  /* Find suitable def-use cycles to generate vectorized statements
  	     into, and reorder operands based on the selection.  */
! 	  unsigned curr_pos = reduc_info->reduc_result_pos;
  	  unsigned next_pos = (curr_pos + effec_ncopies) % effec_reduc_ncopies;
  
  	  gcc_assert (curr_pos < effec_reduc_ncopies);
!           reduc_info->reduc_result_pos = next_pos;
  
  	  if (curr_pos)
  	    {
--- 8093,8103 ----
  	{
  	  /* Find suitable def-use cycles to generate vectorized statements
  	     into, and reorder operands based on the selection.  */
! 	  unsigned curr_pos = VECT_REDUC_INFO_RESULT_POS (reduc_info);
  	  unsigned next_pos = (curr_pos + effec_ncopies) % effec_reduc_ncopies;
  
  	  gcc_assert (curr_pos < effec_reduc_ncopies);
! 	  VECT_REDUC_INFO_RESULT_POS (reduc_info) = next_pos;
  
  	  if (curr_pos)
  	    {
*************** vect_transform_cycle_phi (loop_vec_info
*** 8367,8377 ****
        nested_cycle = true;
      }
  
!   stmt_vec_info reduc_info = info_for_reduction (loop_vinfo, stmt_info);
!   gcc_assert (reduc_info->is_reduc_info);
! 
!   if (STMT_VINFO_REDUC_TYPE (reduc_info) == EXTRACT_LAST_REDUCTION
!       || STMT_VINFO_REDUC_TYPE (reduc_info) == FOLD_LEFT_REDUCTION)
      /* Leave the scalar phi in place.  */
      return true;
  
--- 8238,8247 ----
        nested_cycle = true;
      }
  
!   vect_reduc_info reduc_info = info_for_reduction (loop_vinfo, slp_node);
!   if (reduc_info
!       && (VECT_REDUC_INFO_TYPE (reduc_info) == EXTRACT_LAST_REDUCTION
! 	  || VECT_REDUC_INFO_TYPE (reduc_info) == FOLD_LEFT_REDUCTION))
      /* Leave the scalar phi in place.  */
      return true;
  
*************** vect_transform_cycle_phi (loop_vec_info
*** 8379,8385 ****
  
    /* Check whether we should use a single PHI node and accumulate
       vectors to one before the backedge.  */
!   if (STMT_VINFO_FORCE_SINGLE_CYCLE (reduc_info))
      vec_num = 1;
  
    /* Create the destination vector  */
--- 8249,8255 ----
  
    /* Check whether we should use a single PHI node and accumulate
       vectors to one before the backedge.  */
!   if (reduc_info && VECT_REDUC_INFO_FORCE_SINGLE_CYCLE (reduc_info))
      vec_num = 1;
  
    /* Create the destination vector  */
*************** vect_transform_cycle_phi (loop_vec_info
*** 8394,8416 ****
    /* Optimize: if initial_def is for REDUC_MAX smaller than the base
       and we can't use zero for induc_val, use initial_def.  Similarly
       for REDUC_MIN and initial_def larger than the base.  */
!   if (STMT_VINFO_REDUC_TYPE (reduc_info) == INTEGER_INDUC_COND_REDUCTION)
      {
        gcc_assert (SLP_TREE_LANES (slp_node) == 1);
        tree initial_def = vect_phi_initial_value (phi);
!       reduc_info->reduc_initial_values.safe_push (initial_def);
!       tree induc_val = STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL (reduc_info);
        if (TREE_CODE (initial_def) == INTEGER_CST
  	  && !integer_zerop (induc_val)
! 	  && ((STMT_VINFO_REDUC_CODE (reduc_info) == MAX_EXPR
  	       && tree_int_cst_lt (initial_def, induc_val))
! 	      || (STMT_VINFO_REDUC_CODE (reduc_info) == MIN_EXPR
  		  && tree_int_cst_lt (induc_val, initial_def))))
  	{
  	  induc_val = initial_def;
  	  /* Communicate we used the initial_def to epilouge
  	     generation.  */
! 	  STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL (reduc_info) = NULL_TREE;
  	}
        vec_initial_defs.quick_push
  	(build_vector_from_val (vectype_out, induc_val));
--- 8264,8287 ----
    /* Optimize: if initial_def is for REDUC_MAX smaller than the base
       and we can't use zero for induc_val, use initial_def.  Similarly
       for REDUC_MIN and initial_def larger than the base.  */
!   if (reduc_info
!       && VECT_REDUC_INFO_TYPE (reduc_info) == INTEGER_INDUC_COND_REDUCTION)
      {
        gcc_assert (SLP_TREE_LANES (slp_node) == 1);
        tree initial_def = vect_phi_initial_value (phi);
!       VECT_REDUC_INFO_INITIAL_VALUES (reduc_info).safe_push (initial_def);
!       tree induc_val = VECT_REDUC_INFO_INDUC_COND_INITIAL_VAL (reduc_info);
        if (TREE_CODE (initial_def) == INTEGER_CST
  	  && !integer_zerop (induc_val)
! 	  && ((VECT_REDUC_INFO_CODE (reduc_info) == MAX_EXPR
  	       && tree_int_cst_lt (initial_def, induc_val))
! 	      || (VECT_REDUC_INFO_CODE (reduc_info) == MIN_EXPR
  		  && tree_int_cst_lt (induc_val, initial_def))))
  	{
  	  induc_val = initial_def;
  	  /* Communicate we used the initial_def to epilouge
  	     generation.  */
! 	  VECT_REDUC_INFO_INDUC_COND_INITIAL_VAL (reduc_info) = NULL_TREE;
  	}
        vec_initial_defs.quick_push
  	(build_vector_from_val (vectype_out, induc_val));
*************** vect_transform_cycle_phi (loop_vec_info
*** 8424,8430 ****
    else
      {
        gcc_assert (slp_node == slp_node_instance->reduc_phis);
!       vec<tree> &initial_values = reduc_info->reduc_initial_values;
        vec<stmt_vec_info> &stmts = SLP_TREE_SCALAR_STMTS (slp_node);
  
        unsigned int num_phis = stmts.length ();
--- 8295,8301 ----
    else
      {
        gcc_assert (slp_node == slp_node_instance->reduc_phis);
!       vec<tree> &initial_values = VECT_REDUC_INFO_INITIAL_VALUES (reduc_info);
        vec<stmt_vec_info> &stmts = SLP_TREE_SCALAR_STMTS (slp_node);
  
        unsigned int num_phis = stmts.length ();
*************** vect_transform_cycle_phi (loop_vec_info
*** 8442,8448 ****
  	{
  	  tree initial_value
  	    = (num_phis == 1 ? initial_values[0] : NULL_TREE);
! 	  code_helper code = STMT_VINFO_REDUC_CODE (reduc_info);
  	  tree neutral_op
  	    = neutral_op_for_reduction (TREE_TYPE (vectype_out),
  					code, initial_value);
--- 8313,8319 ----
  	{
  	  tree initial_value
  	    = (num_phis == 1 ? initial_values[0] : NULL_TREE);
! 	  code_helper code = VECT_REDUC_INFO_CODE (reduc_info);
  	  tree neutral_op
  	    = neutral_op_for_reduction (TREE_TYPE (vectype_out),
  					code, initial_value);
*************** vect_transform_cycle_phi (loop_vec_info
*** 8452,8462 ****
  	     requires to keep the initial value live across the loop.  */
  	  if (neutral_op
  	      && initial_values.length () == 1
! 	      && !reduc_info->reused_accumulator
  	      && STMT_VINFO_DEF_TYPE (stmt_info) == vect_reduction_def
  	      && !operand_equal_p (neutral_op, initial_values[0]))
  	    {
! 	      STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT (reduc_info)
  		= initial_values[0];
  	      initial_values[0] = neutral_op;
  	    }
--- 8323,8333 ----
  	     requires to keep the initial value live across the loop.  */
  	  if (neutral_op
  	      && initial_values.length () == 1
! 	      && !VECT_REDUC_INFO_REUSED_ACCUMULATOR (reduc_info)
  	      && STMT_VINFO_DEF_TYPE (stmt_info) == vect_reduction_def
  	      && !operand_equal_p (neutral_op, initial_values[0]))
  	    {
! 	      VECT_REDUC_INFO_EPILOGUE_ADJUSTMENT (reduc_info)
  		= initial_values[0];
  	      initial_values[0] = neutral_op;
  	    }
*************** vect_transform_cycle_phi (loop_vec_info
*** 8472,8478 ****
        vec_initial_defs.quick_push (vec_initial_def);
      }
  
!   if (auto *accumulator = reduc_info->reused_accumulator)
      {
        tree def = accumulator->reduc_input;
        if (!useless_type_conversion_p (vectype_out, TREE_TYPE (def)))
--- 8343,8350 ----
        vec_initial_defs.quick_push (vec_initial_def);
      }
  
!   if (reduc_info)
!   if (auto *accumulator = VECT_REDUC_INFO_REUSED_ACCUMULATOR (reduc_info))
      {
        tree def = accumulator->reduc_input;
        if (!useless_type_conversion_p (vectype_out, TREE_TYPE (def)))
*************** vect_transform_cycle_phi (loop_vec_info
*** 8495,8501 ****
  					      TYPE_VECTOR_SUBPARTS
  						(vectype_out));
  	      def = vect_create_partial_epilog (def, rvectype,
! 						STMT_VINFO_REDUC_CODE
  						  (reduc_info),
  						&stmts);
  	    }
--- 8367,8373 ----
  					      TYPE_VECTOR_SUBPARTS
  						(vectype_out));
  	      def = vect_create_partial_epilog (def, rvectype,
! 						VECT_REDUC_INFO_CODE
  						  (reduc_info),
  						&stmts);
  	    }
*************** vectorizable_live_operation (vec_info *v
*** 10257,10263 ****
    /* If a stmt of a reduction is live, vectorize it via
       vect_create_epilog_for_reduction.  vectorizable_reduction assessed
       validity so just trigger the transform here.  */
!   if (STMT_VINFO_REDUC_DEF (vect_orig_stmt (stmt_info)))
      {
        if (!vec_stmt_p)
  	return true;
--- 10129,10135 ----
    /* If a stmt of a reduction is live, vectorize it via
       vect_create_epilog_for_reduction.  vectorizable_reduction assessed
       validity so just trigger the transform here.  */
!   if (vect_is_reduction (slp_node))
      {
        if (!vec_stmt_p)
  	return true;
*************** vectorizable_live_operation (vec_info *v
*** 10266,10275 ****
        if (SLP_INSTANCE_KIND (slp_node_instance) == slp_inst_kind_reduc_group
  	  && slp_index != 0)
  	return true;
!       stmt_vec_info reduc_info = info_for_reduction (loop_vinfo, stmt_info);
!       gcc_assert (reduc_info->is_reduc_info);
!       if (STMT_VINFO_REDUC_TYPE (reduc_info) == FOLD_LEFT_REDUCTION
! 	  || STMT_VINFO_REDUC_TYPE (reduc_info) == EXTRACT_LAST_REDUCTION)
  	return true;
  
        if (!LOOP_VINFO_EARLY_BREAKS (loop_vinfo)
--- 10138,10146 ----
        if (SLP_INSTANCE_KIND (slp_node_instance) == slp_inst_kind_reduc_group
  	  && slp_index != 0)
  	return true;
!       vect_reduc_info reduc_info = info_for_reduction (loop_vinfo, slp_node);
!       if (VECT_REDUC_INFO_TYPE (reduc_info) == FOLD_LEFT_REDUCTION
! 	  || VECT_REDUC_INFO_TYPE (reduc_info) == EXTRACT_LAST_REDUCTION)
  	return true;
  
        if (!LOOP_VINFO_EARLY_BREAKS (loop_vinfo)
diff -Nrcpad gcc-16-20250831/gcc/tree-vect-patterns.cc gcc-16-20250907/gcc/tree-vect-patterns.cc
*** gcc-16-20250831/gcc/tree-vect-patterns.cc	Sun Aug 31 22:34:22 2025
--- gcc-16-20250907/gcc/tree-vect-patterns.cc	Sun Sep  7 22:34:53 2025
*************** vect_recog_cond_expr_convert_pattern (ve
*** 1140,1147 ****
  	{
  	  op2 = vect_recog_temp_ssa_var (type, NULL);
  	  gimple* nop_stmt = gimple_build_assign (op2, NOP_EXPR, match[2]);
! 	  append_pattern_def_seq (vinfo, stmt_vinfo, nop_stmt,
! 				  get_vectype_for_scalar_type (vinfo, type));
  	}
      }
  
--- 1140,1146 ----
  	{
  	  op2 = vect_recog_temp_ssa_var (type, NULL);
  	  gimple* nop_stmt = gimple_build_assign (op2, NOP_EXPR, match[2]);
! 	  append_pattern_def_seq (vinfo, stmt_vinfo, nop_stmt);
  	}
      }
  
*************** vect_recog_cond_expr_convert_pattern (ve
*** 1150,1160 ****
    temp = vect_recog_temp_ssa_var (type, NULL);
    cond_stmt = gimple_build_assign (temp, build3 (COND_EXPR, type, match[3],
  						 op1, op2));
!   append_pattern_def_seq (vinfo, stmt_vinfo, cond_stmt,
! 			  get_vectype_for_scalar_type (vinfo, type));
    new_lhs = vect_recog_temp_ssa_var (TREE_TYPE (lhs), NULL);
    pattern_stmt = gimple_build_assign (new_lhs, code, temp);
!   *type_out = STMT_VINFO_VECTYPE (stmt_vinfo);
  
    if (dump_enabled_p ())
      dump_printf_loc (MSG_NOTE, vect_location,
--- 1149,1158 ----
    temp = vect_recog_temp_ssa_var (type, NULL);
    cond_stmt = gimple_build_assign (temp, build3 (COND_EXPR, type, match[3],
  						 op1, op2));
!   append_pattern_def_seq (vinfo, stmt_vinfo, cond_stmt);
    new_lhs = vect_recog_temp_ssa_var (TREE_TYPE (lhs), NULL);
    pattern_stmt = gimple_build_assign (new_lhs, code, temp);
!   *type_out = NULL_TREE;
  
    if (dump_enabled_p ())
      dump_printf_loc (MSG_NOTE, vect_location,
*************** vect_recog_vector_vector_shift_pattern (
*** 4077,4084 ****
    lhs = gimple_assign_lhs (last_stmt);
    oprnd0 = gimple_assign_rhs1 (last_stmt);
    oprnd1 = gimple_assign_rhs2 (last_stmt);
!   if (TREE_CODE (oprnd0) != SSA_NAME
!       || TREE_CODE (oprnd1) != SSA_NAME
        || TYPE_MODE (TREE_TYPE (oprnd0)) == TYPE_MODE (TREE_TYPE (oprnd1))
        || !INTEGRAL_TYPE_P (TREE_TYPE (oprnd0))
        || !type_has_mode_precision_p (TREE_TYPE (oprnd1))
--- 4075,4081 ----
    lhs = gimple_assign_lhs (last_stmt);
    oprnd0 = gimple_assign_rhs1 (last_stmt);
    oprnd1 = gimple_assign_rhs2 (last_stmt);
!   if (TREE_CODE (oprnd1) != SSA_NAME
        || TYPE_MODE (TREE_TYPE (oprnd0)) == TYPE_MODE (TREE_TYPE (oprnd1))
        || !INTEGRAL_TYPE_P (TREE_TYPE (oprnd0))
        || !type_has_mode_precision_p (TREE_TYPE (oprnd1))
*************** vect_synth_mult_by_constant (vec_info *v
*** 4330,4336 ****
--- 4327,4340 ----
  	  case alg_add_t2_m:
  	  case alg_sub_t2_m:
  	    op_uses++;
+ 	    /* Fallthru.  */
+ 	  case alg_shift:
+ 	    if (synth_shift_p && alg.log[i])
+ 	      return NULL;
  	    break;
+ 	  case alg_add_factor:
+ 	  case alg_sub_factor:
+ 	    return NULL;
  	  default:
  	    break;
  	  }
*************** vect_recog_mod_var_pattern (vec_info *vi
*** 5357,5363 ****
    gimple *pattern_stmt, *def_stmt;
    enum tree_code rhs_code;
  
!   if (!is_gimple_assign (last_stmt))
      return NULL;
  
    rhs_code = gimple_assign_rhs_code (last_stmt);
--- 5361,5367 ----
    gimple *pattern_stmt, *def_stmt;
    enum tree_code rhs_code;
  
!   if (!is_gimple_assign (last_stmt) || vect_is_reduction (stmt_vinfo))
      return NULL;
  
    rhs_code = gimple_assign_rhs_code (last_stmt);
*************** vect_recog_gather_scatter_pattern (vec_i
*** 6033,6048 ****
       This is null if the operation is unconditional.  */
    tree mask = vect_get_load_store_mask (stmt_info);
  
    /* Make sure that the target supports an appropriate internal
       function for the gather/scatter operation.  */
    gather_scatter_info gs_info;
!   if (!vect_check_gather_scatter (stmt_info, loop_vinfo, &gs_info)
        || gs_info.ifn == IFN_LAST)
      return NULL;
  
    /* Convert the mask to the right form.  */
-   tree gs_vectype = get_vectype_for_scalar_type (loop_vinfo,
- 						 gs_info.element_type);
    if (mask)
      mask = vect_convert_mask_for_vectype (mask, gs_vectype, stmt_info,
  					  loop_vinfo);
--- 6037,6053 ----
       This is null if the operation is unconditional.  */
    tree mask = vect_get_load_store_mask (stmt_info);
  
+   /* DR analysis nailed down the vector type for the access.  */
+   tree gs_vectype = STMT_VINFO_VECTYPE (stmt_info);
+ 
    /* Make sure that the target supports an appropriate internal
       function for the gather/scatter operation.  */
    gather_scatter_info gs_info;
!   if (!vect_check_gather_scatter (stmt_info, gs_vectype, loop_vinfo, &gs_info)
        || gs_info.ifn == IFN_LAST)
      return NULL;
  
    /* Convert the mask to the right form.  */
    if (mask)
      mask = vect_convert_mask_for_vectype (mask, gs_vectype, stmt_info,
  					  loop_vinfo);
*************** vect_recog_gather_scatter_pattern (vec_i
*** 6104,6111 ****
    stmt_vec_info pattern_stmt_info = loop_vinfo->add_stmt (pattern_stmt);
    loop_vinfo->move_dr (pattern_stmt_info, stmt_info);
  
!   tree vectype = STMT_VINFO_VECTYPE (stmt_info);
!   *type_out = vectype;
    vect_pattern_detected ("gather/scatter pattern", stmt_info->stmt);
  
    return pattern_stmt;
--- 6109,6115 ----
    stmt_vec_info pattern_stmt_info = loop_vinfo->add_stmt (pattern_stmt);
    loop_vinfo->move_dr (pattern_stmt_info, stmt_info);
  
!   *type_out = gs_vectype;
    vect_pattern_detected ("gather/scatter pattern", stmt_info->stmt);
  
    return pattern_stmt;
*************** vect_mark_pattern_stmts (vec_info *vinfo
*** 7068,7081 ****
  	{
  	  bool found = false;
  	  if (gimple_extract_op (s, &op))
! 	    for (unsigned i = 0; i < op.num_ops; ++i)
! 	      if (op.ops[i] == lookfor)
  		{
! 		  STMT_VINFO_REDUC_IDX (vinfo->lookup_stmt (s)) = i;
! 		  lookfor = gimple_get_lhs (s);
! 		  found = true;
! 		  break;
  		}
  	  if (s == pattern_stmt)
  	    {
  	      if (!found && dump_enabled_p ())
--- 7072,7103 ----
  	{
  	  bool found = false;
  	  if (gimple_extract_op (s, &op))
! 	    {
! 	      for (unsigned i = 0; i < op.num_ops; ++i)
! 		if (op.ops[i] == lookfor)
! 		  {
! 		    STMT_VINFO_REDUC_IDX (vinfo->lookup_stmt (s)) = i;
! 		    lookfor = gimple_get_lhs (s);
! 		    found = true;
! 		    break;
! 		  }
! 	      /* Try harder to find a mid-entry into an earlier pattern
! 		 sequence.  This means that the initial 'lookfor' was
! 		 bogus.  */
! 	      if (!found)
  		{
! 		  for (unsigned i = 0; i < op.num_ops; ++i)
! 		    if (TREE_CODE (op.ops[i]) == SSA_NAME)
! 		      if (auto def = vinfo->lookup_def (op.ops[i]))
! 			if (vect_is_reduction (def))
! 			  {
! 			    STMT_VINFO_REDUC_IDX (vinfo->lookup_stmt (s)) = i;
! 			    lookfor = gimple_get_lhs (s);
! 			    found = true;
! 			    break;
! 			  }
  		}
+ 	    }
  	  if (s == pattern_stmt)
  	    {
  	      if (!found && dump_enabled_p ())
diff -Nrcpad gcc-16-20250831/gcc/tree-vect-slp.cc gcc-16-20250907/gcc/tree-vect-slp.cc
*** gcc-16-20250831/gcc/tree-vect-slp.cc	Sun Aug 31 22:34:22 2025
--- gcc-16-20250907/gcc/tree-vect-slp.cc	Sun Sep  7 22:34:53 2025
*************** _slp_tree::_slp_tree ()
*** 126,131 ****
--- 126,133 ----
    this->avoid_stlf_fail = false;
    SLP_TREE_VECTYPE (this) = NULL_TREE;
    SLP_TREE_REPRESENTATIVE (this) = NULL;
+   this->cycle_info.id = -1;
+   this->cycle_info.reduc_idx = -1;
    SLP_TREE_REF_COUNT (this) = 1;
    this->failed = NULL;
    this->max_nunits = 1;
*************** vect_slp_child_index_for_operand (const
*** 639,645 ****
     swapping operands of father node of this one, return 1; if everything is
     ok return 0.  */
  static int
! vect_get_and_check_slp_defs (vec_info *vinfo, unsigned char swap,
  			     bool *skip_args,
  			     vec<stmt_vec_info> stmts, unsigned stmt_num,
  			     vec<slp_oprnd_info> *oprnds_info)
--- 641,647 ----
     swapping operands of father node of this one, return 1; if everything is
     ok return 0.  */
  static int
! vect_get_and_check_slp_defs (vec_info *vinfo, tree vectype, unsigned char swap,
  			     bool *skip_args,
  			     vec<stmt_vec_info> stmts, unsigned stmt_num,
  			     vec<slp_oprnd_info> *oprnds_info)
*************** vect_get_and_check_slp_defs (vec_info *v
*** 709,715 ****
  	{
  	  gcc_assert (STMT_VINFO_GATHER_SCATTER_P (stmt_info));
  	  if (!is_a <loop_vec_info> (vinfo)
! 	      || !vect_check_gather_scatter (stmt_info,
  					     as_a <loop_vec_info> (vinfo),
  					     first ? &oprnd_info->first_gs_info
  					     : &gs_info))
--- 711,717 ----
  	{
  	  gcc_assert (STMT_VINFO_GATHER_SCATTER_P (stmt_info));
  	  if (!is_a <loop_vec_info> (vinfo)
! 	      || !vect_check_gather_scatter (stmt_info, vectype,
  					     as_a <loop_vec_info> (vinfo),
  					     first ? &oprnd_info->first_gs_info
  					     : &gs_info))
*************** out:
*** 2616,2622 ****
    slp_oprnd_info oprnd_info;
    FOR_EACH_VEC_ELT (stmts, i, stmt_info)
      {
!       int res = vect_get_and_check_slp_defs (vinfo, swap[i], skip_args,
  					     stmts, i, &oprnds_info);
        if (res != 0)
  	matches[(res == -1) ? 0 : i] = false;
--- 2618,2625 ----
    slp_oprnd_info oprnd_info;
    FOR_EACH_VEC_ELT (stmts, i, stmt_info)
      {
!       int res = vect_get_and_check_slp_defs (vinfo, vectype,
! 					     swap[i], skip_args,
  					     stmts, i, &oprnds_info);
        if (res != 0)
  	matches[(res == -1) ? 0 : i] = false;
*************** out:
*** 2735,2740 ****
--- 2738,2744 ----
  
    stmt_info = stmts[0];
  
+   int reduc_idx = -1;
    int gs_scale = 0;
    tree gs_base = NULL_TREE;
  
*************** out:
*** 2826,2831 ****
--- 2830,2862 ----
  	  continue;
  	}
  
+       /* See which SLP operand a reduction chain continues on.  We want
+ 	 to chain even PHIs but not backedges.  */
+       if (VECTORIZABLE_CYCLE_DEF (oprnd_info->first_dt)
+ 	  || STMT_VINFO_REDUC_IDX (oprnd_info->def_stmts[0]) != -1)
+ 	{
+ 	  if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_nested_cycle)
+ 	    {
+ 	      if (oprnd_info->first_dt == vect_double_reduction_def)
+ 		reduc_idx = i;
+ 	    }
+ 	  else if (is_a <gphi *> (stmt_info->stmt)
+ 		   && gimple_phi_num_args
+ 			(as_a <gphi *> (stmt_info->stmt)) != 1)
+ 	    ;
+ 	  else if (STMT_VINFO_REDUC_IDX (stmt_info) == -1
+ 		   && STMT_VINFO_DEF_TYPE (stmt_info) != vect_double_reduction_def)
+ 	    ;
+ 	  else if (reduc_idx == -1)
+ 	    reduc_idx = i;
+ 	  else
+ 	    /* For .COND_* reduction operations the else value can be the
+ 	       same as one of the operation operands.  The other def
+ 	       stmts have been moved, so we can't check easily.  Check
+ 	       it's a call at least.  */
+ 	    gcc_assert (is_a <gcall *> (stmt_info->stmt));
+ 	}
+ 
        /* When we have a masked load with uniform mask discover this
  	 as a single-lane mask with a splat permute.  This way we can
  	 recognize this as a masked load-lane by stripping the splat.  */
*************** fail:
*** 3157,3162 ****
--- 3188,3228 ----
    SLP_TREE_CHILDREN (node).splice (children);
    SLP_TREE_GS_SCALE (node) = gs_scale;
    SLP_TREE_GS_BASE (node) = gs_base;
+   if (reduc_idx != -1)
+     {
+       gcc_assert (STMT_VINFO_REDUC_IDX (stmt_info) != -1
+ 		  || STMT_VINFO_DEF_TYPE (stmt_info) == vect_nested_cycle
+ 		  || STMT_VINFO_DEF_TYPE (stmt_info) == vect_double_reduction_def);
+       SLP_TREE_REDUC_IDX (node) = reduc_idx;
+       node->cycle_info.id = SLP_TREE_CHILDREN (node)[reduc_idx]->cycle_info.id;
+     }
+   /* When reaching the reduction PHI, create a vect_reduc_info.  */
+   else if ((STMT_VINFO_DEF_TYPE (stmt_info) == vect_reduction_def
+ 	    || STMT_VINFO_DEF_TYPE (stmt_info) == vect_double_reduction_def)
+ 	   && is_a <gphi *> (STMT_VINFO_STMT (stmt_info)))
+     {
+       loop_vec_info loop_vinfo = as_a <loop_vec_info> (vinfo);
+       gcc_assert (STMT_VINFO_REDUC_IDX (stmt_info) == -1);
+       node->cycle_info.id = loop_vinfo->reduc_infos.length ();
+       vect_reduc_info reduc_info = new vect_reduc_info_s ();
+       loop_vinfo->reduc_infos.safe_push (reduc_info);
+       stmt_vec_info reduc_phi = stmt_info;
+       /* ???  For double reductions vect_is_simple_reduction stores the
+ 	 reduction type and code on the inner loop header PHI.  */
+       if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_double_reduction_def)
+ 	{
+ 	  use_operand_p use_p;
+ 	  gimple *use_stmt;
+ 	  bool res = single_imm_use (gimple_phi_result (stmt_info->stmt),
+ 				     &use_p, &use_stmt);
+ 	  gcc_assert (res);
+ 	  reduc_phi = loop_vinfo->lookup_stmt (use_stmt);
+ 	}
+       VECT_REDUC_INFO_DEF_TYPE (reduc_info) = STMT_VINFO_DEF_TYPE (stmt_info);
+       VECT_REDUC_INFO_TYPE (reduc_info) = STMT_VINFO_REDUC_TYPE (reduc_phi);
+       VECT_REDUC_INFO_CODE (reduc_info) = STMT_VINFO_REDUC_CODE (reduc_phi);
+       VECT_REDUC_INFO_FN (reduc_info) = IFN_LAST;
+     }
    return node;
  }
  
*************** vect_print_slp_tree (dump_flags_t dump_k
*** 3185,3192 ****
  					 SLP_TREE_REF_COUNT (node));
    if (SLP_TREE_VECTYPE (node))
      dump_printf (metadata, " %T", SLP_TREE_VECTYPE (node));
!   dump_printf (metadata, "%s\n",
  	       node->avoid_stlf_fail ? " (avoid-stlf-fail)" : "");
    if (SLP_TREE_DEF_TYPE (node) == vect_internal_def)
      {
        if (SLP_TREE_PERMUTE_P (node))
--- 3251,3262 ----
  					 SLP_TREE_REF_COUNT (node));
    if (SLP_TREE_VECTYPE (node))
      dump_printf (metadata, " %T", SLP_TREE_VECTYPE (node));
!   dump_printf (metadata, "%s",
  	       node->avoid_stlf_fail ? " (avoid-stlf-fail)" : "");
+   if (node->cycle_info.id != -1 || node->cycle_info.reduc_idx != -1)
+     dump_printf (metadata, " cycle %d, link %d", node->cycle_info.id,
+ 		 node->cycle_info.reduc_idx);
+   dump_printf (metadata, "\n");
    if (SLP_TREE_DEF_TYPE (node) == vect_internal_def)
      {
        if (SLP_TREE_PERMUTE_P (node))
*************** vect_analyze_slp_reduc_chain (vec_info *
*** 4241,4246 ****
--- 4311,4318 ----
  					       TREE_TYPE
  					       (gimple_assign_lhs (scalar_def)),
  					       group_size);
+ 	      SLP_TREE_REDUC_IDX (conv) = 0;
+ 	      conv->cycle_info.id = node->cycle_info.id;
  	      SLP_TREE_CHILDREN (conv).quick_push (node);
  	      SLP_INSTANCE_TREE (new_instance) = conv;
  	      /* We also have to fake this conversion stmt as SLP reduction
*************** vect_optimize_slp_pass::start_choosing_l
*** 6719,6728 ****
        {
  	stmt_vec_info stmt_info
  	  = SLP_TREE_REPRESENTATIVE (SLP_INSTANCE_TREE (instance));
! 	stmt_vec_info reduc_info = info_for_reduction (m_vinfo, stmt_info);
  	if (needs_fold_left_reduction_p (TREE_TYPE
  					   (gimple_get_lhs (stmt_info->stmt)),
! 					 STMT_VINFO_REDUC_CODE (reduc_info)))
  	  {
  	    unsigned int node_i = SLP_INSTANCE_TREE (instance)->vertex;
  	    m_partitions[m_vertices[node_i].partition].layout = 0;
--- 6791,6802 ----
        {
  	stmt_vec_info stmt_info
  	  = SLP_TREE_REPRESENTATIVE (SLP_INSTANCE_TREE (instance));
! 	vect_reduc_info reduc_info
! 	  = info_for_reduction (as_a <loop_vec_info> (m_vinfo),
! 				SLP_INSTANCE_TREE (instance));
  	if (needs_fold_left_reduction_p (TREE_TYPE
  					   (gimple_get_lhs (stmt_info->stmt)),
! 					 VECT_REDUC_INFO_CODE (reduc_info)))
  	  {
  	    unsigned int node_i = SLP_INSTANCE_TREE (instance)->vertex;
  	    m_partitions[m_vertices[node_i].partition].layout = 0;
*************** vectorizable_bb_reduc_epilogue (slp_inst
*** 8627,8634 ****
  
    /* Since we replace all stmts of a possibly longer scalar reduction
       chain account for the extra scalar stmts for that.  */
!   record_stmt_cost (cost_vec, instance->remain_defs.length (), scalar_stmt,
! 		    instance->root_stmts[0], 0, vect_body);
    return true;
  }
  
--- 8701,8709 ----
  
    /* Since we replace all stmts of a possibly longer scalar reduction
       chain account for the extra scalar stmts for that.  */
!   if (!instance->remain_defs.is_empty ())
!     record_stmt_cost (cost_vec, instance->remain_defs.length (), scalar_stmt,
! 		      instance->root_stmts[0], 0, vect_body);
    return true;
  }
  
*************** vectorizable_slp_permutation (vec_info *
*** 11296,11302 ****
    if (nperms < 0)
      return false;
  
!   if (!gsi)
      record_stmt_cost (cost_vec, nperms, vec_perm, node, vectype, 0, vect_body);
  
    return true;
--- 11371,11377 ----
    if (nperms < 0)
      return false;
  
!   if (!gsi && nperms != 0)
      record_stmt_cost (cost_vec, nperms, vec_perm, node, vectype, 0, vect_body);
  
    return true;
diff -Nrcpad gcc-16-20250831/gcc/tree-vect-stmts.cc gcc-16-20250907/gcc/tree-vect-stmts.cc
*** gcc-16-20250831/gcc/tree-vect-stmts.cc	Sun Aug 31 22:34:22 2025
--- gcc-16-20250907/gcc/tree-vect-stmts.cc	Sun Sep  7 22:34:53 2025
*************** vect_mark_stmts_to_be_vectorized (loop_v
*** 891,897 ****
        if (STMT_VINFO_GATHER_SCATTER_P (stmt_vinfo))
  	{
  	  gather_scatter_info gs_info;
! 	  if (!vect_check_gather_scatter (stmt_vinfo, loop_vinfo, &gs_info))
  	    gcc_unreachable ();
  	  opt_result res
  	    = process_use (stmt_vinfo, gs_info.offset, loop_vinfo, relevant,
--- 891,899 ----
        if (STMT_VINFO_GATHER_SCATTER_P (stmt_vinfo))
  	{
  	  gather_scatter_info gs_info;
! 	  if (!vect_check_gather_scatter (stmt_vinfo,
! 					  STMT_VINFO_VECTYPE (stmt_vinfo),
! 					  loop_vinfo, &gs_info))
  	    gcc_unreachable ();
  	  opt_result res
  	    = process_use (stmt_vinfo, gs_info.offset, loop_vinfo, relevant,
*************** vect_use_strided_gather_scatters_p (stmt
*** 1738,1744 ****
  				    unsigned int group_size,
  				    bool single_element_p)
  {
!   if (!vect_check_gather_scatter (stmt_info, loop_vinfo, gs_info, elsvals)
        || gs_info->ifn == IFN_LAST)
      {
        if (!vect_truncate_gather_scatter_offset (stmt_info, vectype, loop_vinfo,
--- 1740,1747 ----
  				    unsigned int group_size,
  				    bool single_element_p)
  {
!   if (!vect_check_gather_scatter (stmt_info, vectype,
! 				  loop_vinfo, gs_info, elsvals)
        || gs_info->ifn == IFN_LAST)
      {
        if (!vect_truncate_gather_scatter_offset (stmt_info, vectype, loop_vinfo,
*************** vectorizable_call (vec_info *vinfo,
*** 3432,3438 ****
  	}
      }
  
!   int reduc_idx = STMT_VINFO_REDUC_IDX (stmt_info);
    internal_fn cond_fn = get_conditional_internal_fn (ifn);
    internal_fn cond_len_fn = get_len_internal_fn (ifn);
    int len_opno = internal_fn_len_index (cond_len_fn);
--- 3435,3441 ----
  	}
      }
  
!   int reduc_idx = SLP_TREE_REDUC_IDX (slp_node);
    internal_fn cond_fn = get_conditional_internal_fn (ifn);
    internal_fn cond_len_fn = get_len_internal_fn (ifn);
    int len_opno = internal_fn_len_index (cond_len_fn);
*************** vectorizable_operation (vec_info *vinfo,
*** 6452,6458 ****
        using_emulated_vectors_p = true;
      }
  
!   int reduc_idx = STMT_VINFO_REDUC_IDX (stmt_info);
    vec_loop_masks *masks = (loop_vinfo ? &LOOP_VINFO_MASKS (loop_vinfo) : NULL);
    vec_loop_lens *lens = (loop_vinfo ? &LOOP_VINFO_LENS (loop_vinfo) : NULL);
    internal_fn cond_fn = get_conditional_internal_fn (code);
--- 6455,6461 ----
        using_emulated_vectors_p = true;
      }
  
!   int reduc_idx = SLP_TREE_REDUC_IDX (slp_node);
    vec_loop_masks *masks = (loop_vinfo ? &LOOP_VINFO_MASKS (loop_vinfo) : NULL);
    vec_loop_lens *lens = (loop_vinfo ? &LOOP_VINFO_LENS (loop_vinfo) : NULL);
    internal_fn cond_fn = get_conditional_internal_fn (code);
*************** vectorizable_operation (vec_info *vinfo,
*** 6570,6576 ****
    else if (arith_code_with_undefined_signed_overflow (orig_code)
  	   && ANY_INTEGRAL_TYPE_P (vectype)
  	   && TYPE_OVERFLOW_UNDEFINED (vectype)
! 	   && STMT_VINFO_REDUC_IDX (stmt_info) != -1)
      {
        gcc_assert (orig_code == PLUS_EXPR || orig_code == MINUS_EXPR
  		  || orig_code == MULT_EXPR || orig_code == POINTER_PLUS_EXPR);
--- 6573,6579 ----
    else if (arith_code_with_undefined_signed_overflow (orig_code)
  	   && ANY_INTEGRAL_TYPE_P (vectype)
  	   && TYPE_OVERFLOW_UNDEFINED (vectype)
! 	   && SLP_TREE_REDUC_IDX (slp_node) != -1)
      {
        gcc_assert (orig_code == PLUS_EXPR || orig_code == MINUS_EXPR
  		  || orig_code == MULT_EXPR || orig_code == POINTER_PLUS_EXPR);
*************** vectorizable_load (vec_info *vinfo,
*** 10207,10213 ****
        if (!costing_p)
  	{
  	  if (!diff_first_stmt_info)
! 	    msq = vect_setup_realignment (vinfo, first_stmt_info, gsi,
  					  &realignment_token,
  					  alignment_support_scheme, NULL_TREE,
  					  &at_loop);
--- 10210,10216 ----
        if (!costing_p)
  	{
  	  if (!diff_first_stmt_info)
! 	    msq = vect_setup_realignment (vinfo, first_stmt_info, vectype, gsi,
  					  &realignment_token,
  					  alignment_support_scheme, NULL_TREE,
  					  &at_loop);
*************** vectorizable_load (vec_info *vinfo,
*** 10810,10817 ****
  					 stmt_info, diff);
  	  if (alignment_support_scheme == dr_explicit_realign)
  	    {
! 	      msq = vect_setup_realignment (vinfo,
! 					    first_stmt_info_for_drptr, gsi,
  					    &realignment_token,
  					    alignment_support_scheme,
  					    dataref_ptr, &at_loop);
--- 10813,10820 ----
  					 stmt_info, diff);
  	  if (alignment_support_scheme == dr_explicit_realign)
  	    {
! 	      msq = vect_setup_realignment (vinfo, first_stmt_info_for_drptr,
! 					    vectype, gsi,
  					    &realignment_token,
  					    alignment_support_scheme,
  					    dataref_ptr, &at_loop);
*************** vectorizable_load (vec_info *vinfo,
*** 11164,11171 ****
  	    tree vs = size_int (TYPE_VECTOR_SUBPARTS (vectype));
  
  	    if (compute_in_loop)
! 	      msq = vect_setup_realignment (vinfo, first_stmt_info, gsi,
! 					    &realignment_token,
  					    dr_explicit_realign,
  					    dataref_ptr, NULL);
  
--- 11167,11174 ----
  	    tree vs = size_int (TYPE_VECTOR_SUBPARTS (vectype));
  
  	    if (compute_in_loop)
! 	      msq = vect_setup_realignment (vinfo, first_stmt_info, vectype,
! 					    gsi, &realignment_token,
  					    dr_explicit_realign,
  					    dataref_ptr, NULL);
  
*************** vectorizable_load (vec_info *vinfo,
*** 11384,11391 ****
  	{
  	  vect_transform_slp_perm_load (vinfo, slp_node, vNULL, nullptr, vf,
  					true, &n_perms, nullptr);
! 	  inside_cost = record_stmt_cost (cost_vec, n_perms, vec_perm,
! 					  slp_node, 0, vect_body);
  	}
        else
  	{
--- 11387,11395 ----
  	{
  	  vect_transform_slp_perm_load (vinfo, slp_node, vNULL, nullptr, vf,
  					true, &n_perms, nullptr);
! 	  if (n_perms != 0)
! 	    inside_cost = record_stmt_cost (cost_vec, n_perms, vec_perm,
! 					    slp_node, 0, vect_body);
  	}
        else
  	{
*************** vectorizable_condition (vec_info *vinfo,
*** 11560,11579 ****
    if (code != COND_EXPR)
      return false;
  
!   stmt_vec_info reduc_info = NULL;
!   int reduc_index = -1;
    vect_reduction_type reduction_type = TREE_CODE_REDUCTION;
!   bool for_reduction
!     = STMT_VINFO_REDUC_DEF (vect_orig_stmt (stmt_info)) != NULL;
    if (for_reduction)
      {
        if (SLP_TREE_LANES (slp_node) > 1)
  	return false;
!       reduc_info = info_for_reduction (vinfo, stmt_info);
!       reduction_type = STMT_VINFO_REDUC_TYPE (reduc_info);
!       reduc_index = STMT_VINFO_REDUC_IDX (stmt_info);
!       gcc_assert (reduction_type != EXTRACT_LAST_REDUCTION
! 		  || reduc_index != -1);
      }
    else
      {
--- 11564,11587 ----
    if (code != COND_EXPR)
      return false;
  
!   int reduc_index = SLP_TREE_REDUC_IDX (slp_node);
    vect_reduction_type reduction_type = TREE_CODE_REDUCTION;
!   bool nested_cycle_p = false;
!   bool for_reduction = vect_is_reduction (stmt_info);
    if (for_reduction)
      {
        if (SLP_TREE_LANES (slp_node) > 1)
  	return false;
!       /* ???  With a reduction path we do not get at the reduction info from
! 	 every stmt, use the conservative default setting then.  */
!       if (STMT_VINFO_REDUC_DEF (vect_orig_stmt (stmt_info)))
! 	{
! 	  vect_reduc_info reduc_info
! 	    = info_for_reduction (loop_vinfo, slp_node);
! 	  reduction_type = VECT_REDUC_INFO_TYPE (reduc_info);
! 	  nested_cycle_p = nested_in_vect_loop_p (LOOP_VINFO_LOOP (loop_vinfo),
! 						  stmt_info);
! 	}
      }
    else
      {
*************** vectorizable_condition (vec_info *vinfo,
*** 11763,11769 ****
  				       vec_num, vectype, NULL);
  	    }
  	  /* Extra inactive lanes should be safe for vect_nested_cycle.  */
! 	  else if (STMT_VINFO_DEF_TYPE (reduc_info) != vect_nested_cycle)
  	    {
  	      if (dump_enabled_p ())
  		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
--- 11771,11777 ----
  				       vec_num, vectype, NULL);
  	    }
  	  /* Extra inactive lanes should be safe for vect_nested_cycle.  */
! 	  else if (!nested_cycle_p)
  	    {
  	      if (dump_enabled_p ())
  		dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location,
*************** vect_analyze_stmt (vec_info *vinfo,
*** 12594,12603 ****
          gcc_unreachable ();
      }
  
!   if (! STMT_VINFO_DATA_REF (stmt_info))
!     STMT_VINFO_VECTYPE (stmt_info) = NULL_TREE;
!   else
!     STMT_VINFO_VECTYPE (stmt_info) = SLP_TREE_VECTYPE (node);
  
    if (STMT_VINFO_RELEVANT_P (stmt_info))
      {
--- 12602,12609 ----
          gcc_unreachable ();
      }
  
!   tree saved_vectype = STMT_VINFO_VECTYPE (stmt_info);
!   STMT_VINFO_VECTYPE (stmt_info) = NULL_TREE;
  
    if (STMT_VINFO_RELEVANT_P (stmt_info))
      {
*************** vect_analyze_stmt (vec_info *vinfo,
*** 12643,12648 ****
--- 12649,12656 ----
  					      stmt_info, NULL, node,
  					      cost_vec))));
  
+   STMT_VINFO_VECTYPE (stmt_info) = saved_vectype;
+ 
    if (!ok)
      return opt_result::failure_at (stmt_info->stmt,
  				   "not vectorized:"
*************** vect_transform_stmt (vec_info *vinfo,
*** 12686,12695 ****
      dump_printf_loc (MSG_NOTE, vect_location,
  		     "------>vectorizing statement: %G", stmt_info->stmt);
  
!   if (! STMT_VINFO_DATA_REF (stmt_info))
!     STMT_VINFO_VECTYPE (stmt_info) = NULL_TREE;
!   else
!     STMT_VINFO_VECTYPE (stmt_info) = SLP_TREE_VECTYPE (slp_node);
  
    switch (SLP_TREE_TYPE (slp_node))
      {
--- 12694,12700 ----
      dump_printf_loc (MSG_NOTE, vect_location,
  		     "------>vectorizing statement: %G", stmt_info->stmt);
  
!   STMT_VINFO_VECTYPE (stmt_info) = NULL_TREE;
  
    switch (SLP_TREE_TYPE (slp_node))
      {
diff -Nrcpad gcc-16-20250831/gcc/tree-vectorizer.cc gcc-16-20250907/gcc/tree-vectorizer.cc
*** gcc-16-20250831/gcc/tree-vectorizer.cc	Sun Aug 31 22:34:22 2025
--- gcc-16-20250907/gcc/tree-vectorizer.cc	Sun Sep  7 22:34:53 2025
*************** vec_info::new_stmt_vec_info (gimple *stm
*** 719,730 ****
    STMT_VINFO_VECTORIZABLE (res) = true;
    STMT_VINFO_REDUC_TYPE (res) = TREE_CODE_REDUCTION;
    STMT_VINFO_REDUC_CODE (res) = ERROR_MARK;
-   STMT_VINFO_REDUC_FN (res) = IFN_LAST;
    STMT_VINFO_REDUC_IDX (res) = -1;
    STMT_VINFO_SLP_VECT_ONLY (res) = false;
    STMT_VINFO_SLP_VECT_ONLY_PATTERN (res) = false;
-   res->reduc_initial_values = vNULL;
-   res->reduc_scalar_results = vNULL;
  
    if (is_a <loop_vec_info> (this)
        && gimple_code (stmt) == GIMPLE_PHI
--- 719,728 ----
    STMT_VINFO_VECTORIZABLE (res) = true;
    STMT_VINFO_REDUC_TYPE (res) = TREE_CODE_REDUCTION;
    STMT_VINFO_REDUC_CODE (res) = ERROR_MARK;
    STMT_VINFO_REDUC_IDX (res) = -1;
+   STMT_VINFO_REDUC_DEF (res) = NULL;
    STMT_VINFO_SLP_VECT_ONLY (res) = false;
    STMT_VINFO_SLP_VECT_ONLY_PATTERN (res) = false;
  
    if (is_a <loop_vec_info> (this)
        && gimple_code (stmt) == GIMPLE_PHI
*************** vec_info::free_stmt_vec_info (stmt_vec_i
*** 786,793 ****
  	release_ssa_name (lhs);
      }
  
-   stmt_info->reduc_initial_values.release ();
-   stmt_info->reduc_scalar_results.release ();
    free (stmt_info);
  }
  
--- 784,789 ----
diff -Nrcpad gcc-16-20250831/gcc/tree-vectorizer.h gcc-16-20250907/gcc/tree-vectorizer.h
*** gcc-16-20250831/gcc/tree-vectorizer.h	Sun Aug 31 22:34:22 2025
--- gcc-16-20250907/gcc/tree-vectorizer.h	Sun Sep  7 22:34:53 2025
*************** struct _slp_tree {
*** 310,315 ****
--- 310,322 ----
       code generation.  */
    stmt_vec_info representative;
  
+   struct {
+       /* SLP cycle the node resides in, or -1.  */
+       int id;
+       /* The SLP operand index with the edge on the SLP cycle, or -1.  */
+       int reduc_idx;
+   } cycle_info;
+ 
    /* Load permutation relative to the stores, NULL if there is no
       permutation.  */
    load_permutation_t load_permutation;
*************** public:
*** 446,451 ****
--- 453,459 ----
  #define SLP_TREE_TYPE(S)			 (S)->type
  #define SLP_TREE_GS_SCALE(S)			 (S)->gs_scale
  #define SLP_TREE_GS_BASE(S)			 (S)->gs_base
+ #define SLP_TREE_REDUC_IDX(S)			 (S)->cycle_info.reduc_idx
  #define SLP_TREE_PERMUTE_P(S)			 ((S)->code == VEC_PERM_EXPR)
  
  inline vect_memory_access_type
*************** typedef auto_vec<rgroup_controls> vec_lo
*** 814,819 ****
--- 822,894 ----
  
  typedef auto_vec<std::pair<data_reference*, tree> > drs_init_vec;
  
+ /* Abstraction around info on reductions which is still in stmt_vec_info
+    but will be duplicated or moved elsewhere.  */
+ class vect_reduc_info_s
+ {
+ public:
+   /* The def type of the main reduction PHI, vect_reduction_def or
+      vect_double_reduction_def.  */
+   enum vect_def_type def_type;
+ 
+   /* The reduction type as detected by
+      vect_is_simple_reduction and vectorizable_reduction.  */
+   enum vect_reduction_type reduc_type;
+ 
+   /* The original scalar reduction code, to be used in the epilogue.  */
+   code_helper reduc_code;
+ 
+   /* A vector internal function we should use in the epilogue.  */
+   internal_fn reduc_fn;
+ 
+   /* For loop reduction with multiple vectorized results (ncopies > 1), a
+      lane-reducing operation participating in it may not use all of those
+      results, this field specifies result index starting from which any
+      following land-reducing operation would be assigned to.  */
+   unsigned int reduc_result_pos;
+ 
+   /* Whether we force a single cycle PHI during reduction vectorization.  */
+   bool force_single_cycle;
+ 
+   /* The vector type for performing the actual reduction operation.  */
+   tree reduc_vectype;
+ 
+   /* For INTEGER_INDUC_COND_REDUCTION, the initial value to be used.  */
+   tree induc_cond_initial_val;
+ 
+   /* If not NULL the value to be added to compute final reduction value.  */
+   tree reduc_epilogue_adjustment;
+ 
+   /* If non-null, the reduction is being performed by an epilogue loop
+      and we have decided to reuse this accumulator from the main loop.  */
+   struct vect_reusable_accumulator *reused_accumulator;
+ 
+   /* If the vector code is performing N scalar reductions in parallel,
+      this variable gives the initial scalar values of those N reductions.  */
+   auto_vec<tree> reduc_initial_values;
+ 
+   /* If the vector code is performing N scalar reductions in parallel, this
+      variable gives the vectorized code's final (scalar) result for each of
+      those N reductions.  In other words, REDUC_SCALAR_RESULTS[I] replaces
+      the original scalar code's loop-closed SSA PHI for reduction number I.  */
+   auto_vec<tree> reduc_scalar_results;
+ };
+ 
+ typedef class vect_reduc_info_s *vect_reduc_info;
+ 
+ #define VECT_REDUC_INFO_DEF_TYPE(I) ((I)->def_type)
+ #define VECT_REDUC_INFO_TYPE(I) ((I)->reduc_type)
+ #define VECT_REDUC_INFO_CODE(I) ((I)->reduc_code)
+ #define VECT_REDUC_INFO_FN(I) ((I)->reduc_fn)
+ #define VECT_REDUC_INFO_SCALAR_RESULTS(I) ((I)->reduc_scalar_results)
+ #define VECT_REDUC_INFO_INITIAL_VALUES(I) ((I)->reduc_initial_values)
+ #define VECT_REDUC_INFO_REUSED_ACCUMULATOR(I) ((I)->reused_accumulator)
+ #define VECT_REDUC_INFO_INDUC_COND_INITIAL_VAL(I) ((I)->induc_cond_initial_val)
+ #define VECT_REDUC_INFO_EPILOGUE_ADJUSTMENT(I) ((I)->reduc_epilogue_adjustment)
+ #define VECT_REDUC_INFO_VECTYPE(I) ((I)->reduc_vectype)
+ #define VECT_REDUC_INFO_FORCE_SINGLE_CYCLE(I) ((I)->force_single_cycle)
+ #define VECT_REDUC_INFO_RESULT_POS(I) ((I)->reduc_result_pos)
+ 
  /* Information about a reduction accumulator from the main loop that could
     conceivably be reused as the input to a reduction in an epilogue loop.  */
  struct vect_reusable_accumulator {
*************** struct vect_reusable_accumulator {
*** 823,829 ****
  
    /* The stmt_vec_info that describes the reduction (i.e. the one for
       which is_reduc_info is true).  */
!   stmt_vec_info reduc_info;
  };
  
  /*-----------------------------------------------------------------*/
--- 898,904 ----
  
    /* The stmt_vec_info that describes the reduction (i.e. the one for
       which is_reduc_info is true).  */
!   vect_reduc_info reduc_info;
  };
  
  /*-----------------------------------------------------------------*/
*************** public:
*** 879,884 ****
--- 954,963 ----
       the main loop, this edge is the one that skips the epilogue.  */
    edge skip_this_loop_edge;
  
+   /* Reduction descriptors of this loop.  Referenced to from SLP nodes
+      by index.  */
+   auto_vec<vect_reduc_info> reduc_infos;
+ 
    /* The vectorized form of a standard reduction replaces the original
       scalar code's final result (a loop-closed SSA PHI) with the result
       of a vector-to-scalar reduction operation.  After vectorization,
*************** public:
*** 1494,1555 ****
    /* For both loads and stores.  */
    unsigned simd_lane_access_p : 3;
  
-   /* For INTEGER_INDUC_COND_REDUCTION, the initial value to be used.  */
-   tree induc_cond_initial_val;
- 
-   /* If not NULL the value to be added to compute final reduction value.  */
-   tree reduc_epilogue_adjustment;
- 
    /* On a reduction PHI the reduction type as detected by
!      vect_is_simple_reduction and vectorizable_reduction.  */
    enum vect_reduction_type reduc_type;
  
!   /* The original reduction code, to be used in the epilogue.  */
    code_helper reduc_code;
-   /* An internal function we should use in the epilogue.  */
-   internal_fn reduc_fn;
  
!   /* On a stmt participating in the reduction the index of the operand
       on the reduction SSA cycle.  */
    int reduc_idx;
  
!   /* On a reduction PHI the def returned by vect_force_simple_reduction.
!      On the def returned by vect_force_simple_reduction the
!      corresponding PHI.  */
    stmt_vec_info reduc_def;
  
-   /* The vector type for performing the actual reduction.  */
-   tree reduc_vectype;
- 
-   /* For loop reduction with multiple vectorized results (ncopies > 1), a
-      lane-reducing operation participating in it may not use all of those
-      results, this field specifies result index starting from which any
-      following land-reducing operation would be assigned to.  */
-   unsigned int reduc_result_pos;
- 
-   /* If IS_REDUC_INFO is true and if the vector code is performing
-      N scalar reductions in parallel, this variable gives the initial
-      scalar values of those N reductions.  */
-   vec<tree> reduc_initial_values;
- 
-   /* If IS_REDUC_INFO is true and if the vector code is performing
-      N scalar reductions in parallel, this variable gives the vectorized code's
-      final (scalar) result for each of those N reductions.  In other words,
-      REDUC_SCALAR_RESULTS[I] replaces the original scalar code's loop-closed
-      SSA PHI for reduction number I.  */
-   vec<tree> reduc_scalar_results;
- 
-   /* Only meaningful if IS_REDUC_INFO.  If non-null, the reduction is
-      being performed by an epilogue loop and we have decided to reuse
-      this accumulator from the main loop.  */
-   vect_reusable_accumulator *reused_accumulator;
- 
-   /* Whether we force a single cycle PHI during reduction vectorization.  */
-   bool force_single_cycle;
- 
-   /* Whether on this stmt reduction meta is recorded.  */
-   bool is_reduc_info;
- 
    /* If nonzero, the lhs of the statement could be truncated to this
       many bits without affecting any users of the result.  */
    unsigned int min_output_precision;
--- 1573,1594 ----
    /* For both loads and stores.  */
    unsigned simd_lane_access_p : 3;
  
    /* On a reduction PHI the reduction type as detected by
!      vect_is_simple_reduction.  */
    enum vect_reduction_type reduc_type;
  
!   /* On a reduction PHI, the original reduction code as detected by
!      vect_is_simple_reduction.  */
    code_helper reduc_code;
  
!   /* On a stmt participating in a reduction the index of the operand
       on the reduction SSA cycle.  */
    int reduc_idx;
  
!   /* On a reduction PHI the def returned by vect_is_simple_reduction.
!      On the def returned by vect_is_simple_reduction the corresponding PHI.  */
    stmt_vec_info reduc_def;
  
    /* If nonzero, the lhs of the statement could be truncated to this
       many bits without affecting any users of the result.  */
    unsigned int min_output_precision;
*************** struct gather_scatter_info {
*** 1634,1643 ****
  #define STMT_VINFO_GATHER_SCATTER_P(S)	   (S)->gather_scatter_p
  #define STMT_VINFO_STRIDED_P(S)	   	   (S)->strided_p
  #define STMT_VINFO_SIMD_LANE_ACCESS_P(S)   (S)->simd_lane_access_p
- #define STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL(S) (S)->induc_cond_initial_val
- #define STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT(S) (S)->reduc_epilogue_adjustment
  #define STMT_VINFO_REDUC_IDX(S)		   (S)->reduc_idx
- #define STMT_VINFO_FORCE_SINGLE_CYCLE(S)   (S)->force_single_cycle
  
  #define STMT_VINFO_DR_WRT_VEC_LOOP(S)      (S)->dr_wrt_vec_loop
  #define STMT_VINFO_DR_BASE_ADDRESS(S)      (S)->dr_wrt_vec_loop.base_address
--- 1673,1679 ----
*************** struct gather_scatter_info {
*** 1667,1678 ****
  #define STMT_VINFO_MIN_NEG_DIST(S)	(S)->min_neg_dist
  #define STMT_VINFO_REDUC_TYPE(S)	(S)->reduc_type
  #define STMT_VINFO_REDUC_CODE(S)	(S)->reduc_code
- #define STMT_VINFO_REDUC_FN(S)		(S)->reduc_fn
  #define STMT_VINFO_REDUC_DEF(S)		(S)->reduc_def
- #define STMT_VINFO_REDUC_VECTYPE(S)     (S)->reduc_vectype
- #define STMT_VINFO_REDUC_VECTYPE_IN(S)  (S)->reduc_vectype_in
  #define STMT_VINFO_SLP_VECT_ONLY(S)     (S)->slp_vect_only_p
  #define STMT_VINFO_SLP_VECT_ONLY_PATTERN(S) (S)->slp_vect_pattern_only_p
  
  #define DR_GROUP_FIRST_ELEMENT(S) \
    (gcc_checking_assert ((S)->dr_aux.dr), (S)->first_element)
--- 1703,1712 ----
  #define STMT_VINFO_MIN_NEG_DIST(S)	(S)->min_neg_dist
  #define STMT_VINFO_REDUC_TYPE(S)	(S)->reduc_type
  #define STMT_VINFO_REDUC_CODE(S)	(S)->reduc_code
  #define STMT_VINFO_REDUC_DEF(S)		(S)->reduc_def
  #define STMT_VINFO_SLP_VECT_ONLY(S)     (S)->slp_vect_only_p
  #define STMT_VINFO_SLP_VECT_ONLY_PATTERN(S) (S)->slp_vect_pattern_only_p
+ #define STMT_VINFO_REDUC_VECTYPE_IN(S)  (S)->reduc_vectype_in
  
  #define DR_GROUP_FIRST_ELEMENT(S) \
    (gcc_checking_assert ((S)->dr_aux.dr), (S)->first_element)
*************** extern opt_result vect_prune_runtime_ali
*** 2588,2595 ****
  extern bool vect_gather_scatter_fn_p (vec_info *, bool, bool, tree, tree,
  				      tree, int, internal_fn *, tree *,
  				      vec<int> * = nullptr);
! extern bool vect_check_gather_scatter (stmt_vec_info, loop_vec_info,
! 				       gather_scatter_info *,
  				       vec<int> * = nullptr);
  extern void vect_describe_gather_scatter_call (stmt_vec_info,
  					       gather_scatter_info *);
--- 2622,2629 ----
  extern bool vect_gather_scatter_fn_p (vec_info *, bool, bool, tree, tree,
  				      tree, int, internal_fn *, tree *,
  				      vec<int> * = nullptr);
! extern bool vect_check_gather_scatter (stmt_vec_info, tree,
! 				       loop_vec_info, gather_scatter_info *,
  				       vec<int> * = nullptr);
  extern void vect_describe_gather_scatter_call (stmt_vec_info,
  					       gather_scatter_info *);
*************** extern bool vect_grouped_load_supported
*** 2613,2619 ****
  extern internal_fn vect_load_lanes_supported (tree, unsigned HOST_WIDE_INT,
  					      bool, vec<int> * = nullptr);
  extern tree vect_setup_realignment (vec_info *,
! 				    stmt_vec_info, gimple_stmt_iterator *,
  				    tree *, enum dr_alignment_support, tree,
  	                            class loop **);
  extern tree vect_get_new_vect_var (tree, enum vect_var_kind, const char *);
--- 2647,2653 ----
  extern internal_fn vect_load_lanes_supported (tree, unsigned HOST_WIDE_INT,
  					      bool, vec<int> * = nullptr);
  extern tree vect_setup_realignment (vec_info *,
! 				    stmt_vec_info, tree, gimple_stmt_iterator *,
  				    tree *, enum dr_alignment_support, tree,
  	                            class loop **);
  extern tree vect_get_new_vect_var (tree, enum vect_var_kind, const char *);
*************** extern tree vect_gen_loop_len_mask (loop
*** 2656,2662 ****
  				    unsigned int, tree, tree, unsigned int,
  				    unsigned int);
  extern gimple_seq vect_gen_len (tree, tree, tree, tree);
! extern stmt_vec_info info_for_reduction (vec_info *, stmt_vec_info);
  extern bool reduction_fn_for_scalar_code (code_helper, internal_fn *);
  
  /* Drive for loop transformation stage.  */
--- 2690,2696 ----
  				    unsigned int, tree, tree, unsigned int,
  				    unsigned int);
  extern gimple_seq vect_gen_len (tree, tree, tree, tree);
! extern vect_reduc_info info_for_reduction (loop_vec_info, slp_tree);
  extern bool reduction_fn_for_scalar_code (code_helper, internal_fn *);
  
  /* Drive for loop transformation stage.  */
*************** vect_is_store_elt_extraction (vect_cost_
*** 2872,2878 ****
  inline bool
  vect_is_reduction (stmt_vec_info stmt_info)
  {
!   return STMT_VINFO_REDUC_IDX (stmt_info) >= 0;
  }
  
  /* If STMT_INFO describes a reduction, return the vect_reduction_type
--- 2906,2919 ----
  inline bool
  vect_is_reduction (stmt_vec_info stmt_info)
  {
!   return STMT_VINFO_REDUC_IDX (stmt_info) != -1;
! }
! 
! /* Return true if SLP_NODE represents part of a reduction.  */
! inline bool
! vect_is_reduction (slp_tree slp_node)
! {
!   return SLP_TREE_REDUC_IDX (slp_node) != -1;
  }
  
  /* If STMT_INFO describes a reduction, return the vect_reduction_type
*************** vect_reduc_type (vec_info *vinfo, slp_tr
*** 2882,2894 ****
  {
    if (loop_vec_info loop_vinfo = dyn_cast<loop_vec_info> (vinfo))
      {
!       stmt_vec_info stmt_info = SLP_TREE_REPRESENTATIVE (node);
!       if (STMT_VINFO_REDUC_DEF (stmt_info))
! 	{
! 	  stmt_vec_info reduc_info
! 	    = info_for_reduction (loop_vinfo, stmt_info);
! 	  return int (STMT_VINFO_REDUC_TYPE (reduc_info));
! 	}
      }
    return -1;
  }
--- 2923,2931 ----
  {
    if (loop_vec_info loop_vinfo = dyn_cast<loop_vec_info> (vinfo))
      {
!       vect_reduc_info reduc_info = info_for_reduction (loop_vinfo, node);
!       if (reduc_info)
! 	return int (VECT_REDUC_INFO_TYPE (reduc_info));
      }
    return -1;
  }
diff -Nrcpad gcc-16-20250831/libcpp/ChangeLog gcc-16-20250907/libcpp/ChangeLog
*** gcc-16-20250831/libcpp/ChangeLog	Sun Aug 31 22:34:25 2025
--- gcc-16-20250907/libcpp/ChangeLog	Sun Sep  7 22:34:54 2025
***************
*** 1,3 ****
--- 1,9 ----
+ 2025-09-01  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* macro.cc: Implement C2Y N3457 - The __COUNTER__ predefined macro.
+ 	(_cpp_builtin_macro_text): Diagnose if __COUNTER__ reaches
+ 	2147483648 value.
+ 
  2025-08-15  Jakub Jelinek  <jakub@redhat.com>
  
  	PR preprocessor/120778
diff -Nrcpad gcc-16-20250831/libcpp/macro.cc gcc-16-20250907/libcpp/macro.cc
*** gcc-16-20250831/libcpp/macro.cc	Sun Aug 31 22:34:25 2025
--- gcc-16-20250907/libcpp/macro.cc	Sun Sep  7 22:34:54 2025
*************** _cpp_builtin_macro_text (cpp_reader *pfi
*** 733,738 ****
--- 733,741 ----
  		   "%<__COUNTER__%> expanded inside directive with "
  		   "%<-fdirectives-only%>");
        number = pfile->counter++;
+       if (number == 0x80000000U)
+ 	cpp_error (pfile, CPP_DL_ERROR,
+ 		   "%<__COUNTER__%> expanded more than 2147483648 times");
        break;
  
      case BT_HAS_ATTRIBUTE:
diff -Nrcpad gcc-16-20250831/libgcobol/ChangeLog gcc-16-20250907/libgcobol/ChangeLog
*** gcc-16-20250831/libgcobol/ChangeLog	Sun Aug 31 22:34:25 2025
--- gcc-16-20250907/libgcobol/ChangeLog	Sun Sep  7 22:34:55 2025
***************
*** 1,3 ****
--- 1,9 ----
+ 2025-09-05  Robert Dubner  <rdubner@symas.com>
+ 
+ 	* common-defs.h (enum cbl_field_attr_t): Define register_e.
+ 	* constants.cc (struct cblc_field_t): Define special registers with
+ 	"__ggsr__" prefix.
+ 
  2025-08-20  Robert Dubner  <rdubner@symas.com>
  
  	* libgcobol.cc (format_for_display_internal): Handle NumericDisplay
diff -Nrcpad gcc-16-20250831/libgcobol/common-defs.h gcc-16-20250907/libgcobol/common-defs.h
*** gcc-16-20250831/libgcobol/common-defs.h	Sun Aug 31 22:34:25 2025
--- gcc-16-20250907/libgcobol/common-defs.h	Sun Sep  7 22:34:55 2025
*************** enum cbl_field_attr_t : uint64_t {
*** 211,217 ****
    function_e        = 0x0000000100,
    quoted_e          = 0x0000000200,
    filler_e          = 0x0000000400,
!   _spare_e          = 0x0000000800, //
    intermediate_e    = 0x0000001000, // Compiler-defined temporary variable
    embiggened_e      = 0x0000002000, // redefined numeric made 64-bit by USAGE POINTER
    all_alpha_e       = 0x0000004000, // FldAlphanumeric, but all A's
--- 211,217 ----
    function_e        = 0x0000000100,
    quoted_e          = 0x0000000200,
    filler_e          = 0x0000000400,
!   register_e        = 0x0000000800, // Data definition is found in constants.cc
    intermediate_e    = 0x0000001000, // Compiler-defined temporary variable
    embiggened_e      = 0x0000002000, // redefined numeric made 64-bit by USAGE POINTER
    all_alpha_e       = 0x0000004000, // FldAlphanumeric, but all A's
diff -Nrcpad gcc-16-20250831/libgcobol/constants.cc gcc-16-20250907/libgcobol/constants.cc
*** gcc-16-20250831/libgcobol/constants.cc	Sun Aug 31 22:34:25 2025
--- gcc-16-20250907/libgcobol/constants.cc	Sun Sep  7 22:34:55 2025
*************** int __gg__globals_are_initialized = 0;
*** 70,76 ****
  
  #define INTEGER_CONSTANT1(a) \
  unsigned char __gg__data_##a[1] = {(a)};  \
! struct cblc_field_t __gg___1_##a = {    \
    .data           =  __gg__data_##a ,         \
    .capacity       = 1 ,                 \
    .allocated      = 1 ,                 \
--- 70,76 ----
  
  #define INTEGER_CONSTANT1(a) \
  unsigned char __gg__data_##a[1] = {(a)};  \
! struct cblc_field_t __ggsr___1_##a = {    \
    .data           =  __gg__data_##a ,         \
    .capacity       = 1 ,                 \
    .allocated      = 1 ,                 \
*************** struct cblc_field_t __gg___1_##a = {
*** 81,87 ****
    .parent         = NULL,               \
    .occurs_lower   = 0 ,                 \
    .occurs_upper   = 0 ,                 \
!   .attr           = 0x80 ,              \
    .type           = FldLiteralN ,       \
    .level          = 0 ,                 \
    .digits         = 0 ,                 \
--- 81,87 ----
    .parent         = NULL,               \
    .occurs_lower   = 0 ,                 \
    .occurs_upper   = 0 ,                 \
!   .attr           = global_e | constant_e , \
    .type           = FldLiteralN ,       \
    .level          = 0 ,                 \
    .digits         = 0 ,                 \
*************** struct cblc_field_t __gg___1_##a = {
*** 91,97 ****
  
  #define INTEGER_CONSTANT2(a) \
  unsigned char __gg__data_##a[1] = {(a)};  \
! struct cblc_field_t __gg___2_##a = {    \
    .data           = __gg__data_##a ,         \
    .capacity       = 1 ,                 \
    .allocate       = 1 ,                 \
--- 91,97 ----
  
  #define INTEGER_CONSTANT2(a) \
  unsigned char __gg__data_##a[1] = {(a)};  \
! struct cblc_field_t __ggsr___2_##a = {    \
    .data           = __gg__data_##a ,         \
    .capacity       = 1 ,                 \
    .allocate       = 1 ,                 \
*************** struct cblc_field_t __gg___2_##a = {
*** 102,108 ****
    .parent         = NULL,               \
    .occurs_lower   = 0 ,                 \
    .occurs_upper   = 0 ,                 \
!   .attr           = 0x80 ,              \
    .type           = FldLiteralN ,       \
    .level          = 0 ,                 \
    .digits         = 0 ,                 \
--- 102,108 ----
    .parent         = NULL,               \
    .occurs_lower   = 0 ,                 \
    .occurs_upper   = 0 ,                 \
!   .attr           = global_e | constant_e , \
    .type           = FldLiteralN ,       \
    .level          = 0 ,                 \
    .digits         = 0 ,                 \
*************** struct cblc_field_t __gg___2_##a = {
*** 111,117 ****
    };
  
  unsigned char __gg__data_space[1] = {' '};
! struct cblc_field_t __gg__space = {
    .data           = __gg__data_space ,
    .capacity       = sizeof(__gg__data_space) ,
    .allocated      = sizeof(__gg__data_space) ,
--- 111,117 ----
    };
  
  unsigned char __gg__data_space[1] = {' '};
! struct cblc_field_t __ggsr__space = {
    .data           = __gg__data_space ,
    .capacity       = sizeof(__gg__data_space) ,
    .allocated      = sizeof(__gg__data_space) ,
*************** struct cblc_field_t __gg__space = {
*** 130,136 ****
    .dummy          = 0 ,
    };
  
! struct cblc_field_t __gg__spaces = {
    .data           = __gg__data_space ,
    .capacity       = sizeof(__gg__data_space) ,
    .allocated      = sizeof(__gg__data_space) ,
--- 130,136 ----
    .dummy          = 0 ,
    };
  
! struct cblc_field_t __ggsr__spaces = {
    .data           = __gg__data_space ,
    .capacity       = sizeof(__gg__data_space) ,
    .allocated      = sizeof(__gg__data_space) ,
*************** struct cblc_field_t __gg__spaces = {
*** 150,156 ****
    };
  
  unsigned char __gg__data_low_values[1] = {'\0'};
! struct cblc_field_t __gg__low_values = {
    .data           = __gg__data_low_values,
    .capacity       = 1 ,
    .allocated      = 1 ,
--- 150,156 ----
    };
  
  unsigned char __gg__data_low_values[1] = {'\0'};
! struct cblc_field_t __ggsr__low_values = {
    .data           = __gg__data_low_values,
    .capacity       = 1 ,
    .allocated      = 1 ,
*************** struct cblc_field_t __gg__low_values = {
*** 170,176 ****
    };
  
  unsigned char __gg__data_zeros[1] = {'0'};
! struct cblc_field_t __gg__zeros = {
    .data           = __gg__data_zeros ,
    .capacity       = 1 ,
    .allocated      = 1 ,
--- 170,176 ----
    };
  
  unsigned char __gg__data_zeros[1] = {'0'};
! struct cblc_field_t __ggsr__zeros = {
    .data           = __gg__data_zeros ,
    .capacity       = 1 ,
    .allocated      = 1 ,
*************** struct cblc_field_t __gg__zeros = {
*** 190,196 ****
    };
  
  unsigned char __gg__data_high_values[1] = {0xFF};
! struct cblc_field_t __gg__high_values = {
    .data           = __gg__data_high_values ,
    .capacity       = 1 ,
    .allocated      = 1 ,
--- 190,196 ----
    };
  
  unsigned char __gg__data_high_values[1] = {0xFF};
! struct cblc_field_t __ggsr__high_values = {
    .data           = __gg__data_high_values ,
    .capacity       = 1 ,
    .allocated      = 1 ,
*************** struct cblc_field_t __gg__high_values =
*** 210,216 ****
    };
  
  unsigned char __gg__data_quotes[1] = {0xFF};
! struct cblc_field_t __gg__quotes = {
    .data           = __gg__data_quotes ,
    .capacity       = 1 ,
    .allocated      = 1 ,
--- 210,216 ----
    };
  
  unsigned char __gg__data_quotes[1] = {0xFF};
! struct cblc_field_t __ggsr__quotes = {
    .data           = __gg__data_quotes ,
    .capacity       = 1 ,
    .allocated      = 1 ,
*************** struct cblc_field_t __gg__quotes = {
*** 230,236 ****
    };
  
  unsigned char __gg__data_nulls[8] = {0,0,0,0,0,0,0,0};
! struct cblc_field_t __gg__nulls = {
    .data           = __gg__data_nulls ,
    .capacity       = 8 ,
    .allocated      = 8 ,
--- 230,236 ----
    };
  
  unsigned char __gg__data_nulls[8] = {0,0,0,0,0,0,0,0};
! struct cblc_field_t __ggsr__nulls = {
    .data           = __gg__data_nulls ,
    .capacity       = 8 ,
    .allocated      = 8 ,
*************** struct cblc_field_t __gg__nulls = {
*** 250,256 ****
    };
  
  unsigned char __gg__data__file_status[2] = {0,0};
! struct cblc_field_t __gg___file_status = {
    .data           = __gg__data__file_status ,
    .capacity       = 2 ,
    .allocated      = 2 ,
--- 250,256 ----
    };
  
  unsigned char __gg__data__file_status[2] = {0,0};
! struct cblc_field_t __ggsr___file_status = {
    .data           = __gg__data__file_status ,
    .capacity       = 2 ,
    .allocated      = 2 ,
*************** struct cblc_field_t __gg___file_status =
*** 271,277 ****
  
  
  unsigned char __gg__data_linage_counter[2] = {0,0};
! struct cblc_field_t __gg___14_linage_counter6 = {
    .data           = __gg__data_linage_counter ,
    .capacity       = 2 ,
    .allocated      = 2 ,
--- 271,277 ----
  
  
  unsigned char __gg__data_linage_counter[2] = {0,0};
! struct cblc_field_t __ggsr___14_linage_counter6 = {
    .data           = __gg__data_linage_counter ,
    .capacity       = 2 ,
    .allocated      = 2 ,
*************** struct cblc_field_t __gg___14_linage_cou
*** 292,298 ****
  
  
  unsigned char __gg__data_upsi_0[2] = {0,0};
! struct cblc_field_t __gg__upsi = {
    .data           = __gg__data_upsi_0 ,
    .capacity       = 2 ,
    .allocated      = 2 ,
--- 292,298 ----
  
  
  unsigned char __gg__data_upsi_0[2] = {0,0};
! struct cblc_field_t __ggsr__upsi_0 = {
    .data           = __gg__data_upsi_0 ,
    .capacity       = 2 ,
    .allocated      = 2 ,
*************** struct cblc_field_t __gg__upsi = {
*** 312,318 ****
    };
  
  short __gg__data_return_code = 0;
! struct cblc_field_t __gg__return_code = {
    .data           = (unsigned char *)&__gg__data_return_code ,
    .capacity       = 2 ,
    .allocated      = 2 ,
--- 312,318 ----
    };
  
  short __gg__data_return_code = 0;
! struct cblc_field_t __ggsr__return_code = {
    .data           = (unsigned char *)&__gg__data_return_code ,
    .capacity       = 2 ,
    .allocated      = 2 ,
*************** struct cblc_field_t __gg__return_code =
*** 332,338 ****
    };
  
  unsigned char __gg___data_dev_stdin[] = "/dev/stdin";
! struct cblc_field_t __gg___dev_stdin = {
    .data           = __gg___data_dev_stdin ,
    .capacity       = sizeof(__gg___data_dev_stdin)-1 ,
    .allocated       = sizeof(__gg___data_dev_stdin)-1 ,
--- 332,338 ----
    };
  
  unsigned char __gg___data_dev_stdin[] = "/dev/stdin";
! struct cblc_field_t __ggsr___dev_stdin = {
    .data           = __gg___data_dev_stdin ,
    .capacity       = sizeof(__gg___data_dev_stdin)-1 ,
    .allocated       = sizeof(__gg___data_dev_stdin)-1 ,
*************** struct cblc_field_t __gg___dev_stdin = {
*** 352,358 ****
    };
  
   unsigned char __gg___data_dev_stdout[] = "/dev/stdout";
! struct cblc_field_t __gg___dev_stdout = {
    .data           = __gg___data_dev_stdout ,
    .capacity       = sizeof(__gg___data_dev_stdout)-1 ,
    .allocated      = sizeof(__gg___data_dev_stdout)-1 ,
--- 352,358 ----
    };
  
   unsigned char __gg___data_dev_stdout[] = "/dev/stdout";
! struct cblc_field_t __ggsr___dev_stdout = {
    .data           = __gg___data_dev_stdout ,
    .capacity       = sizeof(__gg___data_dev_stdout)-1 ,
    .allocated      = sizeof(__gg___data_dev_stdout)-1 ,
*************** struct cblc_field_t __gg___dev_stdout =
*** 372,378 ****
    };
  
  unsigned char __gg___data_dev_stderr[] = "/dev/stderr";
! struct cblc_field_t __gg___dev_stderr = {
    .data           = __gg___data_dev_stderr ,
    .capacity       = sizeof(__gg___data_dev_stderr)-1 ,
    .allocated      = sizeof(__gg___data_dev_stderr)-1 ,
--- 372,378 ----
    };
  
  unsigned char __gg___data_dev_stderr[] = "/dev/stderr";
! struct cblc_field_t __ggsr___dev_stderr = {
    .data           = __gg___data_dev_stderr ,
    .capacity       = sizeof(__gg___data_dev_stderr)-1 ,
    .allocated      = sizeof(__gg___data_dev_stderr)-1 ,
*************** struct cblc_field_t __gg___dev_stderr =
*** 392,398 ****
    };
  
  unsigned char __gg___data_dev_null[] = "/dev/null";
! struct cblc_field_t __gg___dev_null = {
    .data           = __gg___data_dev_null ,
    .capacity       = sizeof(__gg___data_dev_null)-1 ,
    .allocated      = sizeof(__gg___data_dev_null)-1 ,
--- 392,398 ----
    };
  
  unsigned char __gg___data_dev_null[] = "/dev/null";
! struct cblc_field_t __ggsr___dev_null = {
    .data           = __gg___data_dev_null ,
    .capacity       = sizeof(__gg___data_dev_null)-1 ,
    .allocated      = sizeof(__gg___data_dev_null)-1 ,
*************** struct cblc_field_t __gg___dev_null = {
*** 409,414 ****
--- 409,706 ----
    .digits         = 0 ,
    .rdigits        = 0 ,
    .dummy          = 0 ,
+   };
+ 
+ unsigned char __gg__data_tally[] = {0,0};
+ struct cblc_field_t __ggsr__tally = {
+   .data           = __gg__data_tally ,
+   .capacity       = 4 ,
+   .allocated      = 4 ,
+   .offset         = 0 ,
+   .name           = "_TALLY" ,
+   .picture        = "" ,
+   .initial        = "" ,
+   .parent         = NULL,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = global_e ,
+   .type           = FldNumericBin5 ,
+   .level          = 0 ,
+   .digits         = 5 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ unsigned char __gg__data_argi[] = {0,0};
+ struct cblc_field_t __ggsr__argi = {
+   .data           = __gg__data_argi ,
+   .capacity       = 4 ,
+   .allocated      = 4 ,
+   .offset         = 0 ,
+   .name           = "_ARGI" ,
+   .picture        = "" ,
+   .initial        = "" ,
+   .parent         = NULL,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = global_e ,
+   .type           = FldNumericBin5 ,
+   .level          = 0 ,
+   .digits         = 5 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ /* The following defines storage for the global DEBUG-ITEM:
+ 
+      01 DEBUG-ITEM.
+         02 DEBUG-LINE PIC X(6).
+         02 FILLER PIC X VALUE SPACE.
+         02 DEBUG-NAME PIC X(30).
+         02 FILLER PIC X VALUE SPACE.
+         02 DEBUG-SUB-1 PIC S9999 SIGN IS LEADING SEPARATE CHARACTER.
+         02 FILLER PIC X VALUE SPACE.
+         02 DEBUG-SUB-2 PIC S9999 SIGN IS LEADING SEPARATE CHARACTER.
+         02 FILLER PIC X VALUE SPACE.
+         02 DEBUG-SUB-3 PIC S9999 SIGN IS LEADING SEPARATE CHARACTER.
+         02 FILLER PIC X VALUE SPACE.
+         02 DEBUG-CONTENTS PIC X(76).
+ */
+ 
+ unsigned char __gg__debug_item_data[132] = 
+                                  "                                      "
+                                  "+0000 +0000 +0000 "
+                                  "                                      "
+                                  "                                     ";
+ struct cblc_field_t __ggsr__debug_item = {
+   .data           = __gg__debug_item_data ,
+   .capacity       = 132 ,
+   .allocated      = 132 ,
+   .offset         = 0 ,
+   .name           = "DEBUG-ITEM" ,
+   .picture        = "" ,
+   .initial        =              "                                      "
+                                  "+0000 +0000 +0000 "
+                                  "                                      "
+                                  "                                     " ,
+   .parent         = NULL ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = register_e ,
+   .type           = FldGroup ,
+   .level          = 01 ,
+   .digits         = 0 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_line = {
+   .data           = __gg__debug_item_data + 0 ,
+   .capacity       = 6 ,
+   .allocated      = 6 ,
+   .offset         = 0 ,
+   .name           = "DEBUG-LINE" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = register_e ,
+   .type           = FldAlphanumeric ,
+   .level          = 05 ,
+   .digits         = 0 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_filler_1 = {
+   .data           = __gg__debug_item_data + 6 ,
+   .capacity       = 1 ,
+   .allocated      = 1 ,
+   .offset         = 6 ,
+   .name           = "FILLER" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = register_e | filler_e ,
+   .type           = FldAlphanumeric ,
+   .level          = 05 ,
+   .digits         = 0 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_name = {
+   .data           = __gg__debug_item_data + 7 ,
+   .capacity       = 30 ,
+   .allocated      = 30 ,
+   .offset         = 7 ,
+   .name           = "DEBUG-NAME" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = register_e ,
+   .type           = FldAlphanumeric ,
+   .level          = 05 ,
+   .digits         = 0 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_filler_2 = {
+   .data           = __gg__debug_item_data + 37 ,
+   .capacity       = 1 ,
+   .allocated      = 1 ,
+   .offset         = 37 ,
+   .name           = "FILLER" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = register_e | filler_e ,
+   .type           = FldAlphanumeric ,
+   .level          = 05 ,
+   .digits         = 0 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_sub_1 = {
+   .data           = __gg__debug_item_data + 38 ,
+   .capacity       = 5 ,
+   .allocated      = 5 ,
+   .offset         = 38 ,
+   .name           = "DEBUG-SUB-1" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = signable_e | register_e | leading_e | separate_e ,
+   .type           = FldNumericDisplay ,
+   .level          = 05 ,
+   .digits         = 4 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_filler_3 = {
+   .data           = __gg__debug_item_data + 43,
+   .capacity       =  1,
+   .allocated      =  1,
+   .offset         =  43,
+   .name           = "FILLER" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = register_e | filler_e ,
+   .type           = FldAlphanumeric ,
+   .level          = 05 ,
+   .digits         = 0 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_sub_2 = {
+   .data           = __gg__debug_item_data + 44 ,
+   .capacity       = 5 ,
+   .allocated      = 5 ,
+   .offset         = 44 ,
+   .name           = "DEBUG-SUB-2" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = signable_e | register_e | leading_e | separate_e ,
+   .type           = FldNumericDisplay ,
+   .level          = 05 ,
+   .digits         = 4 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_filler_4 = {
+   .data           = __gg__debug_item_data +  49,
+   .capacity       =  1,
+   .allocated      =  1,
+   .offset         =  49,
+   .name           = "FILLER" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = register_e | filler_e ,
+   .type           = FldAlphanumeric ,
+   .level          = 05 ,
+   .digits         = 0 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_sub_3 = {
+   .data           = __gg__debug_item_data + 50 ,
+   .capacity       = 5 ,
+   .allocated      = 5 ,
+   .offset         = 50 ,
+   .name           = "DEBUG-SUB-3" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = signable_e | register_e | leading_e | separate_e ,
+   .type           = FldNumericDisplay ,
+   .level          = 05 ,
+   .digits         = 4 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_filler_5 = {
+   .data           = __gg__debug_item_data + 55,
+   .capacity       =  1,
+   .allocated      =  1,
+   .offset         =  55,
+   .name           = "FILLER" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = register_e | filler_e ,
+   .type           = FldAlphanumeric ,
+   .level          = 05 ,
+   .digits         = 0 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
+   };
+ 
+ struct cblc_field_t __ggsr__debug_contents = {
+   .data           = __gg__debug_item_data + 56 ,
+   .capacity       = 76 ,
+   .allocated      = 76 ,
+   .offset         = 56 ,
+   .name           = "DEBUG-CONTENTS" ,
+   .picture        = "" ,
+   .initial        = NULL ,
+   .parent         = &__ggsr__debug_item ,
+   .occurs_lower   = 0 ,
+   .occurs_upper   = 0 ,
+   .attr           = signable_e | register_e | leading_e | separate_e ,
+   .type           = FldAlphanumeric ,
+   .level          = 05 ,
+   .digits         = 0 ,
+   .rdigits        = 0 ,
+   .dummy          = 0 ,
    };
  
  #pragma GCC diagnostic pop
diff -Nrcpad gcc-16-20250831/libgfortran/ChangeLog gcc-16-20250907/libgfortran/ChangeLog
*** gcc-16-20250831/libgfortran/ChangeLog	Sun Aug 31 22:34:25 2025
--- gcc-16-20250907/libgfortran/ChangeLog	Sun Sep  7 22:34:55 2025
***************
*** 1,3 ****
--- 1,9 ----
+ 2025-09-02  Paul Thomas  <pault@gcc.gnu.org>
+ 
+ 	PR fortran/87669
+ 	* intrinsics/extends_type_of.c (is_extension_of): Use the vptr
+ 	rather than the hash value to identify the types.
+ 
  2025-08-06  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
  
  	PR libfortran/121234
diff -Nrcpad gcc-16-20250831/libgfortran/intrinsics/extends_type_of.c gcc-16-20250907/libgfortran/intrinsics/extends_type_of.c
*** gcc-16-20250831/libgfortran/intrinsics/extends_type_of.c	Sun Aug 31 22:34:25 2025
--- gcc-16-20250907/libgfortran/intrinsics/extends_type_of.c	Sun Sep  7 22:34:55 2025
*************** is_extension_of (struct vtype *v1, struc
*** 58,64 ****
  
    while (v1)
      {
!       if (v1->hash == v2->hash) return 1;
        v1 = v1->extends;
      }
    return 0;
--- 58,64 ----
  
    while (v1)
      {
!       if (v1 == v2) return 1;
        v1 = v1->extends;
      }
    return 0;
diff -Nrcpad gcc-16-20250831/libgomp/ChangeLog gcc-16-20250907/libgomp/ChangeLog
*** gcc-16-20250831/libgomp/ChangeLog	Sun Aug 31 22:34:28 2025
--- gcc-16-20250907/libgomp/ChangeLog	Sun Sep  7 22:34:58 2025
***************
*** 1,3 ****
--- 1,8 ----
+ 2025-09-06  Jakub Jelinek  <jakub@redhat.com>
+ 
+ 	* omp.h.in: Fix up formatting of __cplusplus >= 201103L
+ 	guarded code from libstc++ style to GCC/libgomp style.
+ 
  2025-08-06  Kwok Cheung Yeung  <kcyeung@baylibre.com>
  
  	* target.c (gomp_update): Call gomp_merge_iterator_maps.  Free
diff -Nrcpad gcc-16-20250831/libgomp/omp.h.in gcc-16-20250907/libgomp/omp.h.in
*** gcc-16-20250831/libgomp/omp.h.in	Sun Aug 31 22:34:28 2025
--- gcc-16-20250907/libgomp/omp.h.in	Sun Sep  7 22:34:58 2025
*************** namespace allocator
*** 449,552 ****
  namespace __detail
  {
  
! template<typename __T, omp_allocator_handle_t __Handle>
  struct __allocator_templ
  {
    using value_type = __T;
!   using pointer = __T*;
!   using const_pointer = const __T*;
    using size_type = __SIZE_TYPE__;
    using difference_type = __PTRDIFF_TYPE__;
  
!   __T*
    allocate (size_type __n)
    {
!     if (__SIZE_MAX__ / sizeof(__T) < __n)
        std::__throw_bad_array_new_length ();
      void *__p = omp_aligned_alloc (alignof(__T), __n * sizeof(__T), __Handle);
      if (!__p)
        std::__throw_bad_alloc ();
!     return static_cast<__T*>(__p);
    }
  
    void
    deallocate (__T *__p, size_type) __GOMP_NOTHROW
    {
!     omp_free (static_cast<void*>(__p), __Handle);
    }
  };
  
! template<typename __T, typename __U, omp_allocator_handle_t __Handle>
  constexpr bool
! operator== (const __allocator_templ<__T, __Handle>&,
! 	    const __allocator_templ<__U, __Handle>&) __GOMP_NOTHROW
  {
    return true;
  }
  
! template<typename __T, omp_allocator_handle_t __Handle,
! 	 typename __U, omp_allocator_handle_t __UHandle>
  constexpr bool
! operator== (const __allocator_templ<__T, __Handle>&,
! 	    const __allocator_templ<__U, __UHandle>&) __GOMP_NOTHROW
  {
    return false;
  }
  
! template<typename __T, typename __U, omp_allocator_handle_t __Handle>
  constexpr bool
! operator!= (const __allocator_templ<__T, __Handle>&,
! 	    const __allocator_templ<__U, __Handle>&) __GOMP_NOTHROW
  {
    return false;
  }
  
! template<typename __T, omp_allocator_handle_t __Handle,
! 	 typename __U, omp_allocator_handle_t __UHandle>
  constexpr bool
! operator!= (const __allocator_templ<__T, __Handle>&,
! 	    const __allocator_templ<__U, __UHandle>&) __GOMP_NOTHROW
  {
    return true;
  }
  
  } /* namespace __detail */
  
! template<typename __T>
  struct null_allocator
!   : __detail::__allocator_templ<__T, omp_null_allocator> {};
  
! template<typename __T>
  struct default_mem
!   : __detail::__allocator_templ<__T, omp_default_mem_alloc> {};
  
! template<typename __T>
  struct large_cap_mem
!   : __detail::__allocator_templ<__T, omp_large_cap_mem_alloc> {};
  
! template<typename __T>
  struct const_mem
!   : __detail::__allocator_templ<__T, omp_const_mem_alloc> {};
  
! template<typename __T>
  struct high_bw_mem
!   : __detail::__allocator_templ<__T, omp_high_bw_mem_alloc> {};
  
! template<typename __T>
  struct low_lat_mem
!   : __detail::__allocator_templ<__T, omp_low_lat_mem_alloc> {};
  
! template<typename __T>
  struct cgroup_mem
!   : __detail::__allocator_templ<__T, omp_cgroup_mem_alloc> {};
  
! template<typename __T>
  struct pteam_mem
!   : __detail::__allocator_templ<__T, omp_pteam_mem_alloc> {};
  
! template<typename __T>
  struct thread_mem
!   : __detail::__allocator_templ<__T, omp_thread_mem_alloc> {};
  
  } /* namespace allocator */
  
--- 449,552 ----
  namespace __detail
  {
  
! template <typename __T, omp_allocator_handle_t __Handle>
  struct __allocator_templ
  {
    using value_type = __T;
!   using pointer = __T *;
!   using const_pointer = const __T *;
    using size_type = __SIZE_TYPE__;
    using difference_type = __PTRDIFF_TYPE__;
  
!   __T *
    allocate (size_type __n)
    {
!     if (__SIZE_MAX__ / sizeof (__T) < __n)
        std::__throw_bad_array_new_length ();
      void *__p = omp_aligned_alloc (alignof(__T), __n * sizeof(__T), __Handle);
      if (!__p)
        std::__throw_bad_alloc ();
!     return static_cast <__T *> (__p);
    }
  
    void
    deallocate (__T *__p, size_type) __GOMP_NOTHROW
    {
!     omp_free (static_cast <void *> (__p), __Handle);
    }
  };
  
! template <typename __T, typename __U, omp_allocator_handle_t __Handle>
  constexpr bool
! operator== (const __allocator_templ <__T, __Handle> &,
! 	    const __allocator_templ <__U, __Handle> &) __GOMP_NOTHROW
  {
    return true;
  }
  
! template <typename __T, omp_allocator_handle_t __Handle,
! 	  typename __U, omp_allocator_handle_t __UHandle>
  constexpr bool
! operator== (const __allocator_templ <__T, __Handle> &,
! 	    const __allocator_templ <__U, __UHandle> &) __GOMP_NOTHROW
  {
    return false;
  }
  
! template <typename __T, typename __U, omp_allocator_handle_t __Handle>
  constexpr bool
! operator!= (const __allocator_templ <__T, __Handle> &,
! 	    const __allocator_templ <__U, __Handle> &) __GOMP_NOTHROW
  {
    return false;
  }
  
! template <typename __T, omp_allocator_handle_t __Handle,
! 	  typename __U, omp_allocator_handle_t __UHandle>
  constexpr bool
! operator!= (const __allocator_templ <__T, __Handle> &,
! 	    const __allocator_templ <__U, __UHandle> &) __GOMP_NOTHROW
  {
    return true;
  }
  
  } /* namespace __detail */
  
! template <typename __T>
  struct null_allocator
!   : __detail::__allocator_templ <__T, omp_null_allocator> {};
  
! template <typename __T>
  struct default_mem
!   : __detail::__allocator_templ <__T, omp_default_mem_alloc> {};
  
! template <typename __T>
  struct large_cap_mem
!   : __detail::__allocator_templ <__T, omp_large_cap_mem_alloc> {};
  
! template <typename __T>
  struct const_mem
!   : __detail::__allocator_templ <__T, omp_const_mem_alloc> {};
  
! template <typename __T>
  struct high_bw_mem
!   : __detail::__allocator_templ <__T, omp_high_bw_mem_alloc> {};
  
! template <typename __T>
  struct low_lat_mem
!   : __detail::__allocator_templ <__T, omp_low_lat_mem_alloc> {};
  
! template <typename __T>
  struct cgroup_mem
!   : __detail::__allocator_templ <__T, omp_cgroup_mem_alloc> {};
  
! template <typename __T>
  struct pteam_mem
!   : __detail::__allocator_templ <__T, omp_pteam_mem_alloc> {};
  
! template <typename __T>
  struct thread_mem
!   : __detail::__allocator_templ <__T, omp_thread_mem_alloc> {};
  
  } /* namespace allocator */
  
*************** namespace ompx
*** 558,566 ****
  namespace allocator
  {
  
! template<typename __T>
  struct gnu_pinned_mem
!   : omp::allocator::__detail::__allocator_templ<__T, ompx_gnu_pinned_mem_alloc> {};
  
  } /* namespace allocator */
  
--- 558,567 ----
  namespace allocator
  {
  
! template <typename __T>
  struct gnu_pinned_mem
!   : omp::allocator::__detail::__allocator_templ <__T,
! 						 ompx_gnu_pinned_mem_alloc> {};
  
  } /* namespace allocator */
  
diff -Nrcpad gcc-16-20250831/libphobos/ChangeLog gcc-16-20250907/libphobos/ChangeLog
*** gcc-16-20250831/libphobos/ChangeLog	Sun Aug 31 22:34:29 2025
--- gcc-16-20250907/libphobos/ChangeLog	Sun Sep  7 22:34:59 2025
***************
*** 1,3 ****
--- 1,8 ----
+ 2025-09-02  Iain Sandoe  <iain@sandoe.co.uk>
+ 
+ 	* libdruntime/core/thread/osthread.d: Use PPC_THREAD_STATE
+ 	instead of PPC_THREAD_STATE32.
+ 
  2025-07-01  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
  
  	* configure.tgt <i?86-*-darwin1[2-7]>: Also consider minor
diff -Nrcpad gcc-16-20250831/libphobos/configure.tgt gcc-16-20250907/libphobos/configure.tgt
*** gcc-16-20250831/libphobos/configure.tgt	Sun Aug 31 22:34:29 2025
--- gcc-16-20250907/libphobos/configure.tgt	Sun Sep  7 22:34:59 2025
*************** case "${target}" in
*** 36,42 ****
    arm*-*-linux*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
!   hppa-*-linux*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
    loongarch*-*-linux*)
--- 36,42 ----
    arm*-*-linux*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
!   hppa-*-linux* | hppa[12]*-*-linux*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
    loongarch*-*-linux*)
*************** case "${target}" in
*** 48,53 ****
--- 48,62 ----
    power*-*-freebsd*)
  	LIBPHOBOS_SUPPORTED=yes
  	;;
+   powerpc64le-*linux*)
+ 	LIBPHOBOS_SUPPORTED=yes
+ 	case "$ac_configure_args" in
+ 	  *--with-long-double-format=ieee*)
+ 	    ;;
+ 	  *)
+ 	    LIBDRUNTIME_ONLY=yes
+ 	esac
+ 	;;
    power*-*-linux*)
  	LIBPHOBOS_SUPPORTED=yes
  	LIBDRUNTIME_ONLY=yes
diff -Nrcpad gcc-16-20250831/libphobos/libdruntime/core/thread/osthread.d gcc-16-20250907/libphobos/libdruntime/core/thread/osthread.d
*** gcc-16-20250831/libphobos/libdruntime/core/thread/osthread.d	Sun Aug 31 22:34:29 2025
--- gcc-16-20250907/libphobos/libdruntime/core/thread/osthread.d	Sun Sep  7 22:35:00 2025
*************** else version (Posix)
*** 110,116 ****
          else version (PPC)
          {
              import core.sys.darwin.mach.thread_act :
!              PPC_THREAD_STATE32, PPC_THREAD_STATE32_COUNT, ppc_thread_state32_t;
          }
          else version (PPC64)
          {
--- 110,116 ----
          else version (PPC)
          {
              import core.sys.darwin.mach.thread_act :
!              PPC_THREAD_STATE, PPC_THREAD_STATE_COUNT, ppc_thread_state_t;
          }
          else version (PPC64)
          {
diff -Nrcpad gcc-16-20250831/libstdc++-v3/ChangeLog gcc-16-20250907/libstdc++-v3/ChangeLog
*** gcc-16-20250831/libstdc++-v3/ChangeLog	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/ChangeLog	Sun Sep  7 22:35:00 2025
***************
*** 1,3 ****
--- 1,148 ----
+ 2025-09-05  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	PR libstdc++/121804
+ 	* include/std/ranges (join_view::_Iterator::_M_get_inner):
+ 	Mark noexcept.
+ 	* testsuite/std/ranges/adaptors/join.cc (test16): New test.
+ 
+ 2025-09-05  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* doc/html/manual/status.html: Regenerate.
+ 	* doc/xml/manual/status_cxx2011.xml: Add entry for bad_function_call.
+ 	* doc/xml/manual/status_cxx2017.xml: Add entries for bad_any_cast
+ 	and nullptr_t output. Update entry for sf.cmath. Fix stable name for
+ 	mem.res.
+ 
+ 2025-09-05  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* doc/html/manual/status.html: Regenerate the file.
+ 	* doc/xml/manual/status_cxx2017.xml: Addd more entires.
+ 
+ 2025-09-04  Patrick Palka  <ppalka@redhat.com>
+ 
+ 	* include/std/ranges (join_view::_Iterator::_M_satisfy):
+ 	Adjust to handle non-std::optional _M_inner as per before LWG 3569.
+ 	(join_view::_Iterator::_M_get_inner): New.
+ 	(join_view::_Iterator::_M_inner): Don't wrap in std::optional if
+ 	the iterator is forward.  Initialize.
+ 	(join_view::_Iterator::operator*): Use _M_get_inner instead
+ 	of *_M_inner.
+ 	(join_view::_Iterator::operator++): Likewise.
+ 	(join_view::_Iterator::iter_move): Likewise.
+ 	(join_view::_Iterator::iter_swap): Likewise.
+ 
+ 2025-09-04  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/bits/binders.h (_Binder::_S_call): Make public.
+ 	* include/std/ranges (ranges::_Partial<_Adaptor, _Args...>):
+ 	Replace tuple<_Args...> with _Bind_back_t<_Adaptor, _Args...>.
+ 	(ranges::_Partial<_Adaptor, _Arg>): Remove.
+ 
+ 2025-09-04  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/Makefile.am: Add bits/binders.h
+ 	* include/Makefile.in: Add bits/binders.h
+ 	* include/std/functional (std::_Indexed_bound_arg, std::_Binder)
+ 	(std::__make_bound_args, std::_Bind_front_t, std::_Bind_back_t):
+ 	Moved to bits/binders.h file, that is now included.
+ 	* include/bits/binders.h: New file.
+ 
+ 2025-09-04  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* include/std/functional: (std::_Indexed_bound_arg): Fixed
+ 	indentation.
+ 	(__Bound_arg_storage::_S_apply_front)
+ 	(__Bound_arg_storage::_S_apply_front): Merged into _S_apply.
+ 	(__Bound_arg_storage::_S_apply): Merged above, add _Back template
+ 	parameter, replace std::invoke with std::__invoke.
+ 	(std::_Bind_front): Renamed to std::_Binder and add _Back
+ 	template parameter.
+ 	(std::_Binder): Renamed from std::_Bind_front.
+ 	(_Binder::_Result_t, _Binder::_S_noexcept_invoke): Define.
+ 	(_Binder::operator()): Use _Result_t and _S_noexcept_invoke.
+ 	(_Binder::_S_call): Handle zero args specially, replace std::invoke
+ 	with std::__invoke.
+ 	(std::_Bind_front_t, std::_Bind_back_t): Defined in terms
+ 	of _Binder.
+ 	(std::_Bind_back): Merged into _Binder.
+ 	* testsuite/20_util/function_objects/bind_back/1.cc: New tests.
+ 	* testsuite/20_util/function_objects/bind_back/111327.cc: Updated
+ 	error messages.
+ 	* testsuite/20_util/function_objects/bind_front/1.cc: New tests.
+ 	* testsuite/20_util/function_objects/bind_front/111327.cc: Updated
+ 	error messages.
+ 
+ 2025-09-04  Luc Grosheintz  <luc.grosheintz@gmail.com>
+ 
+ 	* include/std/mdspan (layout_left::mapping::operator()): Add
+ 	_GLIBCXX_RESOLVE_LIB_DEFECTS marker for 4314.
+ 	(layout_left::mapping::operator()): Ditto.
+ 	(layout_stride::mapping::operator()): Ditto.
+ 
+ 2025-09-04  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* doc/html/manual/status.html: Regenerated the file.
+ 	* doc/xml/manual/status_cxx1998.xml: Add stable name to
+ 	each entry.
+ 
+ 2025-09-03  Yihan Wang  <yronglin777@gmail.com>
+ 
+ 	* include/std/expected (expected(U&&)): Add missing constraint
+ 	as per LWG 4222.
+ 	* testsuite/20_util/expected/lwg4222.cc: New test.
+ 
+ 2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/121745
+ 	* include/bits/stl_pair.h (get): Use forward instead of move in
+ 	std::get<T> overloads for rvalue pairs.
+ 	* testsuite/20_util/pair/astuple/get_by_type.cc: Check all value
+ 	categories and cv-qualification.
+ 
+ 2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	PR libstdc++/110853
+ 	* include/bits/stl_pair.h [C++20] (pair(const T1&, const T2&)):
+ 	Use std::type_identity_t<T1> for first parameter.
+ 	* testsuite/20_util/pair/cons/110853.cc: New test.
+ 
+ 2025-09-03  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* include/bits/version.def (chrono_cxx20): Define.
+ 	* include/bits/version.h: Regenerate.
+ 	* include/std/chrono: Check __glibcxx_chrono_cxx20 instead of
+ 	__cpp_lib_chrono for C++20 features that don't require the new
+ 	std::string ABI and/or can be used for freestanding.
+ 	* src/c++20/clock.cc: Adjust preprocessor condition.
+ 
+ 2025-09-02  Luc Grosheintz  <luc.grosheintz@gmail.com>
+ 
+ 	* include/bits/utility.h (_Index_tuple): Move to <type_traits>.
+ 	(_Build_index_tuple): Ditto.
+ 	* include/std/type_traits (_Index_tuple): Ditto.
+ 	(_Build_index_tuple): Ditto.
+ 
+ 2025-09-02  Tomasz Kamiński  <tkaminsk@redhat.com>
+ 
+ 	* libsupc++/compare (__cmp_cat::__literal_zero): Rename
+ 	from __unspec.
+ 	(__cmp_cat::__unspec): Rename to __literal_zero.
+ 	(operator==, operator<, operator>, operator<=, operator>=):
+ 	Replace __cmp_cat::__unspec to __cmp_cat::__literal_zero.
+ 
+ 2025-08-31  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* doc/xml/manual/using_exceptions.xml: Update link to
+ 	Boost's "Exception-Safety"
+ 	* doc/html/manual/using_exceptions.html: Rebuild.
+ 
+ 2025-08-31  Jonathan Wakely  <jwakely@redhat.com>
+ 
+ 	* src/c++26/debugging.cc [_GLIBCXX_HAVE_SYS_PTRACE_H]: Include
+ 	<sys/types.h>.
+ 	(breakpoint) [__i386__ || __x86_64__]: Use "int 0x03" instead of
+ 	"int3".
+ 
  2025-08-28  Jonathan Wakely  <jwakely@redhat.com>
  
  	PR libstdc++/119670
diff -Nrcpad gcc-16-20250831/libstdc++-v3/doc/html/manual/status.html gcc-16-20250907/libstdc++-v3/doc/html/manual/status.html
*** gcc-16-20250831/libstdc++-v3/doc/html/manual/status.html	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/doc/html/manual/status.html	Sun Sep  7 22:35:01 2025
*************** mainline GCC, not in any particular rele
*** 69,129 ****
       For each entry, we give the section number of the standard, when
       applicable.  This list is probably incomplet and inkorrekt.
     </p><p>
!      <span class="emphasis"><em>[1.9]/11 #3</em></span> If <code class="code">isatty(3)</code> is true, then
!       interactive stream support is implied.
     </p><p>
!      <span class="emphasis"><em>[17.4.4.5]</em></span> Non-reentrant functions are probably best
!       discussed in the various sections on multithreading (see above).
!    </p><p><span class="emphasis"><em>[18.1]/4</em></span> The type of <code class="code">NULL</code> is described
!       under <a class="link" href="support.html#std.support.types.null" title="NULL">Support</a>.
!    </p><p><span class="emphasis"><em>[18.3]/8</em></span> Even though it's listed in the library
!       sections, libstdc++ has zero control over what the cleanup code hands
!       back to the runtime loader.  Talk to the compiler people.  :-)
!    </p><p><span class="emphasis"><em>[18.4.2.1]/5</em></span> (bad_alloc),
!       <span class="emphasis"><em>[18.5.2]/5</em></span> (bad_cast),
!       <span class="emphasis"><em>[18.5.3]/5</em></span> (bad_typeid),
!       <span class="emphasis"><em>[18.6.1]/8</em></span> (exception),
!       <span class="emphasis"><em>[18.6.2.1]/5</em></span> (bad_exception):  The <code class="code">what()</code>
!       member function of class <code class="code">std::exception</code>, and these other
!       classes publicly derived from it, returns the name of the
        class, e.g. <code class="literal">"std::bad_alloc"</code>.
!    </p><p><span class="emphasis"><em>[18.5.1]/7</em></span> The return value of
        <code class="code">std::type_info::name()</code> is the mangled type name.
        You will need to call <code class="code">c++filt</code> and pass the names as
        command-line parameters to demangle them, or call a
        <a class="link" href="ext_demangling.html" title="Chapter 28. Demangling">runtime demangler function</a>.
!    </p><p><span class="emphasis"><em>[20.1.5]/5</em></span> <span class="emphasis"><em>"Implementors are encouraged to
!       supply libraries that can accept allocators that encapsulate more
!       general memory models and that support non-equal instances.  In such
!       implementations, any requirements imposed on allocators by containers
!       beyond those requirements that appear in Table 32, and the semantics
!       of containers and algorithms when allocator instances compare
!       non-equal, are implementation-defined."</em></span>  There is experimental
!       support for non-equal allocators in the standard containers in C++98
!       mode. There are no additional requirements on allocators. It is undefined
!       behaviour to swap two containers if their allocators are not equal.
!    </p><p><span class="emphasis"><em>[21.1.3.1]/3,4</em></span>,
!       <span class="emphasis"><em>[21.1.3.2]/2</em></span>,
!       <span class="emphasis"><em>[21.3]/6 basic_string::iterator, basic_string::const_iterator</em></span>,
!       <span class="emphasis"><em>[23.*]'s foo::iterator</em></span>,
!       <span class="emphasis"><em>[27.*]'s foo::*_type</em></span>,
        <span class="emphasis"><em>others...</em></span>
        Nope, these types are called implementation-defined because you
        shouldn't be taking advantage of their underlying types.  Listing them
        here would defeat the purpose.  :-)
!    </p><p><span class="emphasis"><em>[21.1.3.1]/5</em></span> I don't really know about
!       the <span class="type">mbstate_t</span> stuff... see
        the <a class="link" href="facets.html#std.localization.facet.codecvt" title="codecvt"><code class="code">codecvt</code>
        notes</a> for what does exist.
!    </p><p><span class="emphasis"><em>[22.*]</em></span> Anything and everything we have on locale
!       implementation will be described under
        <a class="link" href="localization.html#std.localization.locales.locale" title="locale">Localization</a>.
!    </p><p><span class="emphasis"><em>[23.*]</em></span> All of the containers in this clause
!      define <span class="type">size_type</span> as <span class="type">std::size_t</span> and
       <span class="type">difference_type</span> as <span class="type">std::ptrdiff_t</span>.
!    </p><p><span class="emphasis"><em>[26.2.8]/9</em></span> I have no idea what
!       <code class="code">complex&lt;T&gt;</code>'s <code class="code">pow(0,0)</code> returns.
!    </p><p><span class="emphasis"><em>[27.4.2.4]/2</em></span> Calling
        <code class="code">std::ios_base::sync_with_stdio</code> after I/O has already been
        performed on the standard stream objects will
        flush the buffers, and 
--- 69,133 ----
       For each entry, we give the section number of the standard, when
       applicable.  This list is probably incomplet and inkorrekt.
     </p><p>
!      <span class="emphasis"><em>1.9 [intro.execution]/11 #3</em></span> If <code class="code">isatty(3)</code>
!      is true, then interactive stream support is implied.
     </p><p>
!      <span class="emphasis"><em>17.4.4.5 [lib.reentrancy]</em></span> Non-reentrant functions are
!      probably best discussed in the various sections on multithreading (see above).
!    </p><p><span class="emphasis"><em>18.1 [lib.support.types]/4</em></span> The type of
!       <code class="code">NULL</code> is described under
!       <a class="link" href="support.html#std.support.types.null" title="NULL">Support</a>.
!    </p><p><span class="emphasis"><em>18.3 [lib.support.start.term]/8</em></span> Even though it's
!       listed in the library sections, libstdc++ has zero control over what the
!       cleanup code hands back to the runtime loader.  Talk to the compiler people.
!       :-)
!    </p><p><span class="emphasis"><em>18.4.2.1 [lib.bad.alloc]/5</em></span> (bad_alloc),
!       <span class="emphasis"><em>18.5.2 [lib.bad.cast]/5</em></span> (bad_cast),
!       <span class="emphasis"><em>18.5.3 [lib.bad.typeid]/5</em></span> (bad_typeid),
!       <span class="emphasis"><em>18.6.1 [lib.exception]/8</em></span> (exception),
!       <span class="emphasis"><em>18.6.2.1 [lib.bad.exception]/5</em></span> (bad_exception):
!       The <code class="code">what()</code> member function of class <code class="code">std::exception</code>,
!       and these other classes publicly derived from it, returns the name of the
        class, e.g. <code class="literal">"std::bad_alloc"</code>.
!    </p><p><span class="emphasis"><em>18.5.1 [lib.type.info]/7</em></span> The return value of
        <code class="code">std::type_info::name()</code> is the mangled type name.
        You will need to call <code class="code">c++filt</code> and pass the names as
        command-line parameters to demangle them, or call a
        <a class="link" href="ext_demangling.html" title="Chapter 28. Demangling">runtime demangler function</a>.
!    </p><p><span class="emphasis"><em>20.1.5 [lib.allocator.requirements]/5</em></span>
!       <span class="emphasis"><em>"Implementors are encouraged to supply libraries that can
!       accept allocators that encapsulate more general memory models and that
!       support non-equal instances.  In such implementations, any requirements
!       imposed on allocators by containers beyond those requirements that appear
!       in Table 32, and the semantics of containers and algorithms when allocator
!       instances compare non-equal, are implementation-defined."</em></span>
!       There is experimental support for non-equal allocators in the standard
!       containers in C++98  mode. There are no additional requirements on
!       allocators. It is undefined behaviour to swap two containers if their
!       allocators are not equal.
!    </p><p><span class="emphasis"><em>21.1.3.1 [lib.char.traits.specializations.char]/3,4</em></span>,
!       <span class="emphasis"><em>21.1.3.2 [lib.char.traits.specializations.wchar.t]/2</em></span>,
!       <span class="emphasis"><em>21.3 [lib.basic.string]/6 basic_string::iterator,
!       basic_string::const_iterator</em></span>,
!       <span class="emphasis"><em>23.* [lib.containers]'s foo::iterator</em></span>,
!       <span class="emphasis"><em>27.* [lib.input.output]'s foo::*_type</em></span>,
        <span class="emphasis"><em>others...</em></span>
        Nope, these types are called implementation-defined because you
        shouldn't be taking advantage of their underlying types.  Listing them
        here would defeat the purpose.  :-)
!    </p><p><span class="emphasis"><em>21.1.3.1 [lib.char.traits.specializations.char]/5</em></span>
!       I don't really know about the <span class="type">mbstate_t</span> stuff... see
        the <a class="link" href="facets.html#std.localization.facet.codecvt" title="codecvt"><code class="code">codecvt</code>
        notes</a> for what does exist.
!    </p><p><span class="emphasis"><em>22.* [lib.localization]</em></span> Anything and everything
!       we have on locale implementation will be described under
        <a class="link" href="localization.html#std.localization.locales.locale" title="locale">Localization</a>.
!    </p><p><span class="emphasis"><em>23.* [lib.containers]</em></span> All of the containers in
!      this clause define <span class="type">size_type</span> as <span class="type">std::size_t</span> and
       <span class="type">difference_type</span> as <span class="type">std::ptrdiff_t</span>.
!    </p><p><span class="emphasis"><em>26.2.8 [lib.complex.transcendentals/9</em></span> I have no
!       idea what <code class="code">complex&lt;T&gt;</code>'s <code class="code">pow(0,0)</code> returns.
!    </p><p><span class="emphasis"><em>27.4.2.4 [lib.ios.members.static/2</em></span> Calling
        <code class="code">std::ios_base::sync_with_stdio</code> after I/O has already been
        performed on the standard stream objects will
        flush the buffers, and 
*************** mainline GCC, not in any particular rele
*** 131,146 ****
        the previously-written I/O is destroyed in this process depends mostly
        on the <code class="code">--enable-libio</code> choice:  for stdio, if the written
        data is already in the stdio buffer, the data may be completely safe!
!    </p><p><span class="emphasis"><em>[27.6.1.1.2]</em></span>,
!       <span class="emphasis"><em>[27.6.2.3]</em></span> The I/O sentry ctor and dtor can perform
!       additional work than the minimum required.  We are not currently taking
!       advantage of this yet.
!    </p><p><span class="emphasis"><em>[27.7.1.3]/16</em></span>,
!       <span class="emphasis"><em>[27.8.1.4]/10</em></span>
        The effects of <code class="code">pubsetbuf/setbuf</code> are described in the
        <a class="link" href="io.html" title="Chapter 13.  Input and Output">Input and Output</a> chapter.
!    </p><p><span class="emphasis"><em>[27.8.1.4]/16</em></span> Calling <code class="code">fstream::sync</code> when
!       a get area exists will... whatever <code class="code">fflush()</code> does, I think.
     </p></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="status.iso.2011"></a>C++ 2011</h3></div></div></div><p>
  <a id="status.iso.200x"></a> 
  This table is based on the table of contents of ISO/IEC
--- 135,151 ----
        the previously-written I/O is destroyed in this process depends mostly
        on the <code class="code">--enable-libio</code> choice:  for stdio, if the written
        data is already in the stdio buffer, the data may be completely safe!
!    </p><p><span class="emphasis"><em>27.6.1.1.2 [lib.istream::sentry]</em></span>,
!       <span class="emphasis"><em>27.6.2.3 [lib.ostream::sentry]</em></span> The I/O sentry ctor
!       and dtor can perform additional work than the minimum required. We are
!       not currently taking  advantage of this yet.
!    </p><p><span class="emphasis"><em>27.7.1.3 [lib.stringbuf.virtuals]/16</em></span>,
!       <span class="emphasis"><em>27.8.1.4 [lib.filebuf.virtuals]/10</em></span>
        The effects of <code class="code">pubsetbuf/setbuf</code> are described in the
        <a class="link" href="io.html" title="Chapter 13.  Input and Output">Input and Output</a> chapter.
!    </p><p><span class="emphasis"><em>27.8.1.4 [lib.filebuf.virtuals]/16</em></span> Calling
!       <code class="code">fstream::sync</code> when a get area exists will... whatever
!       <code class="code">fflush()</code> does, I think.
     </p></div></div><div class="section"><div class="titlepage"><div><div><h3 class="title"><a id="status.iso.2011"></a>C++ 2011</h3></div></div></div><p>
  <a id="status.iso.200x"></a> 
  This table is based on the table of contents of ISO/IEC
*************** mainline GCC, not in any particular rele
*** 255,260 ****
--- 260,268 ----
        <span class="emphasis"><em>20.7.2.0 [util.smartptr.weakptr]</em></span>
        <code class="code">what()</code> returns <code class="literal">"bad_weak_ptr"</code>.
     </p><p>
+       <span class="emphasis"><em>20.8.11.1 [func.wrap.badcall]</em></span>
+       <code class="code">what()</code> returns <code class="literal">"bad_function_call"</code>.
+    </p><p>
        <span class="emphasis"><em>20.8.9.1.3 [func.bind.place]/1</em></span> There are 29
        placeholders defined and the placeholder types are
        <code class="literal">CopyAssignable</code>.
*************** since C++14 and the implementation is co
*** 1069,1075 ****
        <code class="literal">"std::visit: variant is valueless"</code>,
        or <code class="literal">"std::visit&lt;R&gt;: variant is valueless"</code>.
     </p><p>
!       <span class="emphasis"><em>23.12.5.2 [memory.resource.pool.options]</em></span>
        Let S equal <code class="code">numeric_limits&lt;size_t&gt;::digits</code>.
        The limit for maximum number of blocks in a chunk is given by
        <span class="mathphrase">2<sup>N</sup>-1</span>,
--- 1077,1087 ----
        <code class="literal">"std::visit: variant is valueless"</code>,
        or <code class="literal">"std::visit&lt;R&gt;: variant is valueless"</code>.
     </p><p>
!       <span class="emphasis"><em>23.8.2 [any.bad_any_cast]</em></span>
!       <code class="code">what()</code> returns <code class="literal">"bad any_cast"</code>.
!    </p><p>
!       <span class="emphasis"><em>23.12.5 [mem.res.pool.options]</em></span>,
!       <span class="emphasis"><em>23.12.5 [mem.res.pool.mem]</em></span>
        Let S equal <code class="code">numeric_limits&lt;size_t&gt;::digits</code>.
        The limit for maximum number of blocks in a chunk is given by
        <span class="mathphrase">2<sup>N</sup>-1</span>,
*************** since C++14 and the implementation is co
*** 1080,1086 ****
        otherwise 3072 when <span class="mathphrase">S &gt; 16</span>,
        otherwise 768.
     </p><p>
!       <span class="emphasis"><em>23.12.6.1 [memory.resource.monotonic.buffer.ctor]</em></span>
        The default <code class="code">next_buffer_size</code> is <code class="code">128 * sizeof(void*)</code>.
        The default growth factor is <code class="code">1.5</code>.
     </p><p>
--- 1092,1098 ----
        otherwise 3072 when <span class="mathphrase">S &gt; 16</span>,
        otherwise 768.
     </p><p>
!       <span class="emphasis"><em>23.12.6.1 [mem.res.monotonic.buffer.ctor]</em></span>
        The default <code class="code">next_buffer_size</code> is <code class="code">128 * sizeof(void*)</code>.
        The default growth factor is <code class="code">1.5</code>.
     </p><p>
*************** since C++14 and the implementation is co
*** 1115,1124 ****
        races depends on the target C library that provides the function.
     </p><p>
        <span class="emphasis"><em>29.9.5 [sf.cmath]</em></span>
!       The effect of calling the mathematical special functions with large
!       inputs should be documented here.
     </p><p>
!       <span class="emphasis"><em>30.10.2.1 [fs.conform.9945]</em></span>
        The behavior of the filesystem library implementation will depend on
        the target operating system. Some features will not be supported
        on some targets. Symbolic links and file permissions
--- 1127,1140 ----
        races depends on the target C library that provides the function.
     </p><p>
        <span class="emphasis"><em>29.9.5 [sf.cmath]</em></span>
!       Calling the mathematical special functions with large inputs is supported
!       but the results may be imprecise.
     </p><p>
!       <span class="emphasis"><em>30.7.5.2.3 [ostream.inserters]</em></span>
!       NTCTS for <code class="code">nullptr_t</code> is <code class="literal">"nullptr"</code>.
!    </p><p>
!       <span class="emphasis"><em>30.10.2.1 [fs.conform.9945]</em></span>,
!       <span class="emphasis"><em>30.10.2.2 [fs.conform.os]</em></span>
        The behavior of the filesystem library implementation will depend on
        the target operating system. Some features will not be supported
        on some targets. Symbolic links and file permissions
*************** since C++14 and the implementation is co
*** 1154,1160 ****
        Specifically, it is not possible to rename a directory to replace another
        directory (POSIX requires that to work if the directory being
        replaced is empty).
!     </p><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="iso.2017.par2ts"></a>Parallelism 2 TS</h5></div></div></div><p>
          <span class="emphasis"><em>9.3 [parallel.simd.abi]</em></span>
          <code class="code">max_fixed_size&lt;T&gt;</code> is 32, except when targetting
          AVX512BW and <code class="code">sizeof(T)</code> is 1.
--- 1170,1189 ----
        Specifically, it is not possible to rename a directory to replace another
        directory (POSIX requires that to work if the directory being
        replaced is empty).
!    </p><p>
!       <span class="emphasis"><em>30.10.29.2 [fs.enum.file_type]</em></span>,
!       <span class="emphasis"><em>30.10.34.3 [fs.op.copy]</em></span>,
!       <span class="emphasis"><em>30.10.34.35 [fs.op.status]</em></span>
!       No additional file types are supported, and there are no
!       implementation-defined enumerators in
!       <code class="code">std::filesystem::file_type</code>.
!    </p><p>
!      <span class="emphasis"><em>30.10.32 [fs.class.directory_iterator]</em></span>,
!      <span class="emphasis"><em>30.10.33 [fs.class.rec.dir.itr]</em></span>
!      Any directory-like file types supported by
!      <code class="code">opendir</code>/<code class="code">readdir</code>
!      (or <code class="code">_wopendir</code>/<code class="code">_wreaddir</code> on Windows).
!    </p><div class="section"><div class="titlepage"><div><div><h5 class="title"><a id="iso.2017.par2ts"></a>Parallelism 2 TS</h5></div></div></div><p>
          <span class="emphasis"><em>9.3 [parallel.simd.abi]</em></span>
          <code class="code">max_fixed_size&lt;T&gt;</code> is 32, except when targetting
          AVX512BW and <code class="code">sizeof(T)</code> is 1.
diff -Nrcpad gcc-16-20250831/libstdc++-v3/doc/xml/manual/status_cxx1998.xml gcc-16-20250907/libstdc++-v3/doc/xml/manual/status_cxx1998.xml
*** gcc-16-20250831/libstdc++-v3/doc/xml/manual/status_cxx1998.xml	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/doc/xml/manual/status_cxx1998.xml	Sun Sep  7 22:35:01 2025
*************** mainline GCC, not in any particular rele
*** 1063,1139 ****
       applicable.  This list is probably incomplet and inkorrekt.
     </para>
     <para>
!      <emphasis>[1.9]/11 #3</emphasis> If <code>isatty(3)</code> is true, then
!       interactive stream support is implied.
     </para>
     <para>
!      <emphasis>[17.4.4.5]</emphasis> Non-reentrant functions are probably best
!       discussed in the various sections on multithreading (see above).
     </para>
     <!-- [17.4.4.8]/3 says any function that doesn't have an exception-spec
  	can throw whatever we want; see also its footnote.  Let's list those
  	in the sections where the function itself occurs.
     -->
!    <para><emphasis>[18.1]/4</emphasis> The type of <code>NULL</code> is described
!       under <link linkend="std.support.types.null">Support</link>.
     </para>
!    <para><emphasis>[18.3]/8</emphasis> Even though it's listed in the library
!       sections, libstdc++ has zero control over what the cleanup code hands
!       back to the runtime loader.  Talk to the compiler people.  :-)
     </para>
!    <para><emphasis>[18.4.2.1]/5</emphasis> (bad_alloc),
!       <emphasis>[18.5.2]/5</emphasis> (bad_cast),
!       <emphasis>[18.5.3]/5</emphasis> (bad_typeid),
!       <emphasis>[18.6.1]/8</emphasis> (exception),
!       <emphasis>[18.6.2.1]/5</emphasis> (bad_exception):  The <code>what()</code>
!       member function of class <code>std::exception</code>, and these other
!       classes publicly derived from it, returns the name of the
        class, e.g. <literal>"std::bad_alloc"</literal>.
     </para>
!    <para><emphasis>[18.5.1]/7</emphasis> The return value of
        <code>std::type_info::name()</code> is the mangled type name.
        You will need to call <code>c++filt</code> and pass the names as
        command-line parameters to demangle them, or call a
        <link linkend="manual.ext.demangle">runtime demangler function</link>.
     </para>
!    <para><emphasis>[20.1.5]/5</emphasis> <emphasis>"Implementors are encouraged to
!       supply libraries that can accept allocators that encapsulate more
!       general memory models and that support non-equal instances.  In such
!       implementations, any requirements imposed on allocators by containers
!       beyond those requirements that appear in Table 32, and the semantics
!       of containers and algorithms when allocator instances compare
!       non-equal, are implementation-defined."</emphasis>  There is experimental
!       support for non-equal allocators in the standard containers in C++98
!       mode. There are no additional requirements on allocators. It is undefined
!       behaviour to swap two containers if their allocators are not equal.
     </para>
!    <para><emphasis>[21.1.3.1]/3,4</emphasis>,
!       <emphasis>[21.1.3.2]/2</emphasis>,
!       <emphasis>[21.3]/6 basic_string::iterator, basic_string::const_iterator</emphasis>,
!       <emphasis>[23.*]'s foo::iterator</emphasis>,
!       <emphasis>[27.*]'s foo::*_type</emphasis>,
        <emphasis>others...</emphasis>
        Nope, these types are called implementation-defined because you
        shouldn't be taking advantage of their underlying types.  Listing them
        here would defeat the purpose.  :-)
     </para>
!    <para><emphasis>[21.1.3.1]/5</emphasis> I don't really know about
!       the <type>mbstate_t</type> stuff... see
        the <link linkend="std.localization.facet.codecvt"><code>codecvt</code>
        notes</link> for what does exist.
     </para>
!    <para><emphasis>[22.*]</emphasis> Anything and everything we have on locale
!       implementation will be described under
        <link linkend="std.localization.locales.locale">Localization</link>.
     </para>
!    <para><emphasis>[23.*]</emphasis> All of the containers in this clause
!      define <type>size_type</type> as <type>std::size_t</type> and
       <type>difference_type</type> as <type>std::ptrdiff_t</type>.
     </para>
!    <para><emphasis>[26.2.8]/9</emphasis> I have no idea what
!       <code>complex&lt;T&gt;</code>'s <code>pow(0,0)</code> returns.
     </para>
!    <para><emphasis>[27.4.2.4]/2</emphasis> Calling
        <code>std::ios_base::sync_with_stdio</code> after I/O has already been
        performed on the standard stream objects will
        flush the buffers, and <!-- this line might go away -->
--- 1063,1143 ----
       applicable.  This list is probably incomplet and inkorrekt.
     </para>
     <para>
!      <emphasis>1.9 [intro.execution]/11 #3</emphasis> If <code>isatty(3)</code>
!      is true, then interactive stream support is implied.
     </para>
     <para>
!      <emphasis>17.4.4.5 [lib.reentrancy]</emphasis> Non-reentrant functions are
!      probably best discussed in the various sections on multithreading (see above).
     </para>
     <!-- [17.4.4.8]/3 says any function that doesn't have an exception-spec
  	can throw whatever we want; see also its footnote.  Let's list those
  	in the sections where the function itself occurs.
     -->
!    <para><emphasis>18.1 [lib.support.types]/4</emphasis> The type of
!       <code>NULL</code> is described under
!       <link linkend="std.support.types.null">Support</link>.
     </para>
!    <para><emphasis>18.3 [lib.support.start.term]/8</emphasis> Even though it's
!       listed in the library sections, libstdc++ has zero control over what the
!       cleanup code hands back to the runtime loader.  Talk to the compiler people.
!       :-)
     </para>
!    <para><emphasis>18.4.2.1 [lib.bad.alloc]/5</emphasis> (bad_alloc),
!       <emphasis>18.5.2 [lib.bad.cast]/5</emphasis> (bad_cast),
!       <emphasis>18.5.3 [lib.bad.typeid]/5</emphasis> (bad_typeid),
!       <emphasis>18.6.1 [lib.exception]/8</emphasis> (exception),
!       <emphasis>18.6.2.1 [lib.bad.exception]/5</emphasis> (bad_exception):
!       The <code>what()</code> member function of class <code>std::exception</code>,
!       and these other classes publicly derived from it, returns the name of the
        class, e.g. <literal>"std::bad_alloc"</literal>.
     </para>
!    <para><emphasis>18.5.1 [lib.type.info]/7</emphasis> The return value of
        <code>std::type_info::name()</code> is the mangled type name.
        You will need to call <code>c++filt</code> and pass the names as
        command-line parameters to demangle them, or call a
        <link linkend="manual.ext.demangle">runtime demangler function</link>.
     </para>
!    <para><emphasis>20.1.5 [lib.allocator.requirements]/5</emphasis>
!       <emphasis>"Implementors are encouraged to supply libraries that can
!       accept allocators that encapsulate more general memory models and that
!       support non-equal instances.  In such implementations, any requirements
!       imposed on allocators by containers beyond those requirements that appear
!       in Table 32, and the semantics of containers and algorithms when allocator
!       instances compare non-equal, are implementation-defined."</emphasis>
!       There is experimental support for non-equal allocators in the standard
!       containers in C++98  mode. There are no additional requirements on
!       allocators. It is undefined behaviour to swap two containers if their
!       allocators are not equal.
     </para>
!    <para><emphasis>21.1.3.1 [lib.char.traits.specializations.char]/3,4</emphasis>,
!       <emphasis>21.1.3.2 [lib.char.traits.specializations.wchar.t]/2</emphasis>,
!       <emphasis>21.3 [lib.basic.string]/6 basic_string::iterator,
!       basic_string::const_iterator</emphasis>,
!       <emphasis>23.* [lib.containers]'s foo::iterator</emphasis>,
!       <emphasis>27.* [lib.input.output]'s foo::*_type</emphasis>,
        <emphasis>others...</emphasis>
        Nope, these types are called implementation-defined because you
        shouldn't be taking advantage of their underlying types.  Listing them
        here would defeat the purpose.  :-)
     </para>
!    <para><emphasis>21.1.3.1 [lib.char.traits.specializations.char]/5</emphasis>
!       I don't really know about the <type>mbstate_t</type> stuff... see
        the <link linkend="std.localization.facet.codecvt"><code>codecvt</code>
        notes</link> for what does exist.
     </para>
!    <para><emphasis>22.* [lib.localization]</emphasis> Anything and everything
!       we have on locale implementation will be described under
        <link linkend="std.localization.locales.locale">Localization</link>.
     </para>
!    <para><emphasis>23.* [lib.containers]</emphasis> All of the containers in
!      this clause define <type>size_type</type> as <type>std::size_t</type> and
       <type>difference_type</type> as <type>std::ptrdiff_t</type>.
     </para>
!    <para><emphasis>26.2.8 [lib.complex.transcendentals/9</emphasis> I have no
!       idea what <code>complex&lt;T&gt;</code>'s <code>pow(0,0)</code> returns.
     </para>
!    <para><emphasis>27.4.2.4 [lib.ios.members.static/2</emphasis> Calling
        <code>std::ios_base::sync_with_stdio</code> after I/O has already been
        performed on the standard stream objects will
        flush the buffers, and <!-- this line might go away -->
*************** mainline GCC, not in any particular rele
*** 1142,1159 ****
        on the <code>--enable-libio</code> choice:  for stdio, if the written
        data is already in the stdio buffer, the data may be completely safe!
     </para>
!    <para><emphasis>[27.6.1.1.2]</emphasis>,
!       <emphasis>[27.6.2.3]</emphasis> The I/O sentry ctor and dtor can perform
!       additional work than the minimum required.  We are not currently taking
!       advantage of this yet.
     </para>
!    <para><emphasis>[27.7.1.3]/16</emphasis>,
!       <emphasis>[27.8.1.4]/10</emphasis>
        The effects of <code>pubsetbuf/setbuf</code> are described in the
        <link linkend="std.io">Input and Output</link> chapter.
     </para>
!    <para><emphasis>[27.8.1.4]/16</emphasis> Calling <code>fstream::sync</code> when
!       a get area exists will... whatever <code>fflush()</code> does, I think.
     </para>
  
  </section>
--- 1146,1164 ----
        on the <code>--enable-libio</code> choice:  for stdio, if the written
        data is already in the stdio buffer, the data may be completely safe!
     </para>
!    <para><emphasis>27.6.1.1.2 [lib.istream::sentry]</emphasis>,
!       <emphasis>27.6.2.3 [lib.ostream::sentry]</emphasis> The I/O sentry ctor
!       and dtor can perform additional work than the minimum required. We are
!       not currently taking  advantage of this yet.
     </para>
!    <para><emphasis>27.7.1.3 [lib.stringbuf.virtuals]/16</emphasis>,
!       <emphasis>27.8.1.4 [lib.filebuf.virtuals]/10</emphasis>
        The effects of <code>pubsetbuf/setbuf</code> are described in the
        <link linkend="std.io">Input and Output</link> chapter.
     </para>
!    <para><emphasis>27.8.1.4 [lib.filebuf.virtuals]/16</emphasis> Calling
!       <code>fstream::sync</code> when a get area exists will... whatever
!       <code>fflush()</code> does, I think.
     </para>
  
  </section>
diff -Nrcpad gcc-16-20250831/libstdc++-v3/doc/xml/manual/status_cxx2011.xml gcc-16-20250907/libstdc++-v3/doc/xml/manual/status_cxx2011.xml
*** gcc-16-20250831/libstdc++-v3/doc/xml/manual/status_cxx2011.xml	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/doc/xml/manual/status_cxx2011.xml	Sun Sep  7 22:35:01 2025
*************** mainline GCC, not in any particular rele
*** 2614,2619 ****
--- 2614,2624 ----
     </para>
  
     <para>
+       <emphasis>20.8.11.1 [func.wrap.badcall]</emphasis>
+       <code>what()</code> returns <literal>"bad_function_call"</literal>.
+    </para>
+ 
+    <para>
        <emphasis>20.8.9.1.3 [func.bind.place]/1</emphasis> There are 29
        placeholders defined and the placeholder types are
        <literal>CopyAssignable</literal>.
diff -Nrcpad gcc-16-20250831/libstdc++-v3/doc/xml/manual/status_cxx2017.xml gcc-16-20250907/libstdc++-v3/doc/xml/manual/status_cxx2017.xml
*** gcc-16-20250831/libstdc++-v3/doc/xml/manual/status_cxx2017.xml	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/doc/xml/manual/status_cxx2017.xml	Sun Sep  7 22:35:01 2025
*************** since C++14 and the implementation is co
*** 2935,2941 ****
     </para>
  
     <para>
!       <emphasis>23.12.5.2 [memory.resource.pool.options]</emphasis>
        Let S equal <code>numeric_limits&lt;size_t&gt;::digits</code>.
        The limit for maximum number of blocks in a chunk is given by
        <inlineequation><mathphrase>2<superscript>N</superscript>-1</mathphrase></inlineequation>,
--- 2935,2947 ----
     </para>
  
     <para>
!       <emphasis>23.8.2 [any.bad_any_cast]</emphasis>
!       <code>what()</code> returns <literal>"bad any_cast"</literal>.
!    </para>
! 
!    <para>
!       <emphasis>23.12.5 [mem.res.pool.options]</emphasis>,
!       <emphasis>23.12.5 [mem.res.pool.mem]</emphasis>
        Let S equal <code>numeric_limits&lt;size_t&gt;::digits</code>.
        The limit for maximum number of blocks in a chunk is given by
        <inlineequation><mathphrase>2<superscript>N</superscript>-1</mathphrase></inlineequation>,
*************** since C++14 and the implementation is co
*** 2948,2954 ****
     </para>
  
     <para>
!       <emphasis>23.12.6.1 [memory.resource.monotonic.buffer.ctor]</emphasis>
        The default <code>next_buffer_size</code> is <code>128 * sizeof(void*)</code>.
        The default growth factor is <code>1.5</code>.
     </para>
--- 2954,2960 ----
     </para>
  
     <para>
!       <emphasis>23.12.6.1 [mem.res.monotonic.buffer.ctor]</emphasis>
        The default <code>next_buffer_size</code> is <code>128 * sizeof(void*)</code>.
        The default growth factor is <code>1.5</code>.
     </para>
*************** since C++14 and the implementation is co
*** 2998,3009 ****
  
     <para>
        <emphasis>29.9.5 [sf.cmath]</emphasis>
!       The effect of calling the mathematical special functions with large
!       inputs should be documented here.
     </para>
  
     <para>
!       <emphasis>30.10.2.1 [fs.conform.9945]</emphasis>
        The behavior of the filesystem library implementation will depend on
        the target operating system. Some features will not be supported
        on some targets. Symbolic links and file permissions
--- 3004,3021 ----
  
     <para>
        <emphasis>29.9.5 [sf.cmath]</emphasis>
!       Calling the mathematical special functions with large inputs is supported
!       but the results may be imprecise.
     </para>
  
     <para>
!       <emphasis>30.7.5.2.3 [ostream.inserters]</emphasis>
!       NTCTS for <code>nullptr_t</code> is <literal>"nullptr"</literal>.
!    </para>
! 
!    <para>
!       <emphasis>30.10.2.1 [fs.conform.9945]</emphasis>,
!       <emphasis>30.10.2.2 [fs.conform.os]</emphasis>
        The behavior of the filesystem library implementation will depend on
        the target operating system. Some features will not be supported
        on some targets. Symbolic links and file permissions
*************** since C++14 and the implementation is co
*** 3040,3046 ****
        If <code>!is_regular_file(p)</code>, an error is reported.
     </para>
  
!     <para>
        <emphasis>30.10.15.32 [fs.op.rename]</emphasis>
        On Windows, <code>filesystem::rename</code>
        is implemented by calling <code>MoveFileExW</code> and so
--- 3052,3058 ----
        If <code>!is_regular_file(p)</code>, an error is reported.
     </para>
  
!    <para>
        <emphasis>30.10.15.32 [fs.op.rename]</emphasis>
        On Windows, <code>filesystem::rename</code>
        is implemented by calling <code>MoveFileExW</code> and so
*************** since C++14 and the implementation is co
*** 3049,3056 ****
        Specifically, it is not possible to rename a directory to replace another
        directory (POSIX requires that to work if the directory being
        replaced is empty).
!     </para>
  
  
     <section xml:id="iso.2017.par2ts" xreflabel="Implementation Specific Behavior of the Parallelism 2 TS"><info><title>Parallelism 2 TS</title></info>
  
--- 3061,3084 ----
        Specifically, it is not possible to rename a directory to replace another
        directory (POSIX requires that to work if the directory being
        replaced is empty).
!    </para>
  
+    <para>
+       <emphasis>30.10.29.2 [fs.enum.file_type]</emphasis>,
+       <emphasis>30.10.34.3 [fs.op.copy]</emphasis>,
+       <emphasis>30.10.34.35 [fs.op.status]</emphasis>
+       No additional file types are supported, and there are no
+       implementation-defined enumerators in
+       <code>std::filesystem::file_type</code>.
+    </para>
+ 
+    <para>
+      <emphasis>30.10.32 [fs.class.directory_iterator]</emphasis>,
+      <emphasis>30.10.33 [fs.class.rec.dir.itr]</emphasis>
+      Any directory-like file types supported by
+      <code>opendir</code>/<code>readdir</code>
+      (or <code>_wopendir</code>/<code>_wreaddir</code> on Windows).
+    </para>
  
     <section xml:id="iso.2017.par2ts" xreflabel="Implementation Specific Behavior of the Parallelism 2 TS"><info><title>Parallelism 2 TS</title></info>
  
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/Makefile.am gcc-16-20250907/libstdc++-v3/include/Makefile.am
*** gcc-16-20250831/libstdc++-v3/include/Makefile.am	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/include/Makefile.am	Sun Sep  7 22:35:01 2025
*************** bits_headers = \
*** 191,196 ****
--- 191,197 ----
  	${bits_srcdir}/basic_ios.tcc \
  	${bits_srcdir}/basic_string.h \
  	${bits_srcdir}/basic_string.tcc \
+ 	${bits_srcdir}/binders.h \
  	${bits_srcdir}/charconv.h \
  	${bits_srcdir}/chrono.h \
  	${bits_srcdir}/chrono_io.h \
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/Makefile.in gcc-16-20250907/libstdc++-v3/include/Makefile.in
*** gcc-16-20250831/libstdc++-v3/include/Makefile.in	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/include/Makefile.in	Sun Sep  7 22:35:01 2025
*************** bits_freestanding = \
*** 544,549 ****
--- 544,550 ----
  @GLIBCXX_HOSTED_TRUE@	${bits_srcdir}/basic_ios.tcc \
  @GLIBCXX_HOSTED_TRUE@	${bits_srcdir}/basic_string.h \
  @GLIBCXX_HOSTED_TRUE@	${bits_srcdir}/basic_string.tcc \
+ @GLIBCXX_HOSTED_TRUE@	${bits_srcdir}/binders.h \
  @GLIBCXX_HOSTED_TRUE@	${bits_srcdir}/charconv.h \
  @GLIBCXX_HOSTED_TRUE@	${bits_srcdir}/chrono.h \
  @GLIBCXX_HOSTED_TRUE@	${bits_srcdir}/chrono_io.h \
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/bits/binders.h gcc-16-20250907/libstdc++-v3/include/bits/binders.h
*** gcc-16-20250831/libstdc++-v3/include/bits/binders.h	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/libstdc++-v3/include/bits/binders.h	Sun Sep  7 22:35:01 2025
***************
*** 0 ****
--- 1,234 ----
+ // Implementation of std::move_only_function, std::copyable_function
+ // and std::function_ref  -*- C++ -*-
+ 
+ // Copyright The GNU Toolchain Authors.
+ //
+ // This file is part of the GNU ISO C++ Library.  This library is free
+ // software; you can redistribute it and/or modify it under the
+ // terms of the GNU General Public License as published by the
+ // Free Software Foundation; either version 3, or (at your option)
+ // any later version.
+ 
+ // This library is distributed in the hope that it will be useful,
+ // but WITHOUT ANY WARRANTY; without even the implied warranty of
+ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ // GNU General Public License for more details.
+ 
+ // Under Section 7 of GPL version 3, you are granted additional
+ // permissions described in the GCC Runtime Library Exception, version
+ // 3.1, as published by the Free Software Foundation.
+ 
+ // You should have received a copy of the GNU General Public License and
+ // a copy of the GCC Runtime Library Exception along with this program;
+ // see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+ // <http://www.gnu.org/licenses/>.
+ 
+ /** @file include/bits/binder.h
+  *  This is an internal header file, included by other library headers.
+  *  Do not attempt to use it directly. @headername{functional}
+  */
+ 
+ #ifndef _GLIBCXX_BINDERS_H
+ #define _GLIBCXX_BINDERS_H 1
+ 
+ #ifdef _GLIBCXX_SYSHDR
+ #pragma GCC system_header
+ #endif
+ 
+ #if __cplusplus >= 202002L
+ 
+ #include <bits/invoke.h>
+ #include <bits/move.h>
+ 
+ namespace std _GLIBCXX_VISIBILITY(default)
+ {
+ _GLIBCXX_BEGIN_NAMESPACE_VERSION
+ 
+   template<size_t, typename _Tp>
+     struct _Indexed_bound_arg
+     {
+       [[no_unique_address]] _Tp _M_val;
+     };
+ 
+   template<typename... _IndexedArgs>
+     struct _Bound_arg_storage : _IndexedArgs...
+     {
+       template<bool _Back, typename _Fd, typename _Self, typename... _CallArgs>
+ 	static constexpr
+ 	decltype(auto)
+ 	_S_apply(_Fd&& __fd, _Self&& __self, _CallArgs&&... __call_args)
+ 	{
+ 	  if constexpr (_Back)
+ 	    return std::__invoke(std::forward<_Fd>(__fd),
+ 				 std::forward<_CallArgs>(__call_args)...,
+ 				 __like_t<_Self, _IndexedArgs>(__self)._M_val...);
+ 	  else
+ 	    return std::__invoke(std::forward<_Fd>(__fd),
+ 				 __like_t<_Self, _IndexedArgs>(__self)._M_val...,
+ 				 std::forward<_CallArgs>(__call_args)...);
+ 	}
+     };
+ 
+   template<typename... _BoundArgs, typename... _Args>
+     constexpr auto
+     __make_bound_args(_Args&&... __args)
+     {
+       if constexpr (sizeof...(_BoundArgs) == 1)
+ 	// pack has one element, so return copy of arg
+ 	return (_BoundArgs(std::forward<_Args>(__args)), ...);
+       else
+ 	{
+ 	  auto __impl = [&]<size_t... _Inds>(index_sequence<_Inds...>)
+ 	  {
+ 	    return _Bound_arg_storage<_Indexed_bound_arg<_Inds, _BoundArgs>...>
+ 		   { {_BoundArgs(std::forward<_Args>(__args))}... };
+ 	  };
+ 	  return __impl(index_sequence_for<_BoundArgs...>());
+ 	}
+     }
+ 
+   template<bool _Back, typename _Fd, typename... _BoundArgs>
+     class _Binder
+     {
+       template<typename _Self, typename... _CallArgs>
+ 	using _Result_t = __conditional_t<
+ 	  _Back,
+ 	  invoke_result<__like_t<_Self, _Fd>,
+ 			_CallArgs..., __like_t<_Self, _BoundArgs>...>,
+ 	  invoke_result<__like_t<_Self, _Fd>,
+ 			__like_t<_Self, _BoundArgs>..., _CallArgs...>>::type;
+ 
+       template<typename _Self, typename... _CallArgs>
+ 	static consteval bool
+ 	_S_noexcept_invocable()
+ 	{
+ 	  if constexpr (_Back)
+ 	    return is_nothrow_invocable_v< __like_t<_Self, _Fd>,
+ 		     _CallArgs..., __like_t<_Self, _BoundArgs>...>;
+ 	  else
+ 	    return is_nothrow_invocable_v<__like_t<_Self, _Fd>,
+ 		     __like_t<_Self, _BoundArgs>..., _CallArgs...>;
+ 	}
+ 
+     public:
+       static_assert(is_move_constructible_v<_Fd>);
+       static_assert((is_move_constructible_v<_BoundArgs> && ...));
+ 
+       // First parameter is to ensure this constructor is never used
+       // instead of the copy/move constructor.
+       template<typename _Fn, typename... _Args>
+ 	explicit constexpr
+ 	_Binder(int, _Fn&& __fn, _Args&&... __args)
+ 	noexcept(__and_<is_nothrow_constructible<_Fd, _Fn>,
+ 			is_nothrow_constructible<_BoundArgs, _Args>...>::value)
+ 	: _M_fd(std::forward<_Fn>(__fn)),
+ 	  _M_bound_args(__make_bound_args<_BoundArgs...>(std::forward<_Args>(__args)...))
+ 	{ static_assert(sizeof...(_Args) == sizeof...(_BoundArgs)); }
+ 
+ #if __cpp_explicit_this_parameter
+       template<typename _Self, typename... _CallArgs>
+ 	constexpr _Result_t<_Self, _CallArgs...>
+ 	operator()(this _Self&& __self, _CallArgs&&... __call_args)
+ 	noexcept(_S_noexcept_invocable<_Self, _CallArgs...>())
+ 	{
+ 	  return _S_call(__like_t<_Self, _Binder>(__self),
+ 			 std::forward<_CallArgs>(__call_args)...);
+ 	}
+ #else
+       template<typename... _CallArgs>
+ 	requires true
+ 	constexpr _Result_t<_Binder&, _CallArgs...>
+ 	operator()(_CallArgs&&... __call_args) &
+ 	noexcept(_S_noexcept_invocable<_Binder&, _CallArgs...>())
+ 	{
+ 	  return _S_call(*this, std::forward<_CallArgs>(__call_args)...);
+ 	}
+ 
+       template<typename... _CallArgs>
+ 	requires true
+ 	constexpr _Result_t<const _Binder&, _CallArgs...>
+ 	operator()(_CallArgs&&... __call_args) const &
+ 	noexcept(_S_noexcept_invocable<const _Binder&, _CallArgs...>())
+ 	{
+ 	  return _S_call(*this, std::forward<_CallArgs>(__call_args)...);
+ 	}
+ 
+       template<typename... _CallArgs>
+ 	requires true
+ 	constexpr _Result_t<_Binder&&, _CallArgs...>
+ 	operator()(_CallArgs&&... __call_args) &&
+ 	noexcept(_S_noexcept_invocable<_Binder&&, _CallArgs...>())
+ 	{
+ 	  return _S_call(std::move(*this),
+ 			 std::forward<_CallArgs>(__call_args)...);
+ 	}
+ 
+       template<typename... _CallArgs>
+ 	requires true
+ 	constexpr _Result_t<const _Binder&&, _CallArgs...>
+ 	operator()(_CallArgs&&... __call_args) const &&
+ 	noexcept(_S_noexcept_invocable<const _Binder&&, _CallArgs...>())
+ 	{
+ 	  return _S_call(std::move(*this),
+ 			 std::forward<_CallArgs>(__call_args)...);
+ 	}
+ 
+       template<typename... _CallArgs>
+ 	void operator()(_CallArgs&&...) & = delete;
+ 
+       template<typename... _CallArgs>
+ 	void operator()(_CallArgs&&...) const & = delete;
+ 
+       template<typename... _CallArgs>
+ 	void operator()(_CallArgs&&...) && = delete;
+ 
+       template<typename... _CallArgs>
+ 	void operator()(_CallArgs&&...) const && = delete;
+ #endif
+ 
+       template<typename _Tp, typename... _CallArgs>
+ 	static constexpr
+ 	decltype(auto)
+ 	_S_call(_Tp&& __g, _CallArgs&&... __call_args)
+ 	{
+ 	  if constexpr (sizeof...(_BoundArgs) > 1)
+ 	    return _BoundArgsStorage::template _S_apply<_Back>(
+ 		      std::forward<_Tp>(__g)._M_fd,
+ 		      std::forward<_Tp>(__g)._M_bound_args,
+ 		      std::forward<_CallArgs>(__call_args)...);
+ 	  else if constexpr (sizeof...(_BoundArgs) == 0)
+ 	    return std::__invoke(std::forward<_Tp>(__g)._M_fd,
+ 				 std::forward<_CallArgs>(__call_args)...);
+ 	  else if constexpr (_Back) // sizeof...(_BoundArgs) == 1
+ 	    return std::__invoke(std::forward<_Tp>(__g)._M_fd,
+ 				 std::forward<_CallArgs>(__call_args)...,
+ 				 std::forward<_Tp>(__g)._M_bound_args);
+ 	  else // !_Back && sizeof...(_BoundArgs) == 1
+ 	    return std::__invoke(std::forward<_Tp>(__g)._M_fd,
+ 				 std::forward<_Tp>(__g)._M_bound_args,
+ 				 std::forward<_CallArgs>(__call_args)...);
+ 	}
+ 
+     private:
+       using _BoundArgsStorage
+ 	// _BoundArgs are required to be move-constructible, so this is valid.
+ 	= decltype(__make_bound_args<_BoundArgs...>(std::declval<_BoundArgs>()...));
+ 
+       [[no_unique_address]] _Fd _M_fd;
+       [[no_unique_address]] _BoundArgsStorage _M_bound_args;
+     };
+ 
+   template<typename _Fn, typename... _Args>
+     using _Bind_front_t = _Binder<false, decay_t<_Fn>, decay_t<_Args>...>;
+ 
+   // for zero bounds args behavior of bind_front and bind_back is the same,
+   // so reuse _Bind_front_t, i.e. _Binder<false, ...>
+   template<typename _Fn, typename... _Args>
+     using _Bind_back_t
+       = _Binder<(sizeof...(_Args) > 0), decay_t<_Fn>, decay_t<_Args>...>;
+ 
+ _GLIBCXX_END_NAMESPACE_VERSION
+ } // namespace std
+ 
+ #endif // __cplusplus >= 202002L
+ #endif // _GLIBCXX_BINDERS_H
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/bits/stl_pair.h gcc-16-20250907/libstdc++-v3/include/bits/stl_pair.h
*** gcc-16-20250831/libstdc++-v3/include/bits/stl_pair.h	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/include/bits/stl_pair.h	Sun Sep  7 22:35:01 2025
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 445,451 ****
  
        /// Constructor accepting lvalues of `first_type` and `second_type`
        constexpr explicit(!_S_convertible<const _T1&, const _T2&>())
!       pair(const _T1& __x, const _T2& __y)
        noexcept(_S_nothrow_constructible<const _T1&, const _T2&>())
        requires (_S_constructible<const _T1&, const _T2&>())
        : first(__x), second(__y)
--- 445,451 ----
  
        /// Constructor accepting lvalues of `first_type` and `second_type`
        constexpr explicit(!_S_convertible<const _T1&, const _T2&>())
!       pair(const type_identity_t<_T1>& __x, const _T2& __y)
        noexcept(_S_nothrow_constructible<const _T1&, const _T2&>())
        requires (_S_constructible<const _T1&, const _T2&>())
        : first(__x), second(__y)
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1315,1326 ****
    template <typename _Tp, typename _Up>
      constexpr _Tp&&
      get(pair<_Tp, _Up>&& __p) noexcept
!     { return std::move(__p.first); }
  
    template <typename _Tp, typename _Up>
      constexpr const _Tp&&
      get(const pair<_Tp, _Up>&& __p) noexcept
!     { return std::move(__p.first); }
  
    template <typename _Tp, typename _Up>
      constexpr _Tp&
--- 1315,1326 ----
    template <typename _Tp, typename _Up>
      constexpr _Tp&&
      get(pair<_Tp, _Up>&& __p) noexcept
!     { return std::forward<_Tp>(__p.first); }
  
    template <typename _Tp, typename _Up>
      constexpr const _Tp&&
      get(const pair<_Tp, _Up>&& __p) noexcept
!     { return std::forward<const _Tp>(__p.first); }
  
    template <typename _Tp, typename _Up>
      constexpr _Tp&
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1335,1346 ****
    template <typename _Tp, typename _Up>
      constexpr _Tp&&
      get(pair<_Up, _Tp>&& __p) noexcept
!     { return std::move(__p.second); }
  
    template <typename _Tp, typename _Up>
      constexpr const _Tp&&
      get(const pair<_Up, _Tp>&& __p) noexcept
!     { return std::move(__p.second); }
  #endif // __glibcxx_tuples_by_type
  
  
--- 1335,1346 ----
    template <typename _Tp, typename _Up>
      constexpr _Tp&&
      get(pair<_Up, _Tp>&& __p) noexcept
!     { return std::forward<_Tp>(__p.second); }
  
    template <typename _Tp, typename _Up>
      constexpr const _Tp&&
      get(const pair<_Up, _Tp>&& __p) noexcept
!     { return std::forward<const _Tp>(__p.second); }
  #endif // __glibcxx_tuples_by_type
  
  
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/bits/utility.h gcc-16-20250907/libstdc++-v3/include/bits/utility.h
*** gcc-16-20250831/libstdc++-v3/include/bits/utility.h	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/include/bits/utility.h	Sun Sep  7 22:35:01 2025
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 137,162 ****
      using tuple_element_t = typename tuple_element<__i, _Tp>::type;
  #endif
  
-   // Stores a tuple of indices.  Used by tuple and pair, and by bind() to
-   // extract the elements in a tuple.
-   template<size_t... _Indexes> struct _Index_tuple { };
- 
-   // Builds an _Index_tuple<0, 1, 2, ..., _Num-1>.
-   template<size_t _Num>
-     struct _Build_index_tuple
-     {
- #if __has_builtin(__make_integer_seq)
-       template<typename, size_t... _Indices>
- 	using _IdxTuple = _Index_tuple<_Indices...>;
- 
-       // Clang defines __make_integer_seq for this purpose.
-       using __type = __make_integer_seq<_IdxTuple, size_t, _Num>;
- #else
-       // For GCC and other compilers, use __integer_pack instead.
-       using __type = _Index_tuple<__integer_pack(_Num)...>;
- #endif
-     };
- 
  #ifdef __glibcxx_integer_sequence // C++ >= 14
  
    /// Class template integer_sequence
--- 137,142 ----
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/bits/version.def gcc-16-20250907/libstdc++-v3/include/bits/version.def
*** gcc-16-20250831/libstdc++-v3/include/bits/version.def	Sun Aug 31 22:34:30 2025
--- gcc-16-20250907/libstdc++-v3/include/bits/version.def	Sun Sep  7 22:35:01 2025
*************** ftms = {
*** 595,600 ****
--- 595,610 ----
  };
  
  ftms = {
+   // Unofficial macro for C++20 chrono features supported for old string ABI.
+   name = chrono_cxx20;
+   values = {
+     v = 201800;
+     cxxmin = 20;
+     no_stdname = yes;
+   };
+ };
+ 
+ ftms = {
    name = execution;
    values = {
      v = 201902;  // FIXME: should be 201603L
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/bits/version.h gcc-16-20250907/libstdc++-v3/include/bits/version.h
*** gcc-16-20250831/libstdc++-v3/include/bits/version.h	Sun Aug 31 22:34:37 2025
--- gcc-16-20250907/libstdc++-v3/include/bits/version.h	Sun Sep  7 22:35:01 2025
***************
*** 665,670 ****
--- 665,679 ----
  #endif /* !defined(__cpp_lib_chrono) && defined(__glibcxx_want_chrono) */
  #undef __glibcxx_want_chrono
  
+ #if !defined(__cpp_lib_chrono_cxx20)
+ # if (__cplusplus >= 202002L)
+ #  define __glibcxx_chrono_cxx20 201800L
+ #  if defined(__glibcxx_want_all) || defined(__glibcxx_want_chrono_cxx20)
+ #  endif
+ # endif
+ #endif /* !defined(__cpp_lib_chrono_cxx20) && defined(__glibcxx_want_chrono_cxx20) */
+ #undef __glibcxx_want_chrono_cxx20
+ 
  #if !defined(__cpp_lib_execution)
  # if (__cplusplus >= 201703L) && _GLIBCXX_HOSTED
  #  define __glibcxx_execution 201902L
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/std/chrono gcc-16-20250907/libstdc++-v3/include/std/chrono
*** gcc-16-20250831/libstdc++-v3/include/std/chrono	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/include/std/chrono	Sun Sep  7 22:35:01 2025
***************
*** 53,63 ****
  #if __cpp_lib_bitops >= 201907L
  # include <bit> // __countr_zero
  #endif
! #if __cpp_lib_chrono >= 201803L && _GLIBCXX_HOSTED
  # include <sstream>
  # include <string>
  # include <vector>
- # include <bits/stl_algo.h> // upper_bound
  # include <bits/shared_ptr.h>
  # include <bits/unique_ptr.h>
  #endif
--- 53,66 ----
  #if __cpp_lib_bitops >= 201907L
  # include <bit> // __countr_zero
  #endif
! #ifdef __glibcxx_chrono_cxx20
! # include <bits/stl_algo.h>     // upper_bound
! # include <bits/range_access.h> // begin/end for arrays
! #endif
! #if __cpp_lib_chrono >= 201803L // C++20 && HOSTED && USE_CXX11_ABI
  # include <sstream>
  # include <string>
  # include <vector>
  # include <bits/shared_ptr.h>
  # include <bits/unique_ptr.h>
  #endif
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 81,87 ****
     */
    namespace chrono
    {
! #if __cpp_lib_chrono >= 201803L
      /// @addtogroup chrono
      /// @{
      struct local_t { };
--- 84,90 ----
     */
    namespace chrono
    {
! #ifdef __glibcxx_chrono_cxx20
      /// @addtogroup chrono
      /// @{
      struct local_t { };
*************** namespace __detail
*** 3319,3325 ****
  #endif // C++20
    } // namespace chrono
  
! #if __cpp_lib_chrono >= 201803L
    inline namespace literals
    {
    inline namespace chrono_literals
--- 3322,3328 ----
  #endif // C++20
    } // namespace chrono
  
! #ifdef __glibcxx_chrono_cxx20
    inline namespace literals
    {
    inline namespace chrono_literals
*************** namespace __detail
*** 3348,3354 ****
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
  
! #if __cpp_lib_chrono >= 201803L && _GLIBCXX_HOSTED
  # include <bits/chrono_io.h>
  #endif
  
--- 3351,3357 ----
  _GLIBCXX_END_NAMESPACE_VERSION
  } // namespace std
  
! #if defined __glibcxx_chrono_cxx20 && _GLIBCXX_HOSTED
  # include <bits/chrono_io.h>
  #endif
  
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/std/expected gcc-16-20250907/libstdc++-v3/include/std/expected
*** gcc-16-20250831/libstdc++-v3/include/std/expected	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/include/std/expected	Sun Sep  7 22:35:01 2025
*************** namespace __expected
*** 474,479 ****
--- 474,480 ----
        template<typename _Up = remove_cv_t<_Tp>>
  	requires (!is_same_v<remove_cvref_t<_Up>, expected>)
  	  && (!is_same_v<remove_cvref_t<_Up>, in_place_t>)
+ 	  && (!is_same_v<remove_cvref_t<_Up>, unexpect_t>)
  	  && is_constructible_v<_Tp, _Up>
  	  && (!__expected::__is_unexpected<remove_cvref_t<_Up>>)
  	  && __expected::__not_constructing_bool_from_expected<_Tp, _Up>
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/std/functional gcc-16-20250907/libstdc++-v3/include/std/functional
*** gcc-16-20250831/libstdc++-v3/include/std/functional	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/include/std/functional	Sun Sep  7 22:35:01 2025
***************
*** 84,89 ****
--- 84,90 ----
  # include <bits/stl_algobase.h> // std::search
  #endif
  #if __cplusplus >= 202002L
+ # include <bits/binders.h>
  # include <bits/ranges_cmp.h> // std::identity, ranges::equal_to etc.
  # include <compare>
  #endif
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 922,1089 ****
      }
  
  #ifdef __cpp_lib_bind_front // C++ >= 20
-   template<size_t, typename _Tp>
-   struct _Indexed_bound_arg
-     {
-       [[no_unique_address]] _Tp _M_val;
-     };
- 
-   template<typename... _IndexedArgs>
-     struct _Bound_arg_storage : _IndexedArgs...
-     {
-       template<typename _Fd, typename _Self, typename... _CallArgs>
- 	static constexpr
- 	decltype(auto)
- 	_S_apply_front(_Fd&& __fd, _Self&& __self, _CallArgs&&... __call_args)
- 	{
- 	  return std::invoke(std::forward<_Fd>(__fd),
- 			     __like_t<_Self, _IndexedArgs>(__self)._M_val...,
- 			     std::forward<_CallArgs>(__call_args)...);
- 	}
- 
-       template<typename _Fd, typename _Self, typename... _CallArgs>
- 	static constexpr
- 	decltype(auto)
- 	_S_apply_back(_Fd&& __fd, _Self&& __self, _CallArgs&&... __call_args)
- 	{
- 	  return std::invoke(std::forward<_Fd>(__fd),
- 			     std::forward<_CallArgs>(__call_args)...,
- 			     __like_t<_Self, _IndexedArgs>(__self)._M_val...);
- 	}
-     };
- 
-   template<typename... _BoundArgs, typename... _Args>
-     constexpr auto
-     __make_bound_args(_Args&&... __args)
-     {
-       if constexpr (sizeof...(_BoundArgs) == 1)
- 	// pack has one element, so return copy of arg
- 	return (_BoundArgs(std::forward<_Args>(__args)), ...);
-       else
- 	{
- 	  auto __impl = [&]<size_t... _Inds>(index_sequence<_Inds...>)
- 	  {
- 	    return _Bound_arg_storage<_Indexed_bound_arg<_Inds, _BoundArgs>...>
- 		   { {_BoundArgs(std::forward<_Args>(__args))}... };
- 	  };
- 	  return __impl(index_sequence_for<_BoundArgs...>());
- 	}
-     }
- 
-   template<typename _Fd, typename... _BoundArgs>
-     struct _Bind_front
-     {
-       static_assert(is_move_constructible_v<_Fd>);
-       static_assert((is_move_constructible_v<_BoundArgs> && ...));
- 
-       // First parameter is to ensure this constructor is never used
-       // instead of the copy/move constructor.
-       template<typename _Fn, typename... _Args>
- 	explicit constexpr
- 	_Bind_front(int, _Fn&& __fn, _Args&&... __args)
- 	noexcept(__and_<is_nothrow_constructible<_Fd, _Fn>,
- 			is_nothrow_constructible<_BoundArgs, _Args>...>::value)
- 	: _M_fd(std::forward<_Fn>(__fn)),
- 	  _M_bound_args(__make_bound_args<_BoundArgs...>(std::forward<_Args>(__args)...))
- 	{ static_assert(sizeof...(_Args) == sizeof...(_BoundArgs)); }
- 
- #if __cpp_explicit_this_parameter
-       template<typename _Self, typename... _CallArgs>
- 	constexpr
- 	invoke_result_t<__like_t<_Self, _Fd>, __like_t<_Self, _BoundArgs>..., _CallArgs...>
- 	operator()(this _Self&& __self, _CallArgs&&... __call_args)
- 	noexcept(is_nothrow_invocable_v<__like_t<_Self, _Fd>,
- 					__like_t<_Self, _BoundArgs>..., _CallArgs...>)
- 	{
- 	  return _S_call(__like_t<_Self, _Bind_front>(__self),
- 			 std::forward<_CallArgs>(__call_args)...);
- 	}
- #else
-       template<typename... _CallArgs>
- 	requires true
- 	constexpr
- 	invoke_result_t<_Fd&, _BoundArgs&..., _CallArgs...>
- 	operator()(_CallArgs&&... __call_args) &
- 	noexcept(is_nothrow_invocable_v<_Fd&, _BoundArgs&..., _CallArgs...>)
- 	{
- 	  return _S_call(*this, std::forward<_CallArgs>(__call_args)...);
- 	}
- 
-       template<typename... _CallArgs>
- 	requires true
- 	constexpr
- 	invoke_result_t<const _Fd&, const _BoundArgs&..., _CallArgs...>
- 	operator()(_CallArgs&&... __call_args) const &
- 	noexcept(is_nothrow_invocable_v<const _Fd&, const _BoundArgs&...,
- 					_CallArgs...>)
- 	{
- 	  return _S_call(*this, std::forward<_CallArgs>(__call_args)...);
- 	}
- 
-       template<typename... _CallArgs>
- 	requires true
- 	constexpr
- 	invoke_result_t<_Fd, _BoundArgs..., _CallArgs...>
- 	operator()(_CallArgs&&... __call_args) &&
- 	noexcept(is_nothrow_invocable_v<_Fd, _BoundArgs..., _CallArgs...>)
- 	{
- 	  return _S_call(std::move(*this),
- 			 std::forward<_CallArgs>(__call_args)...);
- 	}
- 
-       template<typename... _CallArgs>
- 	requires true
- 	constexpr
- 	invoke_result_t<const _Fd, const _BoundArgs..., _CallArgs...>
- 	operator()(_CallArgs&&... __call_args) const &&
- 	noexcept(is_nothrow_invocable_v<const _Fd, const _BoundArgs...,
- 					_CallArgs...>)
- 	{
- 	  return _S_call(std::move(*this),
- 			 std::forward<_CallArgs>(__call_args)...);
- 	}
- 
-       template<typename... _CallArgs>
- 	void operator()(_CallArgs&&...) & = delete;
- 
-       template<typename... _CallArgs>
- 	void operator()(_CallArgs&&...) const & = delete;
- 
-       template<typename... _CallArgs>
- 	void operator()(_CallArgs&&...) && = delete;
- 
-       template<typename... _CallArgs>
- 	void operator()(_CallArgs&&...) const && = delete;
- #endif
- 
-     private:
-       using _BoundArgsStorage
- 	// _BoundArgs are required to be move-constructible, so this is valid.
- 	= decltype(__make_bound_args<_BoundArgs...>(std::declval<_BoundArgs>()...));
- 
-       template<typename _Tp, typename... _CallArgs>
- 	static constexpr
- 	decltype(auto)
- 	_S_call(_Tp&& __g, _CallArgs&&... __call_args)
- 	{
- 	  if constexpr (sizeof...(_BoundArgs) == 1)
- 	    return std::invoke(std::forward<_Tp>(__g)._M_fd,
- 			       std::forward<_Tp>(__g)._M_bound_args,
- 			       std::forward<_CallArgs>(__call_args)...);
- 	  else
- 	    return _BoundArgsStorage::_S_apply_front(
- 		      std::forward<_Tp>(__g)._M_fd,
- 		      std::forward<_Tp>(__g)._M_bound_args,
- 		      std::forward<_CallArgs>(__call_args)...);
- 	}
- 
-       [[no_unique_address]] _Fd _M_fd;
-       [[no_unique_address]] _BoundArgsStorage _M_bound_args;
-     };
- 
-   template<typename _Fn, typename... _Args>
-     using _Bind_front_t = _Bind_front<decay_t<_Fn>, decay_t<_Args>...>;
- 
    /** Create call wrapper by partial application of arguments to function.
     *
     * The result of `std::bind_front(f, args...)` is a function object that
--- 923,928 ----
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1105,1166 ****
  #endif // __cpp_lib_bind_front
  
  #ifdef __cpp_lib_bind_back // C++ >= 23
-   template<typename _Fd, typename... _BoundArgs>
-     struct _Bind_back
-     {
-       static_assert(is_move_constructible_v<_Fd>);
-       static_assert((is_move_constructible_v<_BoundArgs> && ...));
- 
-       // First parameter is to ensure this constructor is never used
-       // instead of the copy/move constructor.
-       template<typename _Fn, typename... _Args>
- 	explicit constexpr
- 	_Bind_back(int, _Fn&& __fn, _Args&&... __args)
- 	noexcept(__and_<is_nothrow_constructible<_Fd, _Fn>,
- 			is_nothrow_constructible<_BoundArgs, _Args>...>::value)
- 	: _M_fd(std::forward<_Fn>(__fn)),
- 	  _M_bound_args(__make_bound_args<_BoundArgs...>(std::forward<_Args>(__args)...))
- 	{ static_assert(sizeof...(_Args) == sizeof...(_BoundArgs)); }
- 
-       template<typename _Self, typename... _CallArgs>
- 	constexpr
- 	invoke_result_t<__like_t<_Self, _Fd>, _CallArgs..., __like_t<_Self, _BoundArgs>...>
- 	operator()(this _Self&& __self, _CallArgs&&... __call_args)
- 	noexcept(is_nothrow_invocable_v<__like_t<_Self, _Fd>,
- 					_CallArgs..., __like_t<_Self, _BoundArgs>...>)
- 	{
- 	  return _S_call(__like_t<_Self, _Bind_back>(__self),
- 			 std::forward<_CallArgs>(__call_args)...);
- 	}
- 
-     private:
-       using _BoundArgsStorage
- 	// _BoundArgs are required to be move-constructible, so this is valid.
- 	= decltype(__make_bound_args<_BoundArgs...>(std::declval<_BoundArgs>()...));
- 
-       template<typename _Tp, typename... _CallArgs>
- 	static constexpr
- 	decltype(auto)
- 	_S_call(_Tp&& __g, _CallArgs&&... __call_args)
- 	{
- 	  if constexpr (sizeof...(_BoundArgs) == 1)
- 	    return std::invoke(std::forward<_Tp>(__g)._M_fd,
- 			       std::forward<_CallArgs>(__call_args)...,
- 			       std::forward<_Tp>(__g)._M_bound_args);
- 	  else
- 	    return _BoundArgsStorage::_S_apply_back(
- 		      std::forward<_Tp>(__g)._M_fd,
- 		      std::forward<_Tp>(__g)._M_bound_args,
- 		      std::forward<_CallArgs>(__call_args)...);
- 	}
- 
-       [[no_unique_address]] _Fd _M_fd;
-       [[no_unique_address]] _BoundArgsStorage _M_bound_args;
-     };
- 
-   template<typename _Fn, typename... _Args>
-     using _Bind_back_t = _Bind_back<decay_t<_Fn>, decay_t<_Args>...>;
- 
    /** Create call wrapper by partial application of arguments to function.
     *
     * The result of `std::bind_back(f, args...)` is a function object that
--- 944,949 ----
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/std/mdspan gcc-16-20250907/libstdc++-v3/include/std/mdspan
*** gcc-16-20250831/libstdc++-v3/include/std/mdspan	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/include/std/mdspan	Sun Sep  7 22:35:01 2025
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 727,732 ****
--- 727,734 ----
        required_span_size() const noexcept
        { return __mdspan::__size(_M_extents); }
  
+       // _GLIBCXX_RESOLVE_LIB_DEFECTS
+       // 4314. Missing move in mdspan layout mapping::operator()
        template<__mdspan::__valid_index_type<index_type>... _Indices>
  	requires (sizeof...(_Indices) == extents_type::rank())
  	constexpr index_type
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 866,871 ****
--- 868,875 ----
        required_span_size() const noexcept
        { return __mdspan::__size(_M_extents); }
  
+       // _GLIBCXX_RESOLVE_LIB_DEFECTS
+       // 4314. Missing move in mdspan layout mapping::operator()
        template<__mdspan::__valid_index_type<index_type>... _Indices>
  	requires (sizeof...(_Indices) == extents_type::rank())
  	constexpr index_type
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1089,1094 ****
--- 1093,1100 ----
  	return __ret;
        }
  
+       // _GLIBCXX_RESOLVE_LIB_DEFECTS
+       // 4314. Missing move in mdspan layout mapping::operator()
        template<__mdspan::__valid_index_type<index_type>... _Indices>
  	requires (sizeof...(_Indices) == extents_type::rank())
  	constexpr index_type
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 1208,1214 ****
        aligned_accessor() noexcept = default;
  
        template<typename _OElementType, size_t _OByteAlignment>
! 	requires (_OByteAlignment >= byte_alignment) 
  	    && is_convertible_v<_OElementType(*)[], element_type(*)[]>
  	constexpr
  	aligned_accessor(aligned_accessor<_OElementType, _OByteAlignment>)
--- 1214,1220 ----
        aligned_accessor() noexcept = default;
  
        template<typename _OElementType, size_t _OByteAlignment>
! 	requires (_OByteAlignment >= byte_alignment)
  	    && is_convertible_v<_OElementType(*)[], element_type(*)[]>
  	constexpr
  	aligned_accessor(aligned_accessor<_OElementType, _OByteAlignment>)
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/std/ranges gcc-16-20250907/libstdc++-v3/include/std/ranges
*** gcc-16-20250831/libstdc++-v3/include/std/ranges	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/include/std/ranges	Sun Sep  7 22:35:01 2025
***************
*** 51,56 ****
--- 51,57 ----
  #include <utility>
  #include <variant>
  #endif
+ #include <bits/binders.h>
  #include <bits/ranges_util.h>
  #include <bits/refwrap.h>
  
*************** namespace views::__adaptor
*** 1047,1060 ****
    template<typename _Adaptor, typename... _Args>
      struct _Partial : _RangeAdaptorClosure<_Partial<_Adaptor, _Args...>>
      {
!       tuple<_Args...> _M_args;
  
        // First parameter is to ensure this constructor is never used
        // instead of the copy/move constructor.
        template<typename... _Ts>
  	constexpr
  	_Partial(int, _Ts&&... __args)
! 	  : _M_args(std::forward<_Ts>(__args)...)
  	{ }
  
        // Invoke _Adaptor with arguments __r, _M_args... according to the
--- 1048,1062 ----
    template<typename _Adaptor, typename... _Args>
      struct _Partial : _RangeAdaptorClosure<_Partial<_Adaptor, _Args...>>
      {
!       using _Binder = _Bind_back_t<_Adaptor, _Args...>;
!       [[no_unique_address]] _Binder _M_binder;
  
        // First parameter is to ensure this constructor is never used
        // instead of the copy/move constructor.
        template<typename... _Ts>
  	constexpr
  	_Partial(int, _Ts&&... __args)
! 	  : _M_binder(0, _Adaptor(), std::forward<_Ts>(__args)...)
  	{ }
  
        // Invoke _Adaptor with arguments __r, _M_args... according to the
*************** namespace views::__adaptor
*** 1065,1139 ****
  	constexpr auto
  	operator()(this _Self&& __self, _Range&& __r)
  	{
! 	  auto __forwarder = [&__r] (auto&&... __args) {
! 	    return _Adaptor{}(std::forward<_Range>(__r),
! 			      std::forward<decltype(__args)>(__args)...);
! 	  };
! 	  return std::apply(__forwarder, __like_t<_Self, _Partial>(__self)._M_args);
  	}
  #else
        template<typename _Range>
  	requires __adaptor_invocable<_Adaptor, _Range, const _Args&...>
  	constexpr auto
  	operator()(_Range&& __r) const &
! 	{
! 	  auto __forwarder = [&__r] (const auto&... __args) {
! 	    return _Adaptor{}(std::forward<_Range>(__r), __args...);
! 	  };
! 	  return std::apply(__forwarder, _M_args);
! 	}
  
        template<typename _Range>
  	requires __adaptor_invocable<_Adaptor, _Range, _Args...>
  	constexpr auto
  	operator()(_Range&& __r) &&
! 	{
! 	  auto __forwarder = [&__r] (auto&... __args) {
! 	    return _Adaptor{}(std::forward<_Range>(__r), std::move(__args)...);
! 	  };
! 	  return std::apply(__forwarder, _M_args);
! 	}
! 
!       template<typename _Range>
! 	constexpr auto
! 	operator()(_Range&& __r) const && = delete;
! #endif
!     };
! 
!   // A lightweight specialization of the above primary template for
!   // the common case where _Adaptor accepts a single extra argument.
!   template<typename _Adaptor, typename _Arg>
!     struct _Partial<_Adaptor, _Arg> : _RangeAdaptorClosure<_Partial<_Adaptor, _Arg>>
!     {
!       _Arg _M_arg;
! 
!       template<typename _Tp>
! 	constexpr
! 	_Partial(int, _Tp&& __arg)
! 	  : _M_arg(std::forward<_Tp>(__arg))
! 	{ }
! 
! #if __cpp_explicit_this_parameter
!       template<typename _Self, typename _Range>
! 	requires __adaptor_invocable<_Adaptor, _Range, __like_t<_Self, _Arg>>
! 	constexpr auto
! 	operator()(this _Self&& __self, _Range&& __r)
! 	{
! 	  return _Adaptor{}(std::forward<_Range>(__r),
! 			    __like_t<_Self, _Partial>(__self)._M_arg);
! 	}
! #else
!       template<typename _Range>
! 	requires __adaptor_invocable<_Adaptor, _Range, const _Arg&>
! 	constexpr auto
! 	operator()(_Range&& __r) const &
! 	{ return _Adaptor{}(std::forward<_Range>(__r), _M_arg); }
! 
!       template<typename _Range>
! 	requires __adaptor_invocable<_Adaptor, _Range, _Arg>
! 	constexpr auto
! 	operator()(_Range&& __r) &&
! 	{ return _Adaptor{}(std::forward<_Range>(__r), std::move(_M_arg)); }
  
        template<typename _Range>
  	constexpr auto
--- 1067,1087 ----
  	constexpr auto
  	operator()(this _Self&& __self, _Range&& __r)
  	{
! 	  return _Binder::_S_call(__like_t<_Self, _Partial>(__self)._M_binder,
! 				  std::forward<_Range>(__r));
  	}
  #else
        template<typename _Range>
  	requires __adaptor_invocable<_Adaptor, _Range, const _Args&...>
  	constexpr auto
  	operator()(_Range&& __r) const &
! 	{ return _Binder::_S_call(_M_binder, std::forward<_Range>(__r)); }
  
        template<typename _Range>
  	requires __adaptor_invocable<_Adaptor, _Range, _Args...>
  	constexpr auto
  	operator()(_Range&& __r) &&
! 	{ return _Binder::_S_call(std::move(_M_binder), std::forward<_Range>(__r)); }
  
        template<typename _Range>
  	constexpr auto
*************** namespace views::__adaptor
*** 1150,1161 ****
        && (is_trivially_copy_constructible_v<_Args> && ...)
      struct _Partial<_Adaptor, _Args...> : _RangeAdaptorClosure<_Partial<_Adaptor, _Args...>>
      {
!       tuple<_Args...> _M_args;
  
        template<typename... _Ts>
  	constexpr
  	_Partial(int, _Ts&&... __args)
! 	  : _M_args(std::forward<_Ts>(__args)...)
  	{ }
  
        // Invoke _Adaptor with arguments __r, const _M_args&... regardless
--- 1098,1110 ----
        && (is_trivially_copy_constructible_v<_Args> && ...)
      struct _Partial<_Adaptor, _Args...> : _RangeAdaptorClosure<_Partial<_Adaptor, _Args...>>
      {
!       using _Binder = _Bind_back_t<_Adaptor, _Args...>;
!       [[no_unique_address]] _Binder _M_binder;
  
        template<typename... _Ts>
  	constexpr
  	_Partial(int, _Ts&&... __args)
! 	  : _M_binder(0, _Adaptor(), std::forward<_Ts>(__args)...)
  	{ }
  
        // Invoke _Adaptor with arguments __r, const _M_args&... regardless
*************** namespace views::__adaptor
*** 1164,1199 ****
  	requires __adaptor_invocable<_Adaptor, _Range, const _Args&...>
  	constexpr auto
  	operator()(_Range&& __r) const
! 	{
! 	  auto __forwarder = [&__r] (const auto&... __args) {
! 	    return _Adaptor{}(std::forward<_Range>(__r), __args...);
! 	  };
! 	  return std::apply(__forwarder, _M_args);
! 	}
! 
!       static constexpr bool _S_has_simple_call_op = true;
!     };
! 
!   // A lightweight specialization of the above template for the common case
!   // where _Adaptor accepts a single extra argument.
!   template<typename _Adaptor, typename _Arg>
!     requires __adaptor_has_simple_extra_args<_Adaptor, _Arg>
!       && is_trivially_copy_constructible_v<_Arg>
!     struct _Partial<_Adaptor, _Arg> : _RangeAdaptorClosure<_Partial<_Adaptor, _Arg>>
!     {
!       _Arg _M_arg;
! 
!       template<typename _Tp>
! 	constexpr
! 	_Partial(int, _Tp&& __arg)
! 	  : _M_arg(std::forward<_Tp>(__arg))
! 	{ }
! 
!       template<typename _Range>
! 	requires __adaptor_invocable<_Adaptor, _Range, const _Arg&>
! 	constexpr auto
! 	operator()(_Range&& __r) const
! 	{ return _Adaptor{}(std::forward<_Range>(__r), _M_arg); }
  
        static constexpr bool _S_has_simple_call_op = true;
      };
--- 1113,1119 ----
  	requires __adaptor_invocable<_Adaptor, _Range, const _Args&...>
  	constexpr auto
  	operator()(_Range&& __r) const
! 	{ return _Binder::_S_call(_M_binder, std::forward<_Range>(__r)); }
  
        static constexpr bool _S_has_simple_call_op = true;
      };
*************** namespace views::__adaptor
*** 2969,2975 ****
  	      }
  
  	    if constexpr (_S_ref_is_glvalue)
! 	      _M_inner.reset();
  	  }
  
  	  static constexpr auto
--- 2889,2900 ----
  	      }
  
  	    if constexpr (_S_ref_is_glvalue)
! 	      {
! 		if constexpr (forward_iterator<_Inner_iter>)
! 		  _M_inner = _Inner_iter();
! 		else
! 		  _M_inner.reset();
! 	      }
  	  }
  
  	  static constexpr auto
*************** namespace views::__adaptor
*** 3009,3014 ****
--- 2934,2957 ----
  	      return *_M_parent->_M_outer;
  	  }
  
+ 	  constexpr _Inner_iter&
+ 	  _M_get_inner() noexcept
+ 	  {
+ 	    if constexpr (forward_iterator<_Inner_iter>)
+ 	      return _M_inner;
+ 	    else
+ 	      return *_M_inner;
+ 	  }
+ 
+ 	  constexpr const _Inner_iter&
+ 	  _M_get_inner() const noexcept
+ 	  {
+ 	    if constexpr (forward_iterator<_Inner_iter>)
+ 	      return _M_inner;
+ 	    else
+ 	      return *_M_inner;
+ 	  }
+ 
  	  constexpr
  	  _Iterator(_Parent* __parent, _Outer_iter __outer) requires forward_range<_Base>
  	    : _M_outer(std::move(__outer)), _M_parent(__parent)
*************** namespace views::__adaptor
*** 3022,3028 ****
  	  [[no_unique_address]]
  	    __detail::__maybe_present_t<forward_range<_Base>, _Outer_iter> _M_outer
  	      = decltype(_M_outer)();
! 	  optional<_Inner_iter> _M_inner;
  	  _Parent* _M_parent = nullptr;
  
  	public:
--- 2965,2973 ----
  	  [[no_unique_address]]
  	    __detail::__maybe_present_t<forward_range<_Base>, _Outer_iter> _M_outer
  	      = decltype(_M_outer)();
! 	  __conditional_t<forward_iterator<_Inner_iter>,
! 			  _Inner_iter, optional<_Inner_iter>> _M_inner
! 	    = decltype(_M_inner)();
  	  _Parent* _M_parent = nullptr;
  
  	public:
*************** namespace views::__adaptor
*** 3046,3052 ****
  
  	  constexpr decltype(auto)
  	  operator*() const
! 	  { return **_M_inner; }
  
  	  // _GLIBCXX_RESOLVE_LIB_DEFECTS
  	  // 3500. join_view::iterator::operator->() is bogus
--- 2991,2997 ----
  
  	  constexpr decltype(auto)
  	  operator*() const
! 	  { return *_M_get_inner(); }
  
  	  // _GLIBCXX_RESOLVE_LIB_DEFECTS
  	  // 3500. join_view::iterator::operator->() is bogus
*************** namespace views::__adaptor
*** 3054,3060 ****
  	  operator->() const
  	    requires __detail::__has_arrow<_Inner_iter>
  	      && copyable<_Inner_iter>
! 	  { return *_M_inner; }
  
  	  constexpr _Iterator&
  	  operator++()
--- 2999,3005 ----
  	  operator->() const
  	    requires __detail::__has_arrow<_Inner_iter>
  	      && copyable<_Inner_iter>
! 	  { return _M_get_inner(); }
  
  	  constexpr _Iterator&
  	  operator++()
*************** namespace views::__adaptor
*** 3065,3071 ****
  	      else
  		return *_M_parent->_M_inner;
  	    }();
! 	    if (++*_M_inner == ranges::end(__inner_range))
  	      {
  		++_M_get_outer();
  		_M_satisfy();
--- 3010,3016 ----
  	      else
  		return *_M_parent->_M_inner;
  	    }();
! 	    if (++_M_get_inner() == ranges::end(__inner_range))
  	      {
  		++_M_get_outer();
  		_M_satisfy();
*************** namespace views::__adaptor
*** 3095,3103 ****
  	  {
  	    if (_M_outer == ranges::end(_M_parent->_M_base))
  	      _M_inner = ranges::end(__detail::__as_lvalue(*--_M_outer));
! 	    while (*_M_inner == ranges::begin(__detail::__as_lvalue(*_M_outer)))
! 	      *_M_inner = ranges::end(__detail::__as_lvalue(*--_M_outer));
! 	    --*_M_inner;
  	    return *this;
  	  }
  
--- 3040,3048 ----
  	  {
  	    if (_M_outer == ranges::end(_M_parent->_M_base))
  	      _M_inner = ranges::end(__detail::__as_lvalue(*--_M_outer));
! 	    while (_M_get_inner() == ranges::begin(__detail::__as_lvalue(*_M_outer)))
! 	      _M_get_inner() = ranges::end(__detail::__as_lvalue(*--_M_outer));
! 	    --_M_get_inner();
  	    return *this;
  	  }
  
*************** namespace views::__adaptor
*** 3124,3137 ****
  
  	  friend constexpr decltype(auto)
  	  iter_move(const _Iterator& __i)
! 	  noexcept(noexcept(ranges::iter_move(*__i._M_inner)))
! 	  { return ranges::iter_move(*__i._M_inner); }
  
  	  friend constexpr void
  	  iter_swap(const _Iterator& __x, const _Iterator& __y)
! 	    noexcept(noexcept(ranges::iter_swap(*__x._M_inner, *__y._M_inner)))
  	    requires indirectly_swappable<_Inner_iter>
! 	  { return ranges::iter_swap(*__x._M_inner, *__y._M_inner); }
  
  	  friend _Iterator<!_Const>;
  	  template<bool> friend struct _Sentinel;
--- 3069,3082 ----
  
  	  friend constexpr decltype(auto)
  	  iter_move(const _Iterator& __i)
! 	  noexcept(noexcept(ranges::iter_move(__i._M_get_inner())))
! 	  { return ranges::iter_move(__i._M_get_inner()); }
  
  	  friend constexpr void
  	  iter_swap(const _Iterator& __x, const _Iterator& __y)
! 	    noexcept(noexcept(ranges::iter_swap(__x._M_get_inner(), __y._M_get_inner())))
  	    requires indirectly_swappable<_Inner_iter>
! 	  { return ranges::iter_swap(__x._M_get_inner(), __y._M_get_inner()); }
  
  	  friend _Iterator<!_Const>;
  	  template<bool> friend struct _Sentinel;
diff -Nrcpad gcc-16-20250831/libstdc++-v3/include/std/type_traits gcc-16-20250907/libstdc++-v3/include/std/type_traits
*** gcc-16-20250831/libstdc++-v3/include/std/type_traits	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/include/std/type_traits	Sun Sep  7 22:35:01 2025
*************** template<typename _Ret, typename _Fn, ty
*** 4280,4285 ****
--- 4280,4307 ----
  
  #endif // C++2a
  
+ #if __cplusplus >= 201103L
+   // Stores a tuple of indices.  Used by tuple and pair, and by bind() to
+   // extract the elements in a tuple.
+   template<size_t... _Indexes> struct _Index_tuple { };
+ 
+   // Builds an _Index_tuple<0, 1, 2, ..., _Num-1>.
+   template<size_t _Num>
+     struct _Build_index_tuple
+     {
+ #if __has_builtin(__make_integer_seq)
+       template<typename, size_t... _Indices>
+ 	using _IdxTuple = _Index_tuple<_Indices...>;
+ 
+       // Clang defines __make_integer_seq for this purpose.
+       using __type = __make_integer_seq<_IdxTuple, size_t, _Num>;
+ #else
+       // For GCC and other compilers, use __integer_pack instead.
+       using __type = _Index_tuple<__integer_pack(_Num)...>;
+ #endif
+     };
+ #endif // C++11
+ 
    /// @} group metaprogramming
  
  _GLIBCXX_END_NAMESPACE_VERSION
diff -Nrcpad gcc-16-20250831/libstdc++-v3/libsupc++/compare gcc-16-20250907/libstdc++-v3/libsupc++/compare
*** gcc-16-20250831/libstdc++-v3/libsupc++/compare	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/libsupc++/compare	Sun Sep  7 22:35:01 2025
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 73,81 ****
        __make(_Ord __o) noexcept
        { return _Ordering(__o); }
  
!     struct __unspec
      {
!       consteval __unspec(__unspec*) noexcept { }
      };
    }
  
--- 73,81 ----
        __make(_Ord __o) noexcept
        { return _Ordering(__o); }
  
!     struct __literal_zero
      {
!       consteval __literal_zero(__literal_zero*) noexcept { }
      };
    }
  
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 112,118 ****
      // comparisons
      [[nodiscard]]
      friend constexpr bool
!     operator==(partial_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value == 0; }
  
      [[nodiscard]]
--- 112,118 ----
      // comparisons
      [[nodiscard]]
      friend constexpr bool
!     operator==(partial_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value == 0; }
  
      [[nodiscard]]
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 121,172 ****
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (partial_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value == -1; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (partial_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value == 1; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(partial_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_reverse() >= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(partial_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value >= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (__cmp_cat::__unspec, partial_ordering __v) noexcept
      { return __v._M_value == 1; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (__cmp_cat::__unspec, partial_ordering __v) noexcept
      { return __v._M_value == -1; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(__cmp_cat::__unspec, partial_ordering __v) noexcept
      { return 0 <= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(__cmp_cat::__unspec, partial_ordering __v) noexcept
      { return 0 <= __v._M_reverse(); }
  
      [[nodiscard]]
      friend constexpr partial_ordering
!     operator<=>(partial_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v; }
  
      [[nodiscard]]
      friend constexpr partial_ordering
!     operator<=>(__cmp_cat::__unspec, partial_ordering __v) noexcept
      { return partial_ordering(__cmp_cat::_Ord(__v._M_reverse())); }
    };
  
--- 121,172 ----
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (partial_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value == -1; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (partial_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value == 1; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(partial_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_reverse() >= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(partial_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value >= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (__cmp_cat::__literal_zero, partial_ordering __v) noexcept
      { return __v._M_value == 1; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (__cmp_cat::__literal_zero, partial_ordering __v) noexcept
      { return __v._M_value == -1; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(__cmp_cat::__literal_zero, partial_ordering __v) noexcept
      { return 0 <= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(__cmp_cat::__literal_zero, partial_ordering __v) noexcept
      { return 0 <= __v._M_reverse(); }
  
      [[nodiscard]]
      friend constexpr partial_ordering
!     operator<=>(partial_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v; }
  
      [[nodiscard]]
      friend constexpr partial_ordering
!     operator<=>(__cmp_cat::__literal_zero, partial_ordering __v) noexcept
      { return partial_ordering(__cmp_cat::_Ord(__v._M_reverse())); }
    };
  
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 209,215 ****
      // comparisons
      [[nodiscard]]
      friend constexpr bool
!     operator==(weak_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value == 0; }
  
      [[nodiscard]]
--- 209,215 ----
      // comparisons
      [[nodiscard]]
      friend constexpr bool
!     operator==(weak_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value == 0; }
  
      [[nodiscard]]
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 218,269 ****
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (weak_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value < 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (weak_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value > 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(weak_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value <= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(weak_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value >= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (__cmp_cat::__unspec, weak_ordering __v) noexcept
      { return 0 < __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (__cmp_cat::__unspec, weak_ordering __v) noexcept
      { return 0 > __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(__cmp_cat::__unspec, weak_ordering __v) noexcept
      { return 0 <= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(__cmp_cat::__unspec, weak_ordering __v) noexcept
      { return 0 >= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr weak_ordering
!     operator<=>(weak_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v; }
  
      [[nodiscard]]
      friend constexpr weak_ordering
!     operator<=>(__cmp_cat::__unspec, weak_ordering __v) noexcept
      { return weak_ordering(__cmp_cat::_Ord(-__v._M_value)); }
    };
  
--- 218,269 ----
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (weak_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value < 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (weak_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value > 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(weak_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value <= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(weak_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value >= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (__cmp_cat::__literal_zero, weak_ordering __v) noexcept
      { return 0 < __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (__cmp_cat::__literal_zero, weak_ordering __v) noexcept
      { return 0 > __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(__cmp_cat::__literal_zero, weak_ordering __v) noexcept
      { return 0 <= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(__cmp_cat::__literal_zero, weak_ordering __v) noexcept
      { return 0 >= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr weak_ordering
!     operator<=>(weak_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v; }
  
      [[nodiscard]]
      friend constexpr weak_ordering
!     operator<=>(__cmp_cat::__literal_zero, weak_ordering __v) noexcept
      { return weak_ordering(__cmp_cat::_Ord(-__v._M_value)); }
    };
  
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 309,315 ****
      // comparisons
      [[nodiscard]]
      friend constexpr bool
!     operator==(strong_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value == 0; }
  
      [[nodiscard]]
--- 309,315 ----
      // comparisons
      [[nodiscard]]
      friend constexpr bool
!     operator==(strong_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value == 0; }
  
      [[nodiscard]]
*************** namespace std _GLIBCXX_VISIBILITY(defaul
*** 318,369 ****
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (strong_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value < 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (strong_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value > 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(strong_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value <= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(strong_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v._M_value >= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (__cmp_cat::__unspec, strong_ordering __v) noexcept
      { return 0 < __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (__cmp_cat::__unspec, strong_ordering __v) noexcept
      { return 0 > __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(__cmp_cat::__unspec, strong_ordering __v) noexcept
      { return 0 <= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(__cmp_cat::__unspec, strong_ordering __v) noexcept
      { return 0 >= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr strong_ordering
!     operator<=>(strong_ordering __v, __cmp_cat::__unspec) noexcept
      { return __v; }
  
      [[nodiscard]]
      friend constexpr strong_ordering
!     operator<=>(__cmp_cat::__unspec, strong_ordering __v) noexcept
      { return strong_ordering(__cmp_cat::_Ord(-__v._M_value)); }
    };
  
--- 318,369 ----
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (strong_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value < 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (strong_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value > 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(strong_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value <= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(strong_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v._M_value >= 0; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator< (__cmp_cat::__literal_zero, strong_ordering __v) noexcept
      { return 0 < __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator> (__cmp_cat::__literal_zero, strong_ordering __v) noexcept
      { return 0 > __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator<=(__cmp_cat::__literal_zero, strong_ordering __v) noexcept
      { return 0 <= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr bool
!     operator>=(__cmp_cat::__literal_zero, strong_ordering __v) noexcept
      { return 0 >= __v._M_value; }
  
      [[nodiscard]]
      friend constexpr strong_ordering
!     operator<=>(strong_ordering __v, __cmp_cat::__literal_zero) noexcept
      { return __v; }
  
      [[nodiscard]]
      friend constexpr strong_ordering
!     operator<=>(__cmp_cat::__literal_zero, strong_ordering __v) noexcept
      { return strong_ordering(__cmp_cat::_Ord(-__v._M_value)); }
    };
  
diff -Nrcpad gcc-16-20250831/libstdc++-v3/src/c++20/clock.cc gcc-16-20250907/libstdc++-v3/src/c++20/clock.cc
*** gcc-16-20250831/libstdc++-v3/src/c++20/clock.cc	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/src/c++20/clock.cc	Sun Sep  7 22:35:01 2025
*************** _GLIBCXX_BEGIN_NAMESPACE_VERSION
*** 35,41 ****
  
  namespace chrono
  {
! #if __cpp_lib_chrono >= 201803L && _GLIBCXX_HOSTED
    // TODO use CLOCK_TAI on linux, add extension point.
    time_point<tai_clock>
    tai_clock::now()
--- 35,41 ----
  
  namespace chrono
  {
! #if defined __glibcxx_chrono_cxx20 && _GLIBCXX_HOSTED
    // TODO use CLOCK_TAI on linux, add extension point.
    time_point<tai_clock>
    tai_clock::now()
diff -Nrcpad gcc-16-20250831/libstdc++-v3/testsuite/20_util/expected/lwg4222.cc gcc-16-20250907/libstdc++-v3/testsuite/20_util/expected/lwg4222.cc
*** gcc-16-20250831/libstdc++-v3/testsuite/20_util/expected/lwg4222.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/libstdc++-v3/testsuite/20_util/expected/lwg4222.cc	Sun Sep  7 22:35:02 2025
***************
*** 0 ****
--- 1,39 ----
+ // { dg-do run { target c++23 } }
+ 
+ // LWG 4222. 'expected' constructor from a single value missing a constraint
+ 
+ #include <expected>
+ #include <type_traits>
+ #include <testsuite_hooks.h>
+ 
+ struct T {
+   explicit T(auto) {}
+ };
+ struct E {
+   E(int) {}
+ };
+ 
+ struct V {
+  explicit constexpr V(std::unexpect_t) {}
+ };
+ 
+ static_assert(!std::is_constructible_v<std::expected<T, E>, std::unexpect_t>);
+ static_assert(!std::is_constructible_v<std::expected<T, E>, std::unexpect_t &>);
+ static_assert(!std::is_constructible_v<std::expected<T, E>, std::unexpect_t &&>);
+ static_assert(!std::is_constructible_v<std::expected<T, E>, const std::unexpect_t>);
+ static_assert(!std::is_constructible_v<std::expected<T, E>, const std::unexpect_t &>);
+ static_assert(!std::is_constructible_v<std::expected<T, E>, const std::unexpect_t &&>);
+ 
+ constexpr bool test() {
+   std::expected<V, int> e1(std::in_place, std::unexpect);
+   VERIFY( e1.has_value() );
+   std::expected<int, V> e2(std::unexpect, std::unexpect);
+   VERIFY( !e2.has_value() );
+   return true;
+ }
+ 
+ int main() {
+   test();
+   static_assert(test());
+   return 0;
+ }
diff -Nrcpad gcc-16-20250831/libstdc++-v3/testsuite/20_util/function_objects/bind_back/1.cc gcc-16-20250907/libstdc++-v3/testsuite/20_util/function_objects/bind_back/1.cc
*** gcc-16-20250831/libstdc++-v3/testsuite/20_util/function_objects/bind_back/1.cc	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/testsuite/20_util/function_objects/bind_back/1.cc	Sun Sep  7 22:35:02 2025
*************** test01()
*** 57,63 ****
        decltype(bind_back(std::declval<const F&>(), std::declval<const int&>(), std::declval<const float&>()))
        >);
  
- 
    // Reference wrappers should be handled:
    static_assert(!std::is_same_v<
        decltype(bind_back(std::declval<F>(), std::declval<int&>())),
--- 57,62 ----
*************** testCallArgs(Args... args)
*** 197,202 ****
--- 196,216 ----
    VERIFY( q.as_const && q.as_lvalue );
    q = cg(std::move(ci));
    VERIFY( q.as_const && ! q.as_lvalue );
+ 
+   struct S
+   {
+     int operator()(long, long, Args...) const { return 1; }
+     int operator()(int, void*, Args...) const { return 2; }
+   };
+ 
+   S s;
+   // literal zero can be converted to any pointer, so (int, void*)
+   // is best candidate
+   VERIFY( s(0, 0, args...) == 2 );
+   // both arguments are bound to int&&, and no longer can be
+   // converted to pointer, (long, long) is only candidate
+   VERIFY( bind_back(s)(0, 0, args...) == 1 );
+   VERIFY( bind_back(s, args...)(0, 0) == 1 );
  }
  
  void
diff -Nrcpad gcc-16-20250831/libstdc++-v3/testsuite/20_util/function_objects/bind_back/111327.cc gcc-16-20250907/libstdc++-v3/testsuite/20_util/function_objects/bind_back/111327.cc
*** gcc-16-20250831/libstdc++-v3/testsuite/20_util/function_objects/bind_back/111327.cc	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/testsuite/20_util/function_objects/bind_back/111327.cc	Sun Sep  7 22:35:02 2025
*************** int main() {
*** 50,53 ****
    std::move(std::as_const(g2))();
  }
  
! // { dg-error "no type named 'type' in 'struct std::invoke_result" "" { target c++23 } 0 }
--- 50,54 ----
    std::move(std::as_const(g2))();
  }
  
! // { dg-error "no type named 'type' in 'std::__conditional_t<false, std::invoke_result<" "" { target c++23 } 0 }
! // { dg-error "no type named 'type' in 'std::__conditional_t<true, std::invoke_result<" "" { target c++23 } 0 }
diff -Nrcpad gcc-16-20250831/libstdc++-v3/testsuite/20_util/function_objects/bind_front/1.cc gcc-16-20250907/libstdc++-v3/testsuite/20_util/function_objects/bind_front/1.cc
*** gcc-16-20250831/libstdc++-v3/testsuite/20_util/function_objects/bind_front/1.cc	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/testsuite/20_util/function_objects/bind_front/1.cc	Sun Sep  7 22:35:02 2025
*************** testCallArgs(Args... args)
*** 196,201 ****
--- 196,216 ----
    VERIFY( q.as_const && q.as_lvalue );
    q = cg(std::move(ci));
    VERIFY( q.as_const && ! q.as_lvalue );
+ 
+   struct S
+   {
+     int operator()(Args..., long, long) const { return 1; }
+     int operator()(Args..., int, void*) const { return 2; }
+   };
+ 
+   S s;
+   // literal zero can be converted to any pointer, so (int, void*)
+   // is best candidate
+   VERIFY( s(args..., 0, 0) == 2 );
+   // both arguments are bound to int&&, and no longer can be
+   // converted to pointer, (long, long) is only candidate
+   VERIFY( bind_front(s)(args..., 0, 0) == 1 );
+   VERIFY( bind_front(s, args...)(0, 0) == 1 );
  }
  
  void
diff -Nrcpad gcc-16-20250831/libstdc++-v3/testsuite/20_util/function_objects/bind_front/111327.cc gcc-16-20250907/libstdc++-v3/testsuite/20_util/function_objects/bind_front/111327.cc
*** gcc-16-20250831/libstdc++-v3/testsuite/20_util/function_objects/bind_front/111327.cc	Sun Aug 31 22:34:31 2025
--- gcc-16-20250907/libstdc++-v3/testsuite/20_util/function_objects/bind_front/111327.cc	Sun Sep  7 22:35:02 2025
*************** int main() {
*** 50,53 ****
    std::move(std::as_const(g2))();
  }
  
! // { dg-error "no type named 'type' in 'struct std::invoke_result" "" { target c++23 } 0 }
--- 50,53 ----
    std::move(std::as_const(g2))();
  }
  
! // { dg-error "no type named 'type' in 'std::__conditional_t<false, std::invoke_result<" "" { target c++23 } 0 }
diff -Nrcpad gcc-16-20250831/libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type.cc gcc-16-20250907/libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type.cc
*** gcc-16-20250831/libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type.cc	Sun Aug 31 22:34:32 2025
--- gcc-16-20250907/libstdc++-v3/testsuite/20_util/pair/astuple/get_by_type.cc	Sun Sep  7 22:35:02 2025
*************** void test01()
*** 33,35 ****
--- 33,87 ----
    const int&&  cpsecond __attribute__((unused)) =
      std::get<int>(std::move(cp));
  }
+ 
+ // PR libstdc++/121745 return of get(pair<_Up, _Tp>&& __p) may be ill-formed
+ void
+ test_pr121745(std::pair<float&, int&> p)
+ {
+   float& pfirst = std::get<float&>(std::move(p));
+   int& psecond  = std::get<int&>(std::move(p));
+ 
+   const auto& p2 = p;
+   float& p2first = std::get<float&>(std::move(p2));
+   int& p2second  = std::get<int&>(std::move(p2));
+ }
+ 
+ template<typename T, typename Pair>
+ using get_t = decltype(std::get<T>(std::declval<Pair>()));
+ 
+ // Check that get<T>(Pair) returns Ret
+ template<typename T, typename Pair, typename Ret>
+ constexpr bool verify = std::is_same<get_t<T, Pair>, Ret>::value;
+ 
+ template<typename T1, typename T2>
+ void
+ check()
+ {
+   // Overloads for accessing first member
+   static_assert( verify<T1, std::pair<T1, T2>&, T1&>,
+ 		 "T1& get(pair<T1, T2>&)" );
+   static_assert( verify<T1, const std::pair<T1, T2>&, const T1&>,
+ 		 "const T1& get(const pair<T1, T2>&)" );
+   static_assert( verify<T1, std::pair<T1, T2>&&, T1&&>,
+ 		 "T1&& get(pair<T1, T2>&&)" );
+   static_assert( verify<T1, const std::pair<T1, T2>&&, const T1&&>,
+ 		 "const T1&& get(const pair<T1, T2>&&)" );
+ 
+   // Overloads for accessing second member
+   static_assert( verify<T2, std::pair<T1, T2>&, T2&>,
+ 		 "T2& get(pair<T1, T2>&)" );
+   static_assert( verify<T2, const std::pair<T1, T2>&, const T2&>,
+ 		 "const T2& get(const pair<T1, T2>&)" );
+   static_assert( verify<T2, std::pair<T1, T2>&&, T2&&>,
+ 		 "T2&& get(pair<T1, T2>&&)" );
+   static_assert( verify<T2, const std::pair<T1, T2>&&, const T2&&>,
+ 		 "const T2&& get(const pair<T1, T2>&&)" );
+ }
+ 
+ void
+ test_all()
+ {
+   check<float, int>();
+   check<float&, int&>();
+   check<float&&, int&&>();
+ }
diff -Nrcpad gcc-16-20250831/libstdc++-v3/testsuite/20_util/pair/cons/110853.cc gcc-16-20250907/libstdc++-v3/testsuite/20_util/pair/cons/110853.cc
*** gcc-16-20250831/libstdc++-v3/testsuite/20_util/pair/cons/110853.cc	Thu Jan  1 00:00:00 1970
--- gcc-16-20250907/libstdc++-v3/testsuite/20_util/pair/cons/110853.cc	Sun Sep  7 22:35:02 2025
***************
*** 0 ****
--- 1,10 ----
+ // { dg-do compile { target c++17 } }
+ // PR libstdc++/110853
+ // Bad interaction between deduction guide with decay and constraints
+ // (CTAD, std::pair and function lvalue)
+ 
+ #include <utility>
+ 
+ void func() {}
+ std::pair p(1, func);
+ std::pair<int, void (*)()>& r = p;
diff -Nrcpad gcc-16-20250831/libstdc++-v3/testsuite/std/ranges/adaptors/join.cc gcc-16-20250907/libstdc++-v3/testsuite/std/ranges/adaptors/join.cc
*** gcc-16-20250831/libstdc++-v3/testsuite/std/ranges/adaptors/join.cc	Sun Aug 31 22:34:35 2025
--- gcc-16-20250907/libstdc++-v3/testsuite/std/ranges/adaptors/join.cc	Sun Sep  7 22:35:05 2025
*************** test15()
*** 240,245 ****
--- 240,256 ----
    constexpr decltype(views::join(views::single(views::single(0))).begin()) it;
  }
  
+ void
+ test16()
+ {
+   // PR libstdc++/121804 - join_view::iterator::_M_get_inner should be noexcept
+   std::vector<std::vector<int>> vv;
+   ranges::join_view j{vv};
+   auto jit = j.begin();
+   static_assert(noexcept(ranges::iter_move(jit)));
+   static_assert(noexcept(ranges::iter_swap(jit, jit)));
+ }
+ 
  int
  main()
  {
*************** main()
*** 258,261 ****
--- 269,273 ----
    test13();
    test14();
    test15();
+   test16();
  }
diff -Nrcpad gcc-16-20250831/maintainer-scripts/ChangeLog gcc-16-20250907/maintainer-scripts/ChangeLog
*** gcc-16-20250831/maintainer-scripts/ChangeLog	Sun Aug 31 22:34:35 2025
--- gcc-16-20250907/maintainer-scripts/ChangeLog	Sun Sep  7 22:35:05 2025
***************
*** 1,3 ****
--- 1,9 ----
+ 2025-09-01  Gerald Pfeifer  <gerald@pfeifer.com>
+ 
+ 	* update_web_docs_libstdcxx_git: Copy our "inner" documentation
+ 	into the web area using rsync instead of cpio and remove orphaned
+ 	files.
+ 
  2025-07-04  Richard Biener  <rguenther@suse.de>
  
  	* crontab: Stop doing GCC 12 snapshots.
diff -Nrcpad gcc-16-20250831/maintainer-scripts/update_web_docs_libstdcxx_git gcc-16-20250907/maintainer-scripts/update_web_docs_libstdcxx_git
*** gcc-16-20250831/maintainer-scripts/update_web_docs_libstdcxx_git	Sun Aug 31 22:34:35 2025
--- gcc-16-20250907/maintainer-scripts/update_web_docs_libstdcxx_git	Sun Sep  7 22:35:05 2025
*************** cd $WORKDIR
*** 35,42 ****
  git -C $GITROOT archive master $GETTHIS | tar xf -
  cd $GETTHIS
  
! # copy the tree to the onlinedocs area, preserve directory structure
! find . -depth -print | cpio -pd $WWWDIR 2>&1 | egrep -v "$FILTER"
  
  err=${PIPESTATUS[1]}
  if [ $err -gt 0 ]; then
--- 35,43 ----
  git -C $GITROOT archive master $GETTHIS | tar xf -
  cd $GETTHIS
  
! # Copy the tree to the libstdc++ onlinedocs area and remove orphans (taking
! # care to keep some directories coming from a different source).
! rsync -ahv --delete-after -f '- /images/*' -f '- /libstdc*' -f '- latest-doxygen' . $WWWDIR 2>&1 | egrep -v "$FILTER"
  
  err=${PIPESTATUS[1]}
  if [ $err -gt 0 ]; then
*************** fi
*** 45,48 ****
  
  cd /
  /bin/rm -rf $WORKDIR
- 
--- 46,48 ----
